(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2004/0079957 A1
`Andrews et al.
`(43) Pub. Date:
`Apr. 29, 2004
`
`US 20040079957A1
`
`(54) POWER SURFACE MOUNT LIGHT
`EMITTING DE PACKAGE
`
`(76) Inventors: Peter Scott Andrews, Durham, NC
`(US); Ban P. Loh, Durham, NC (US)
`Correspondence Address:
`D. James Chung
`Suite 245
`6601 KO Center Park
`oII uenter Parkway
`Pleasanton, CA 94566 (US)
`(21) Appl. No.:
`10/692,351
`(22) Filed:
`Oct. 22, 2003
`
`Related U.S. Application Data
`(63) Continuation-in-part of application No. 10/446,532,
`filed on May 27, 2003.
`signal application No. 60/408,254, filed on Sep.
`
`(60)
`
`s
`
`Publication Classification
`
`(51) Int. Cl. .................................................. H01L 33/00
`
`(52) U.S. Cl. .............................................................. 257/100
`
`(57)
`
`ABSTRACT
`
`A light emitting die package is disclosed. The die package
`includes a Substrate, a reflector plate, and a lens. The
`substrate may be made from thermally conductive but
`electrically insulating material or from a material that is both
`thermally and electrically conductive. In embodiments
`wherein the Substrate is made from an electrically conduc
`tive material, the Substrate further includes an electrically
`insulating, thermally conductive material formed on the
`electrically conductive material. The Substrate has traces for
`connecting to a light emitting diode (LED) at a mounting
`pad. The reflector plate is coupled to the Substrate and
`Substantially Surrounds the mounting pad. The lens Substan
`tially covers the mounting pad. Heat generated by the LED
`during operation is drawn away from the LED by both the
`Substrate (acting as a bottom heat sink) and the reflector
`plate (acting as a top heat sink). The reflector plate includes
`a reflective surface to direct light from the LED in a desired
`direction.
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`Page 1
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`Patent Application Publication Apr. 29, 2004 Sheet 1 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 2 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 4 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 5 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 6 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 7 of 9
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`Patent Application Publication Apr. 29, 2004 Sheet 8 of 9
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`US 2004/0079957 A1
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`Apr. 29, 2004
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`POWER SURFACE MOUNT LIGHT EMITTING
`DE PACKAGE
`
`RELATED APPLICATIONS
`0001. The present application is a continuation-in-part of
`U.S. patent application Ser. No. 10/446,532 entitled “Power
`Surface Mount Light Emitting Die Package' filed May 27,
`2003, which claims the benefit of U.S. Provisional Appli
`cation Serial No. 60/408,254 entitled “Power-SMT, LED
`Package with Dual Heat-Sinks and an Optical System or
`Chemical-Coated Lens' filed Sep. 4, 2002.
`
`BACKGROUND
`0002 The present invention relates to the field of pack
`aging Semiconductor devices, and more particularly to pack
`aging light emitting diodes.
`0003 Light emitting diodes (LEDs) are often packaged
`within leadframe packages. A leadframe package typically
`includes a molded plastic body which encapsulates an LED,
`a lens portion, and thin metal leads connected to the LED
`and extending outside the plastic body. The metal leads of
`the leadframe package Serve as the conduit to Supply the
`LED with electrical power and, at the same time, may act to
`draw heat away from the LED. Heat is generated by the LED
`when power is applied to the LED to produce light. A portion
`of the leads extends out from the package body for connec
`tion to circuits external to the leadframe package.
`0004 Some of the heat generated by the LED is dissi
`pated by the plastic package body; however, most of the heat
`is drawn away from the LED via the metal components of
`the package. The metal leads are typically verythin and have
`a Small croSS Section. For this reason, capacity of the metal
`leads to remove heat from the LED is limited. This limits the
`amount of power that can be sent to the LED thereby
`limiting the amount of light that can be generated by the
`LED.
`0005 To increase the capacity of an LED package to
`dissipate heat, in one LED package design, a heat Sink Slug
`is placed under the metal leads within the LED package. The
`heat Sink Slug increases the capacity of the LED package to
`dissipate heat; however, the heat Sink Slug increases the Size,
`the mass, and the cost of the LED package. Increases in the
`size, the mass, and the cost are undesirable.
`0006. In another LED package design, the leads of the
`leadframe are extended (in various shapes and configura
`tions) beyond the immediate edge of the LED package body.
`This increases the Surface area of the portions of the leads
`exposed to the Surrounding air. The increased exposed
`Surface area of the extended leads increases the capacity of
`the LED package to dissipate heat; however, the extended
`leads increase the size, the mass, and the cost of the LED
`package.
`0007 Another undesirable aspect of the current lead
`frame package design relates to problems associated with
`thermal expansion of the package. When heat is generated,
`the LED package experiences thermal expansion. Each of
`the parts of the LED package has a different coefficient of
`thermal expansion (CTE). For example, the CTE of the
`LED, the CTE of the package body, the CTE of the leads,
`and the CTE of lens are different from each other. For this
`reason, when heated, each of these parts experience different
`
`degrees of thermal expansion resulting in mechanical
`Stresses between the parts of the package thereby adversely
`affecting its reliability.
`0008 Consequently, there remains a need for an
`improved LED package that overcomes or alleviates one or
`more of the shortcomings of the prior art packages.
`
`SUMMARY
`0009 Embodiments of the present invention provide a
`package for a Semiconductor die Such as a light emitting
`diode, the package including a Substrate having electrically
`conductive elements for connecting to a light emitting diode
`at a mounting pad, a reflector plate coupled to the Substrate
`and Substantially Surrounding the mounting pad, and lens
`Substantially covering the mounting pad.
`0010. Other embodiments of the present invention pro
`vide a Semiconductor die package which includes a bottom
`heat Sink and a top heat Sink. The bottom heat Sink may have
`traces on its top Surface. A Semiconductor chip may be
`mounted on the top Surface of the bottom heat Sink and
`electrically connected to the traces. The top heat Sink may be
`mechanically coupled to the bottom heat Sink.
`0011. In other embodiments, the bottom heat sink may
`include a thermally and electrically conductive plate having
`first and Second Surfaces. The plate may comprise a metal
`Such as copper, aluminum or alloys of either. A thin, ther
`mally conductive insulating film is formed on portions of the
`first Surface of the metal plate and may be formed on other
`Surfaces of the metal plate.
`0012 Conductive elements such as metal traces and/or
`metal leads may be formed on the ceramic/polymer film.
`Since the ceramic/polymer film is insulating, the conductive
`traces are not in electrical contact with the metal plate. The
`conductive element may form or be electrically connected to
`a mounting pad adapted to receive an electronic device Such
`as an LED.
`0013 In some embodiments, one or more via holes may
`be formed through the substrate. In some embodiments, the
`via holes may be coated internally with an insulating mate
`rial Such as the ceramic/polymer film. Electrical conductors
`Such as electrically conductive traces may be formed in the
`via holes to electrically connect conductive elements on the
`first Surface of the Substrate to conductive elements on the
`Second Surface of the Substrate.
`0014) A substrate according to embodiments of the
`present invention may also include electronic circuitry Such
`as a Zener diode and/or a resistor network connected
`between one or more conductive elements for electro-Static
`discharge (ESD) and/or over-voltage protection.
`0015. Other aspects and advantages of the present inven
`tion will become apparent from the following detailed
`description, taken in conjunction with the accompanying
`drawings, illustrating by way of example the principles of
`the invention.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`0016 FIG. 1A is a perspective view of a semiconductor
`die package according to one embodiment of the present
`invention;
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`0017 FIG. 1B is an exploded perspective view of the
`semiconductor package of FIG. 1A;
`0.018
`FIG. 2A is a top view of a portion of the semi
`conductor package of FIG. 1A;
`0019 FIG. 2B is a side view of a portion of the semi
`conductor package of FIG. 1A;
`0020 FIG. 2C is a front view of a portion of the
`semiconductor package of FIG. 1A;
`0021 FIG. 2D is a bottom view of a portion of the
`semiconductor package of FIG. 1A;
`0022 FIG. 3 is a cut-away side view of portions of the
`semiconductor package of FIG. 1A;
`0023 FIG. 4 is a side view of the semiconductor package
`of FIG. 1A with additional elements;
`0024 FIG. 5 an exploded perspective view of a semi
`conductor die package according to another embodiment of
`the present invention;
`0025 FIG. 6A is a top view of a portion of the semi
`conductor package of FIG. 5;
`0026 FIG. 6B is a side view of a portion of the semi
`conductor package of FIG. 5;
`0027 FIG. 6C is a front view of a portion of the
`semiconductor package of FIG. 5;
`0028 FIG. 6D is a bottom view of a portion of the
`semiconductor package of FIG. 5;
`0029 FIG. 7A is a top view of a portion of a semicon
`ductor package according to another embodiments of the
`present invention;
`0030 FIG. 7B is a front view of the portion of a
`semiconductor package of FIG. 7A,
`0031 FIG. 7C is a cut-away front view of the portion of
`a Semiconductor package of FIG. 7A taken along line A-A,
`0.032
`FIG. 8 is a side view of a portion of a semicon
`ductor package according to another embodiment of the
`present invention;
`0033 FIG. 9 is a side view of a portion of a semicon
`ductor package according to another embodiment of the
`present invention;
`0034 FIG. 10A is a top view of a portion of a semicon
`ductor package according to another embodiments of the
`present invention; and
`0035 FIG. 10B is a top view of a portion of a semicon
`ductor package according to anther embodiments of the
`present invention.
`
`DETAILED DESCRIPTION
`0.036 The present invention will now be described with
`reference to the FIGS. 1 through 10B, which illustrate
`various embodiments of the present invention. AS illustrated
`in the Figures, the sizes of layerS or regions are exaggerated
`for illustrative purposes and, thus, are provided to illustrate
`the general Structures of the present invention. Furthermore,
`various aspects of the present invention are described with
`reference to a layer or Structure being formed on a Substrate
`or other layer or Structure. AS will be appreciated by those
`
`of skill in the art, references to a layer being formed “on”
`another layer or Substrate contemplates that additional layers
`may intervene. References to a layer being formed on
`another layer or Substrate without an intervening layer are
`described herein as being formed “directly on the layer or
`Substrate. Furthermore, relative terms Such as beneath may
`be used herein to describe one layer or regions relationship
`to another layer or region as illustrated in the Figures. It will
`be understood that these terms are intended to encompass
`different orientations of the device in addition to the orien
`tation depicted in the Figures. For example, if the device in
`the Figures is turned over, layerS or regions described as
`“beneath” other layers or regions would now be oriented
`“above” these other layers or regions. The term “beneath” is
`intended to encompass both above and beneath in this
`Situation. Like numbers refer to like elements throughout.
`0037 As shown in the figures for the purposes of illus
`tration, embodiments of the present invention are exempli
`fied by a light emitting die package including a bottom heat
`Sink (Substrate) having traces for connecting to a light
`emitting diode at a mounting pad and a top heat Sink
`(reflector plate) Substantially Surrounding the mounting pad.
`A lens covers the mounting pad. In effect, the die package
`according to Some embodiments of the present invention
`comprises a two part heat Sink with the bottom heat Sink
`utilized (in additional to its utility for drawing and dissipat
`ing heat) as the substrate on which the LED is mounted and
`connected, and the top heat Sink utilized (in additional to its
`utility for drawing and dissipating heat) as a reflector plate
`to direct light produced by the LED. Because both the
`bottom and the top heat sinks draw heat away from the LED,
`more power can be delivered to the LED, and the LED can
`thereby produce more light.
`0038 Further, in the present invention, the die package
`itself may act as the heat sink removing heat from the LED
`and dissipating it. For this reason, the LED die package of
`the present invention may not require Separate heat Sink
`Slugs or leads that extend away from the package. Accord
`ingly, an LED die package according to the present inven
`tion may be more compact, more reliable, and less costly to
`manufacture than a die package of the prior art.
`0039 FIG. 1A is a perspective view of a semiconductor
`die package 10 according to one embodiment of the present
`invention and FIG. 1B is an exploded perspective view of
`the semiconductor package of FIG. 1A. Referring to FIGS.
`1A and 1B, the light emitting die package 10 of the present
`invention includes a bottom heat sink 20, a top heat sink 40,
`and a lens 50.
`0040. The bottom heat sink 20 is illustrated in more detail
`in FIGS. 2A through 2D. FIGS. 2A, 2B, 2C, and 2D
`provide, respectively, a top view, a side view, a front view,
`and a bottom view of the bottom heat sink 20 of FIG. 1A.
`Further, FIG. 2C also shows an LED assembly 60 in
`addition to the front view of the bottom heat sink 20. The
`LED assembly 60 is also illustrated in FIG. 1B. Referring to
`FIGS. 1A through 2D, the bottom heat sink 20 provides
`Support for electrical traces 22 and 24; for Solder pads 26,
`32, and 34; and for the LED assembly 60. For this reason,
`the bottom heat sink 20 is also referred to as a Substrate 20.
`In the Figures, to avoid clutter, only representative Solder
`pads 26, 32, and 34 are indicated with reference numbers.
`The traces 22 and 24 and the solder pads 26, 32, and 34 can
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`be fabricated using conductive material. Further, additional
`traces and connections can be fabricated on the top, Side, or
`bottom of the substrate 20, or layered within the substrate
`20. The traces 22 and 24, the solder pads 26, 32, and 34, and
`any other connections can be interconnected to each other in
`any combinations using known methods, for example via
`holes.
`0041. In some embodiments, the substrate 20 may be
`made of material having high thermal conductivity but is
`electrically insulating, for example, aluminum nitride (AIN)
`or alumina (AlO4). In other embodiments, Such as the
`embodiments described below in connection with FIGS. 7A
`through 10B, the substrate 20 may comprise a material that
`is both electrically and thermally conductive. In such
`embodiments, the metal leads, conductive traces 22 and 24,
`or both may be insulated from the substrate by means of an
`insulating film formed on portions of the Substrate as
`described in more detail below. Dimensions of the Substrate
`20 can vary widely depending on application and processes
`used to manufacture the die package 10. For example, in the
`illustrated embodiment, the Substrate 20 may have dimen
`Sions ranging from fractions of millimeters (mm) to tens of
`millimeters. Although the present invention is not limited to
`particular dimensions, one specific embodiment of the die
`package 10 of the present invention is illustrated in Figures
`having the dimensions denoted therein. All dimensions
`shown in the Figures are in millimeters (for lengths, widths,
`heights, and radii) and degrees (for angles) except as oth
`erwise designated in the Figures, in the Specification herein,
`or both.
`0042. The substrate 20 has a top surface 21, the top
`Surface 21 including the electrical traces 22 and 24. The
`traces 22 and 24 provide electrical connections from the
`Solder pads (for example top Solder pads 26) to a mounting
`pad 28. The top solder pads 26 may comprise portions of the
`traces 22 and 24 generally proximal to Sides of the Substrate
`20. The top solder pads 26 are electrically connected to side
`solder pads 32. The mounting pad 28 is a portion of the top
`Surface (including portions of the trace 22, the trace 24, or
`both) where the LED assembly 60 is mounted. Typically the
`mounting pad 28 is generally located proximal to center of
`the top Surface 21. In alternative embodiments of the present
`invention, the LED assembly 60 can be replaced by other
`Semiconductor circuits or chips.
`0043. The traces 22 and 24 provide electrical routes to
`allow the LED assembly 60 to electrically connect to the
`Solder pads 26, 32, or 34. Accordingly, Some of the traces are
`referred to as first traces 22 while other traces are referred to
`as Second traces 24. In the illustrated embodiment, the
`mounting pad 28 includes portions of both the first traces 22
`and the second traces 24. In the illustrated example, the LED
`assembly 60 is placed on the first trace 22 portion of the
`mounting pad 28 thereby making contact with the first trace
`22. In the illustrated embodiment, top of the LED assembly
`60 and the second traces 24 are connected to each other via
`a bond wire 62. Depending on the construction and orien
`tation of LED assembly 60, first traces 22 may provide
`anode (positive) connections and Second traces 24 may
`comprise cathode (negative) connections for the LED
`assembly 60 (or vice versa).
`0044) The LED assembly 60 can include additional ele
`ments. For example, in FIGS. 1B and 2C, the LED assem
`
`bly 60 is illustrated including the LED bond wire 62, an LED
`Subassembly 64, and a light emitting diode (LED) 66. Such
`LED subassembly 64 is known in the art and is illustrated for
`the purposes of discussing the invention and is not meant to
`be a limitation of the present invention. In the Figures, the
`LED assembly 60 is shown die-attached to the Substrate 20.
`In alternative embodiments, the mounting pad 28 can be
`configured to allow flip-chip attachment of the LED assem
`bly 60. Additionally, multiple LED assemblies can be
`mounted on the mounting pad 28. In alternative embodi
`ments, the LED assembly 60 can be mounted over multiple
`traces. This is especially true if flip-chip technology is used.
`004.5 The topology of the traces 22 and 24 can vary
`widely from the topology illustrated in the Figures while still
`remaining within the Scope of the present invention. In the
`Figures, three separate cathode (negative) traces 24 are
`shown to illustrate that three LED assemblies can be placed
`on the mounting pad 28, each connected to a different
`cathode (negative) trace; thus, the three LED assemblies
`may be separately electrically controllable. The traces 22
`and 24 are made of conductive material Such as gold, Silver,
`tin, or other metals. The traces 22 and 24 can have dimen
`Sions as illustrated in the Figures and having thickness in the
`order of microns or tens of microns depending on applica
`tion. For example, the traces 22 and 24 can be 15 microns
`thick. FIGS. 1A and 2A illustrate an orientation marking 27.
`Such markings can be used to identify the proper orientation
`of the die package 10 even after assembling the die package
`10. The traces 22 and 24, as illustrated, can extend from the
`mounting pad 28 to sides of the Substrate 20.
`0046 Continuing to refer to FIGS. 1A through 2D, the
`Substrate 20 defines Semi-cylindrical SpaceS 23 and quarter
`cylindrical Spaces 25 proximal to its Sides. In the Figures, to
`avoid clutter, only representative SpaceS 23 and 25 are
`indicated with reference numbers. The semi-cylindrical
`SpaceS 23 and the quarter-cylindrical spaces 25 provide
`spaces for solder to flow-through and solidify-in when the
`die package 10 is attached to a printed circuit board (PCB)
`or another apparatus (not shown) to which the die package
`10 is a component thereof. Moreover, the semi-cylindrical
`SpaceS 23 and the quarter-cylindrical spaces 25 provide
`convenient delineation and break points during the manu
`facturing process.
`0047 The substrate 20 can be manufactured as one
`individual Section of a Strip having a plurality of adjacent
`Sections, each Section being a Substrate 20. Alternatively, the
`Substrate 20 can be manufactured as one individual Section
`of an array of Sections, the array having multiple rows and
`columns of adjacent Sections. In Such configuration, the
`Semi-cylindrical SpaceS 23 and quarter-cylindrical SpaceS 25
`can be utilized as handles for the Strip or the array during the
`manufacturing process.
`0048. Further, the semi-cylindrical spaces 23 and the
`quarter-cylindrical Spaces 25, combined with Scribed
`grooves or other etchings between the Sections, assist in
`Separating each individual Substrate from the Strip or the
`wafer. The Separation can be accomplished by introducing
`physical stress to the etched lines (crossing the Semi-cylin
`drical spaces 23 and the quarter-cylindrical spaces 25) by
`bending the strip or the wafer. These features simplify the
`manufacturing process thus reducing costs by eliminating
`the need for Special carrier fixtures to handle the Strip or the
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`wafer during the manufacturing process. Further, the Semi
`cylindrical SpaceS 23 and the quarter-cylindrical SpaceS 25
`may serve as via holes connecting the top Solder pads 26, the
`side solder pads 32, and the bottom solder pads 34.
`0049. The substrate 20 has a bottom surface 29 including
`a thermal contact pad 36. The thermal contact pad can be
`fabricated using material having high heat conductivity Such
`as gold, Silver, tin, or other material including but not limited
`to precious metals.
`0050 FIG. 3 illustrates a cut-away side view of portions
`of the semiconductor package of FIGS. 1A and 1B. In
`particular, the FIG. 3 illustrates a cut-away side view of the
`top heat sink 40 and the lens 50. Referring to FIGS. 1A, 1B,
`and 3, the top heat Sink 40 is made from material having high
`thermal conductivity Such as aluminum, copper, ceramics,
`plastics, composites, or a combination of these materials. A
`high temperature, mechanically tough, dielectric material
`can be used to overcoat the traces 22 and 24 (with the
`exception of the central die-attach area) to Seal the traces 22
`and 24 and provide protection from physical and environ
`mental harm Such as Scratches and oxidation. The overcoat
`ing proceSS can be a part of the Substrate manufacturing
`process. The overcoat, when used, also insulates the Sub
`strate 20 from the top heat sink 40. The overcoat may then
`covered with a high temperature adhesive Such as thermal
`interface material manufactured by THERMOSET that
`bonds the substrate 20 with the top heat sink 40.
`0051. The top heat sink 40 may include a reflective
`surface 42 substantially surrounding the LED assembly 60
`mounted on the mounting pad 28 (of FIGS. 2A and 2C).
`The reflective surface 42 reflects portions of light from the
`LED assembly 60 as illustrated by sample light rays 63.
`Other portions of the light are not reflected by the reflective
`surface 42 as illustrated by sample light ray 61. Illustrative
`light rays 61 and 63 are not meant to represent light traces
`often use in the optical arts. For efficient reflection of the
`light, the top heat sink 40 is preferably made from material
`that can be polished, coined, or both. Alternatively, to
`achieve high reflectivity, the optical reflective Surface 42 or
`the entire heat sink 40 can be plated or deposited with high
`reflective material Such as Silver, aluminum, or another
`Substance that Serves the purpose. For this reason, the top
`heat sink 40 is also referred to as a reflector plate 40. The
`reflector plate 40 is made of material having high thermal
`conductivity if and when required by the thermal perfor
`mance of the package 10.
`0.052
`In the illustrated embodiment, the reflective surface
`42 is illustrated as a flat Surface at an angle, for example 45
`degrees, relative to the reflective plate's horizontal plane.
`The present invention is not limited to the illustrated
`embodiment. For example, the reflective surface 42 can be
`at a different angle relative to the reflective plate's horizontal
`plane. Alternatively, the reflective plate can have a parabolic
`or another shape.
`0053) The reflective plate 40 includes a ledge 44 for
`supporting and coupling with the lens 50. The LED assem
`bly 60 is encapsulated within the die package 10 (of FIGS.
`1A and 1B) using encapsulation material 46 Such as, for
`example only, Silicone. The encapsulation material 46 is
`preferably high temperature polymer with high light trans
`missivity and refractive index that matches refractive indeX
`of the lens 50.
`
`0054 The lens 50 is made from material having high
`light transmissivity Such as, for example only, glass, quartz,
`high temperature plastic, or a combination of these materi
`als. The lens 50 may be placed in contact with the encap
`Sulation material 46. Consequently, as the die package 10 is
`heated and experiences thermal expansion, the lens 50 may
`be cushioned by the encapsulation material 46 such that the
`lens 50 may be protected from mechanical Stresses arising
`from thermal expansion of other parts of the die package 10.
`In some embodiments, the lens 50 defines a shallow trough
`52 which can be filled with optical chemicals, for example,
`phosphors, light diffusants Such as calcium carbonate, center
`frequency shifting material Such as fluorescent material, or
`a combination of these materials.
`0055 FIG. 4 illustrates the die package 10 coupled to an
`external heat sink 70. Referring to FIG. 4, the thermal
`contact pad 36 can be attached to the external heat sink 70
`using epoxy, Solder, or any other thermally conductive
`adhesive, electrically conductive adhesive, or thermally and
`electrically conductive adhesive 74. The external heat sink
`70 can be a printed circuit board (PCB) or other structure
`that draws heat from the die package 10. The external heat
`Sink can include circuit elements (not shown) or heat dissi
`pation fins 72 in various configurations.
`0056 An embodiment of the invention having certain
`alternate configuration is shown in FIGS. 5 through 6D.
`Portions of this second embodiment are similar to corre
`sponding portions of the first embodiment illustrated in
`FIGS. 1A through 4. For convenience, portions of the
`second embodiment as illustrated in FIGS. 5 through 6D
`that are Similar to portions of the first embodiment are
`assigned the same reference numerals, analogous but
`changed portions are assigned the same reference numerals
`accompanied by letter "a, and different portions are
`assigned different reference numerals.
`0057 FIG. 5 is an exploded perspective view of an LED
`die package 10a in accordance with other embodiments of
`the present invention. Referring to FIG. 5, the light emitting
`die package 10a of the present invention includes a bottom
`heat Sink (Substrate) 20a, a top heat Sink (reflector plate)
`40a, and a lens 50.
`0.058 FIGS. 6A, 6B, 6C, and 6D, provide, respectively,
`a top view, a side view a front view, and a bottom view of
`the substrate 20a of FIG. 5. Referring to FIGS. 5 through
`6D, in the illustrated embodiment, the Substrate 20a includes
`one positive trace 22a and four negative traces 24a. These
`traces 22a and 24a have are configured differently than the
`traces 22 and 24 of FIG. 2A. The Substrate 20a includes
`flanges 31 that define latch spaces 33 for reception of legs 35
`of the reflector plate 40a thereby mechanically engaging the
`reflector plate 40a with the substrate 20a.
`0059) Other embodiments of the invention are illustrated
`in FIGS. 7A through 10B. According to these embodi
`ments, a Substrate for a high power light emitting device
`includes a thermally and electrically conductive plate having
`first and Second Surfaces. The plate may comprise a metal
`Such as copper, aluminum or alloys of either. A thin, ther
`mally conductive insulating film is formed on the first
`Surface of the metal plate. In Some embodiments, the ther
`mally conductive insulating film comprises a ceramic/poly
`mer film Such as the Thermal Clad film available from by
`The Bergquist Company of Chanhassen, Minn., USA.
`
`Nichia Exhibit 1015
`Page 14
`
`

`

`US 2004/0079957 A1
`
`Apr. 29, 2004
`
`0060 Conductive elements such as metal traces and/or
`metal leads may be formed on the ceramic/polymer film.
`Since the ceramic/polymer film is insulating, the conductive
`traces are not in electrical contact with the metal plate. A
`conductive element may form or be electrically connected to
`a mounting pad adapted to receive an electronic device. AS
`discussed above in connection with the embodiments illus
`trated in FIGS. 1-6, the topology of the metal traces may
`vary widely while still remaining within the scope of the
`invention.
`0061 An LED assembly may be bonded to the mounting
`pad for example by means of Soldering, thermoSonic bond
`ing or thermocompression bonding. Heat generated by the
`LED may be dissipated at least in part through the metal
`plate. Since the Substrate itself may act as a heatsink, the
`need for bonding an additional heatsink to the Structure may
`be reduced or eliminated. However, an additional heatsink
`may be placed in thermal communication with the metal
`plate So that heat may be drawn away from the operating
`device more efficiently.
`0.062. In one embodiment, one or more via holes may be
`formed through the insulating film and the metal plate. The
`via holes may be internally coated with an insulating mate
`rial Such as the ceramic/polymer film. Electrical conductors
`Such as electrically conductive traces may be formed in the
`via and may electrically connect conductive elements on the
`first Surface of the SubStrate to conductive elements on the
`Second Surface of the Substrate. A Substrate according to
`Such an embodiment may be mounted on a Surface Such as
`a printed circuit board without the use of metal leads, which
`may result in a more mechanically robust package.
`0.063 A Substrate according to embodiments of the
`present invention may also include electronic circuitry Such
`as a discrete Zener diode and/or a resistor network for
`electrostatic discharge (ESD) and/or over-Voltage protec
`tion.
`0064. Although not illustrated in FIGS. 7-10, the sub
`Strate may further include features Such as the Semi-cylin
`drical and quarter-cylindrical Spaces, orientation markings,
`Side bond pads, flanges and other features illustrated in
`FIGS. 1-6.
`0065 Portions of the embodiments illustrated in FIGS.
`7A through 10B are similar to corresponding portions of the
`embodiments illustrated in FIGS. 1 through 6D. For con
`venience, portions of the embodiment as illustrated in FIGS.
`7A through 10B that are similar to portions of the first
`embodiment are assigned the same reference n