`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`SHARP CORPORATION, SHARP ELECTRONICS CORPORATION, and
`SHARP ELECTRONICS MANUFACTURING COMPANY OF AMERICA, INC.,
`Pelitioners
`
`v.
`
`SURPASS TECH INNOVATION LLC,
`Patent Owner
`
`Case IPR2015-:-:-::c:-::(cid:173)
`Patent No. 7,420,550
`
`DECLARATION OF MICHAEL J. MARENTIC IN SUPPORT OF PETITION FOR INTER
`PARTES REVIEW OF U.S. PATENT NO. 7,420,550
`
`60032 1.1
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`1
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`SHARP EXHIBIT 1007
`Page 1 of 76
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`
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`1.
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`I, Michael J. Marentic, make this declaration in connection with the Petition for
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`Inter Partes Review submitted by Sharp Corporation, Sharp Electronics Corporation, and
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`Sharp Electronics Manufacturing Company of America, Inc. (collectively "Petitioners" or
`
`"Sharp") for review of Claims 1 through 5 of U.S. Patent No. 7,420,550 to Yuh-Ren et al.
`
`("the '550 Patent"), which is assigned to Surpass Tech Innovation LLC ("Patent Owner' or
`
`"Surpass").
`
`2.
`
`Throughout this declaration, I refer to exhibit numbers that correspond to the
`
`exhibits to the Petition for Inter Partes Review for which I provide this declaration.
`
`Scope of My Assignment
`
`3.
`
`I have been requested by counsel for Sharp to study the '550 Patent,
`
`including its claims and prosecution history, as well as the references specifically referred to
`
`in this declaration. I have also been requested by counsel for Sharp to provide my expert
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`opinion regarding the invalidity of Claims 1-5 of the '550 Patent. I further expect to offer an
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`additional declaration in response to any declaration submitted by any expert for the Patent
`
`Owner.
`
`Summary of My Opinions
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`4.
`
`It is my opinion that Claims 1-3 of the '550 Patent are invalid as anticipated
`
`under 35 U.S.C.§ 1 02(b) and Claims 4-5 are obvious to a person of ordinary skill in the art
`
`under 35 U.S.C. §103(a). Moreover, it is my opinion that in addition to being anticipated,
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`Claims 1-3 are also rendered obvious over prior art.
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`2
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`5.
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`Specifically, I believe that the following are grounds to find Claims 1-5 of the
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`'550 Patent invalid:
`
`a. Claims 1-3 are invalid under 35 U.S.C. § 102(b) as anticipated by Japanese
`
`Patent Application Publication No. H08-305322 (Ex. 1002, "the Sharp
`
`Reference").
`
`b. Claims 1-3 and 5 are also invalid under 35 U.S.C. § 103(a) as obvious over
`
`the Sharp Reference.
`
`c. Claims 1-5 are also invalid under 35 U.S.C. § 103(a) as obvious over the
`
`Sharp Reference in view of U.S. Patent No. 6,407,795 to Kamizono, et al. (Ex.
`
`1004, "Kamizono").
`
`d. Claims 1-5 are also invalid under 35 U.S.C. § 103(a) as obvious over U.S.
`
`Patent No. 6,081 ,250 to Shimada et al. (Ex. 1003, "Shimada") in view of
`
`Kamizono.
`
`Summary of My Professional Background and Qualifications
`
`6.
`
`Exhibit 1008 is my curriculum vitae which sets forth my professional
`
`background and qualifications. A list of publications that I have authored or co-authored is
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`included.
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`7.
`
`I have many years of experience in the flat panel display industry. I first
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`became involved in the flat panel display industry in 1973, when I began working at the
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`University of Illinois Coordinated Science Laboratories where the AC Plasma Display Panel
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`600321 .1
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`3
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`("PDP") was invented. During my studies at the University, I was employed as an intern
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`working in the area of plasma display construction and gas discharge physics
`
`characterization. I received a B.S. degree in Engineering Physics from the University of
`
`Illinois.
`
`8.
`
`Upon entering graduate school, I continued my work on the characterization
`
`of the gas discharge in the pixels. I received an M.S. degree in Electrical Engineering from
`
`the University of Illinois, and wrote my master's thesis on measuring the electron density in
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`an AC PDP.
`
`9.
`
`One of my engineering positions was with Interstate Electronics Corporation
`
`(IEC) as a design electrical engineer. IEC designed drive electron ics, mechanically
`
`packaged the display modules, and incorporated them into terminals for harsh, military
`
`environments. I designed several distinct versions of drive electronics for POPs, including
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`one using packaged silicon integrated circuits on flexible circuits, or "chip-on-flex." During
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`th is time, I was awarded several patents relating to PDP technologies. I also investigated
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`LCDs and thin film electroluminescent displays for incorporation into military applications.
`
`10.
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`I later formed Plasma Displays, Inc., a single proprietorship consulting
`
`corporation. I worked for several clients, one being Bell Laboratories and AT&T at their joint
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`Reading, Pennsylvania facility. This facility was where the original picture phone was
`
`developed, the first commercial light emitting diodes ("LEOs") were manufactured, and
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`4
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`AT&T's POPs were developed and manufactured.
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`I worked on PDP drive electronic design,
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`driver-to-panel interconnect reliability, driver circuit characterization, and yield improvement.
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`11.
`
`I was a founder and Vice President of Plasmaco, a company that acquired
`
`IBM's PDP production line in New York. Plasmaco manufactured several types of POPs,
`
`including VGA panels with 640x480 pixels for early notebook computers. Such a panel had
`
`5 driver ICs with 32 outputs per driver for 640 data lines. I also developed larger sized VGA
`
`panels with 1280x1 024 pixels. Because of the increase in size, we used the same type of
`
`driver IC chips but doubled the number of driver ICs (i.e., using 10 driver ICs) in the display.
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`When changing the panel design to increase the size of the panel and/or the nu mber of
`
`pixels, it was a common practice to keep the same type of driver Ie as the smaller panel,
`
`but it was necessary to increase the number of driver ICs to accommodate the added pixels
`
`in the larger display.
`
`12. While at Plasmaco, I also developed and manufactured driver chip-on-glass
`
`("COG") technology that passed extreme militarized environmental testing specifications.
`
`COG technology put electrode driver integrated circuits onto the glass edges of the PDP.
`
`The benefits of using COG technology were that it reduced the physical size and weight of a
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`notebook computer display and increased the operational reliability of the display.
`
`13.
`
`At Science Applications International Corporation, I worked on efficient
`
`backlights for LCOs, some for direct viewing in sunlight. Commercially available LCOs were
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`disassembled and repackaged with these backlights. The finished displays were used in
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`cockpit avionics, medical, banking, and FAA towers.
`
`14.
`
`At Hitachi, from 1995 to 1999, I managed a technology center that developed
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`technologies relating to the interface between the motherboard and the LCD driver chips for
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`flat panel monitors and notebook displays. I reported directly to the LCD design and
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`manufacturing center in Japan. I had access to future LCD technical details and
`
`specifications, and facilitated technology transfer between Silicon Valley firms and Japan
`
`management. The Video Electronics Standards Association ("VESA") writes and publishes
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`video standards for the electrical interfacing for displays. I was the chairman of the VESA
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`flat panel display committee, a member of the board of directors, and later the president of
`
`the board of directors.
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`15. While at Philips, from 1999 to 2001 , I managed a group of engineers that
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`designed electronics for flat panel displays. My group designed interface timing ICs and
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`video processing circuit boards for monitors and televisions utilizing LCOs. My group also
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`worked with an IC design firm to develop the design of source and gate driver ICs for
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`enhanced performance LCOs having various sizes. The enhanced performance LCOs were
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`developed to provide high brightness and used multiple driver ICs, as well as the COG
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`technology.
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`16.
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`Philips invested in a tiled LCD display company, and I participated in the
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`technology development using Philips panels. My group designed circuits and assisted with
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`their inoorporation into commercial products within Philips' worldwide subsidiaries.
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`17.
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`Philips purchased the LCD factory of the Korean company LG, and later
`
`formed a joint ventu re called LG-Philips LCD. I was a member of the group of technical
`
`advisors that performed the due diligence for Philips for the purchase.
`
`18.
`
`At Alien Technology, I was a member of the integrated design team that
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`produced custom drivers made for cholesteric LCD displays, organic LEOs, and polymer
`
`dispersed LCOs. My responsibilities were IC product definition for the drivers and system
`
`architecture. Driver ICs were fabricated at silicon foundries and formed into small die for
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`mass assembly utilizing Alien's fluidic assembly onto flexible, very low cost displays. Since
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`Alien's products were very small sized, low cost LCOs, they typically involved only a single
`
`source driver and a single gate driver, whereas the larger sized LCD panels that I worked
`
`on while at Hitachi and Philips had multiple source and gate drivers.
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`19.
`
`I am the named inventor or co-inventor on three U.S. patents in the PDP field.
`
`Materials Considered
`
`20.
`
`In forming my opinions, I reviewed the following documents referenced by
`
`their exhibit number in the Petition for Inter Partes Review of the '550 Patent:
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`600321.1
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`7
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`Page 7 of 76
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`
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`EXHIBIT NO.
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`DESCRIPTION
`
`1001
`
`U.S. Patent No. 7,420.550 to Shen et al. ("'550 Patent")
`
`1002
`
`Japanese Patent Application Publication No. H08-305322 and
`Certified English Translation Thereof ("Sharp Reference")
`
`1003
`
`U.S. Patent No. 6,081 ,250 to Shimada et al. ("Shimada")
`
`1004
`
`U.S. Patent No. 6,407,795 to Kamizono et al. ("Kamizono")
`
`1005
`
`Prosecution History of U.S. Appl. No. 10/929,473
`
`1006
`
`U.S. Patent No. 5,805,128 to Kim et al. ("Kim")
`
`1009
`
`U.S. Patent Application Publication No. US 2003/0048249 A 1 to
`Sekido et al. ("Sekido")
`
`21.
`
`I also base this declaration on my knowledge from my 30 years of experience
`
`working on liquid crystal display (LCD) and related technologies.
`
`22.
`
`I reserve the right to amend or supplement this declaration based upon any
`
`reports by any expert(s) for the Patent Owner, or any new documents and/or other
`
`information that becomes available.
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`Compensation
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`23.
`
`I am being compensated at my consulting rate of $250 per hour for my time
`
`spent in connection with this case. I am being separately reimbursed for any out-of-pocket
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`600321.1
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`8
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`Page 8 of 76
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`expenses. No part of my compensation is dependent upon the outcome of this proceeding
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`or the nature of the opinions that I express.
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`Legal Standards
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`24.
`
`To render my invalidity analysis, I have been informed about the legal
`
`standards for patent invalidity in inter partes review proceedings before the Patent Trial and
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`Appeal Board.
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`25.
`
`Specifically, I understand that the petitioner must prove patent invalidity by a
`
`"preponderance of the evidence," that there is no "presumption of validity" in inter partes
`
`review proceedings, and that claims are to be given their "broadest reasonable" construction
`
`in light of the specification as would be read by a person of ordinary skill in the art.
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`26.
`
`I also understand that a patent claim may be invalidated as anticipated if a
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`single prior art reference discloses, either expressly or inherently, each and every element
`
`of the patent claim.
`
`27.
`
`I also understand that a patent claim may be invalidated by one or more
`
`references, either alone or in combination, as being "obvious" to a person of ordinary skill in
`
`the art at the time the invention was made.
`
`28.
`
`I understand that one way of demonstrating obviousness in the situation
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`where a prior art reference discloses a single element but the claim requires multiple
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`elements is to demonstrate that there are no new and unexpected results from increasing
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`the number of such elements.
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`600321.1
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`29.
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`I further understand thai an additional way of demonstrating obviousness is to
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`demonstrate that one or more items of prior art either alone or in combination, contain all of
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`the elements of a claim.
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`30.
`
`It is my understanding that in considering the issue of obviousness, I should
`
`consider what a person of ordinary skill in the pertinent art would have known at the time of
`
`the invention, as well as what such a person would have reasonably expected to have been
`
`able to do in view of that knowledge.
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`31.
`
`I understand that in analyzing the issue of obviousness, I should consider and
`
`determine: (1) the scope and content of the prior art; (2) the differences between the prior
`
`art and the claims at issue; and (3) the level of ordinary skill in the pertinent art.
`
`32.
`
`I further understand that any of the following may provide a "reason" for
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`combining elements known in the prior art: (a) a need or problem known in the field at the
`
`time of invention and addressed by the patent; (b) an obvious use of familiar elements
`
`beyond their primary purposes; (c) a design need or market pressure to solve a problem; (d)
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`a simple substitution of one known element for another that would provide predictable
`
`results; (e) the use of known techniques to improve similar methods or products in the same
`
`way; or (D some teaching, suggestion, or motivation in the prior art that would have led one
`
`of ordinary skill to modify the prior art reference or to combine prior art reference teachings
`
`to arrive at the claimed invention .
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`33.
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`I also understand that claims may be invalid if they are directed to obvious
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`design choices. Specifically, I understand that a patent claim that simply arranges old
`
`elements with each performing the same function it had been known to perform is not
`
`patentable. The combination of familiar elements according to known methods is likely to
`
`be obvious when it does no more than yield predictable results.
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`34.
`
`I also understand that certain "secondary considerations" of non-obviousness
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`may be considered, to the extent that they exist. It is my understanding that such
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`secondary considerations include, among others: (a) commercial success; (b) long felt but
`
`unsolved needs; and (c) the failure of others.
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`I understand that there must be some
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`connection to the secondary considerations and the claimed invention. I reserve my right to
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`address any evidence or opinions the patent owner may submit on this issue.
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`THE '550 PATENT
`
`35.
`
`I understand that the application leading to the '550 Patent was U.S. Patent
`
`Application No. 10/929,473, which was filed on August 31,2004. For the purposes of my
`
`analysis, I assume that the time of the purported invention was August 31 , 2004.
`
`36.
`
`The '550 Patent relates to an active matrix liquid crystal display (LCD) device
`
`and driving circuit for the LCD device. In particular, the '550 Patent describes a specific way
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`of connecting the gate and data lines to the thin film transistors (TFTs) driving pixels in an
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`LCD panel.
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`11
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`LCD Panels and Driving Devices Were Known in the Prior Art
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`37.
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`As acknowledged in the '550 Patent, active matrix LCD panels and the use of
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`data and gate lines, or source and gate drivers for TFTs in LCD panels were all known in
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`prior art. (Ex. 1001, '550 Patent, Col. 1 :23-61 , Figs. 1A-18).
`
`38.
`
`As shown below by multiple shaded blocks in annotated Figure 1A of the '550
`
`Patent, the "Prior Art" driving circuit for LCD panels included multiple source drivers 11 and
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`multiple gate drivers 12. (Id. at Fig. 1A). The source drivers 11 (purple boxes) provide
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`image signals (i.e., video signals) to an LCD panel 10 through a plurality of data lines 111
`
`(purple lines), while the gate drivers 12 (orange boxes) provide scanning signals (i.e.,
`
`control signals) to the LCD panel 10 through a plurality of gate lines 121 (orange lines).
`
`Source Drivers
`Source driver
`I
`
`""l-H--
`
`-H---+f---I Line.
`
`0111
`lines
`Fig.IA (Prior Art )
`
`Glle LIne
`
`Oala
`LIne
`
`/
`ata
`LIne
`
`Fig. IB (Prior Art)
`
`39.
`
`As shown above in Figure 1A, prior art LCD panels included data lines 111
`
`and gate lines 121 arranged in a matrix array.
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`40.
`
`According to the '550 Patent, the data lines 111 and gate lines 121 in the
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`"Prior Art" shown in Figures 1 A and 1 B are "insulated with each other." (Ex. 1001, '550
`
`Patent, Col. 1 :45-47).
`
`41.
`
`As shown above in Figure 1 B, a pixel 13 in this prior art LCD panel is formed
`
`within each area enclosed by intersecting data lines (e.g., purple line 0,) and gate lines
`
`(e.g., orange line G,).
`
`42.
`
`As the '550 Patent acknowledges, each pixel 13 in prior art LCD panel
`
`included a thin film transistor Q, (TFT, highlighted in yellow), which is switched on and off by
`
`a control signal from the gate driver 12 through a gate line G,.
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`43.
`
`The source of the TFT Q, receives the image signal sent from the source
`
`driver 11 through the data line 0 ,. An output voltage from the TFT Q, drives liquid crystal
`
`molecules corresponding to the pixel 13 to form an image. (Id. at Col. 1:45-57, Fig. lB).
`
`44.
`
`The time that an LCD needs to react to the driving voltage output by each
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`TFT is called "response time," and the video quality of an LCD panel is dependent on this
`
`response time. In this regard, the video quality may be poor if the LCD response time is too
`
`long. (Id. at Cols. 1 :62-2:41).
`
`The Alleged Invention of the '550 Patent
`
`45.
`
`According to the '550 Patent, its "chief object" is to provide an LCD driving
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`circuit having a matrix structure in which the gate and data lines are connected to the TFTs
`
`in a specific way that allegedly increases "the response speed" of the LCD. (Id. at Col.
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`60032 1.1
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`13
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`Page 13 of 76
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`
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`3:18-20,35-40). This configuration is shown in, for example, Figure 4B, which is
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`reproduced below.
`
`'550 Patent Fig. 4B
`
`----,
`C~
`CS
`I
`L~S7J
`
`R2
`
`R3
`
`----::I
`1:C
`~s
`I
`L_~~J
`
`C2
`
`C3
`
`C1
`
`46.
`
`As shown above in annotated Figure 4B, the driving device includes a matrix
`
`array formed from rows (R1-R3) and columns (C1-C3) of TFTs (Q). Each TFT in the matrix
`
`is associated with a pixel (represented by the dashed rectangles). The driving device
`
`further includes a certain number ("N") of gate lines G; (i=1, 2, ... N), and a certain number
`
`("M") of groups (e.g., pairs) of data lines OJ and OJ' G, j'=(1, 1 '), (2, 2'), ... (M, M'l). For
`
`600321 1
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`example, as shown in Figure 4B above, the driving device has three gate lines, G
`"
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`G2, and
`
`G3, and two groups of data lines ((0" Dr ) and (02, D,.)).
`
`47.
`
`As shown in Figures 4A, 5A, and 6A, the '550 Patent describes a source
`
`driver with a limit of 60 Hz but provides no further explanation or specification. Absent in
`
`the '550 Patent is the number of drive channels or outputs per source driver and matrix size.
`
`One would calculate the number of required driver ICs by dividing the horizontal pixel count
`
`by the number of drive channels per data driver. The driving device shown in Figure 4A
`
`uses 60 Hz source drivers; it doubles the normal calculated number of source drivers and
`
`mounts them on a single glass panel edge. The driving device shown in Figure 5A also
`
`uses 60 Hz source drivers; it again doubles the normal calculated number of data drivers,
`
`but mounts them on both the top and bottom edges of the panel with an interdigitated
`
`column connection. The driving device shown in Figure 6A uses 120 Hz or faster source
`
`drivers, mounted on one panel edge, and then adds dual switches to each output channel
`
`for driving the paired data electrodes.
`
`48.
`
`The '550 Patent does not discuss the benefits or reasons for including a
`
`single source driver and a single gate driver on the one hand, and having a set of multiple
`
`source and gate drivers on the other hand.
`
`49. Multiple source and gate drivers were commonly used in the prior art,
`
`particularly LCD panels as they increased in screen size. In fact, when I was in the LCD
`
`industry before the filing date of the '550 Patent, it was a common practice to change the
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`panel design to increase the size of the panel and/or the number of pixels by simply adding
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`more driver ICs. For example, while the small, low cost LCD panel (which had an
`
`equivalent pixel dimension of 7x4) that I worked on at Alien Technology had only a single
`
`source driver and a single gate driver, all the large sized LCD panels (which had pixel
`
`dimension of at least 800x600) that I worked on at Philips had multiple driver ICs.
`
`50.
`
`Consistent with my experience, U.S. Patent Application Publication No. US
`
`2003/0048249 A1 to Sekido et al. (Ex. 1009, "Sekido"), which was published on March 13,
`
`2003, states that "in order to drive many gate bus lines and the source bus lines on the
`
`display circuit board, a plurality of the gate drivers and source drivers must be
`
`connected to the area around the liquid crystal display panel." (Par. [0006]) (emphasis
`
`added). Sekido further teaches that increasing the size of the LCD screen will increase the
`
`number of driver ICs in the panel. (Par. [0008]). Other prior art references discussed below
`
`also teach the use of multiple source and gate drivers for a large sized or high resolution
`
`LCD panel.
`
`51.
`
`As shown above in Figure 48, the gate line G;(e.g., G" G" and G,) in each
`
`row is connected to the gates of each TFT in that row. However, for each column, the first
`
`and second data lines OJ and Dr that form a group of data lines are not connected to all
`
`TFTs in that column. Instead, the first data line OJ in each column is connected only to the
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`sources of the TFTs in the odd rows (see the red boxes in R1, R3, etc.) of that column,
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`while the second data line Or in the same column is connected only to the sources of the
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`TFTs in the even rows (see the green box in R2) that column. (ld. at Col. 8: 1 0-31).
`
`52.
`
`For example, referring to the first group of data lines 0, and Or (see the red
`
`and green lines) in first column (C1) of Figure 4B above, the first data line 0, (see the red
`
`line) is connected to the sources (red dots) of the TFTs in the first and third rows (red boxes
`
`in R1 and R3 of the first column C1), while the second data line Odgreen line) is connected
`
`to the source (green dot) of the TFT in the second row (green box in R2 of the first column
`
`C1). Similarly, for the second pair of data lines (i.e., 0, and 0,.) in the second column, the
`
`first data line (i.e., 0,) is connected to the sources of the TFTs in the first and third rows (i.e.,
`
`R1 and R3 of the second column C2), while the second data line 0,· is connected to the
`
`source of the TFT in the second row (i.e., R2 of the second column C2).
`
`53.
`
`According to the '550 Patent, this alternating connection with the Odd
`
`Row/Even Row ("Odd Row/Even Row" configuration) reduces the response time of the LCO
`
`panel. (ld. at Col. 3:35-40). However, the '550 Patent does not explain how this reduction
`
`occurs.
`
`54.
`
`The gate lines are connected to the gate driver are "insulated with each other;"
`
`and the data lines are connected to the source driver and are "insulated with each other."
`
`(Ex. 1001, '550 Patent, Col. 8:20-22, Col. 8:29-31). The '550 Patent goes on to explain that
`
`a space is provided between the neighboring data lines (e.g., Or and 0,) to prevent them
`
`from short circuiting. (Ex. 1001 , '550 Patent, Col. 8:31-36, Fig. 4C).
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`55.
`
`As shown below in annotated Figure 6A, the first and second data lines 0,
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`and Of (e.g., red and green lines 01 and 01') in each group (i.e., pair) of data lines are
`
`connected to the same source driver (purple box), and data is transferred to these data lines
`
`by an electronic switch S (highlighted in yellow). (Id. at Col. 5:4-8, Col. 8:50-52).
`
`'550 Patent Fig. 6A
`
`Source driver (120 Hz or 180 Hz . .. )
`
`Source Driver
`
`• ••
`•••
`~ S •••
`
`~~~~=
`UJlIU, r, Dz
`
`1st 2nd
`Data Data
`Line Line
`
`56.
`
`In addition, all of the source drivers are installed on the same side (e.g., upper
`
`side) of the LCD panel. (See also id. at Fig. 4A, Col. 8:37-38). The '550 Patent
`
`acknowledges that these components were arranged in the exact same way in the "Prior Art"
`
`in Figure 1A. (Id. at Col. 1 :36-45, Fig. 1A).
`
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`18
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`
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`57.
`
`The '550 Patent also states that the gate driver can be "a chip on glass or an
`
`integrated gate driver circuit on glass." (Id. at Col. 8:53-54). However, the '550 Patent does
`
`not define either of these terms, nor does it explain the difference between "a chip on glass"
`
`and "an integrated gate driver circuit on glass."
`
`PROSECUTION HISTORY OF THE '550 PATENT
`
`58.
`
`I understand that as originally filed, the application for the '550 Patent
`
`included claims directed to six different embodiments described in the '550 Patent. I also
`
`understand that, in response to a "Restriction Requirement" (Ex. 1005, p. 122), only the
`
`claims directed to the "First Embodiment" (i.e., "Species I; Figures 4A-4C") (Id. at p. 127)
`
`were elected and the claims directed to the other embodiments were canceled.
`
`59.
`
`I understand that during prosecution, the application claim corresponding to
`
`Claim 1 of the '550 Patent was rejected as anticipated by U.S. Patent No. 5,805,128 to Kim
`
`et al. (Ex. 1006, "Kim"). (See Ex. 1005, p. 141). This application claim was identical to
`
`Claim 1, except that it did not include the last element of Claim 1, namely "the first data lines
`
`and the second data lines of each group of data lines are connected with the same source
`
`driver." (See id. at pp. 31 , 152).
`
`60.
`
`As shown below, annotated Figure 5 of Kim shows an LCD driving device of
`
`matrix structure type including the Odd Row/Even Row configuration, gate lines 3
`
`connected to a gate driver 16, first data lines 10 connected to a data driver 8 on the bottom,
`
`and second data lines 14 connected to a data driver 12 on the top. (Ex. 1006, Kim, Col.
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`600321.1
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`19
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`Page 19 of 76
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`
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`3:26-37, Col. 4:28-51, FIG. 5). I note that Figure 5 of Kim shows the Odd Row/Even Row
`
`configuration that is virtually identical to the one shown in Figures 5A and 58 of the '550
`
`Patent.
`
`Kim Fig. 5
`
`Source Driver
`
`- 14
`
`- 14
`
`12
`
`f-- 10
`c-
`
`Iv +
`r
`-
`
`r
`16
`, j - -~
`
`r-
`
`r
`
`r-
`
`r
`
`r-
`
`V +
`V +
`- ILF
`- It!
`V
`-
`r
`hf~ V~ V +
`-
`-
`r
`- ILF
`- ILF
`-
`
`l
`
`6
`
`lOJ
`~ +
`
`F
`
`f
`
`e Gat
`Drive
`r - .
`16
`
`r
`"V~
`-
`
`~
`
`......
`
`I
`
`~
`
`V
`
`Source Dnver
`
`/- 8
`
`61.
`
`In the prosecution history. I did not find any argument by the applicants
`
`disputing the Examiner's position that Kim disclosed all elements of the rejected claim,
`
`including the Odd Row/Even Row configuration and gate driver.§. Rather, the applicants
`
`distinguished the rejected claim over Kim by including an additional claim limitation, namely
`
`that "the first data lines and the second data lines of each group of data lines are connected
`
`with the same source driver." (Ex. 1005, pp. 152, 156). The claim was subsequently
`
`allowed by the Examiner.
`
`600321 1
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`20
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`
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`62.
`
`Even though Figure 5 of Kim does not disclose "the same source driver"
`
`limitation, the technique of connecting first and second data lines of each group of data lines
`
`with the same source driver in an LCD device was well known in the prior art, including the
`
`Sharp Reference and Shimada as discussed below. I understand that none of the Sharp
`
`Reference, Shimada, and Kamizono referred to in this declaration was considered by the
`
`Examiner during prosecution of the '550 Patent.
`
`CLAIM CONSTRUCTION
`
`63.
`
`I understand that in inter partes review proceedings, patent claims are to be
`
`given their "broadest reasonable" construction in light of the specification as would be read
`
`by a person of ordinary skill in the art.
`
`64.
`
`Most of the terms of Claims 1-5 of the '550 Patent are clear to me, except for
`
`the following terms.
`
`"The first and the second date lines of the first group of date lines"
`
`65.
`
`Independent Claims 1 and 2 each recite that "the first and the second date
`
`lines of the first group of date lines are respectively connected with the sources of all the
`
`thin film transistors of the odd and the even rows of the first column ... . " (Ex. 1001 , '550
`
`Patent, Col. 19:52-56, Col. 20:13-17) (emphasis added). Nowhere else in the '550 Patent is
`
`there any mention or discussion of "date lines." I believe that the term "date lines" in this
`
`claim recitation is meant to be "data lines."
`
`60032 1.1
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`21
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`Page 21 of 76
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`
`
`"Gate lines ... insulated with each other" and "data lines ... insulated with each
`other"
`
`66.
`
`Independent Claims 1 and 2 each recite "a group of N gate lines ...
`
`insulated with each other" and "M groups of data lines ... insulated with each other."
`
`(Ex. 1001. '550 Patent, Col. 19:44-45, 51-52, Col. 20:5-6,12-13) (emphasis added). The
`
`'550 Patent does not explain what "insulated with each other" means. Rather, the
`
`specification uses the same phrase "insulated with each other" when describing the data
`
`lines 111 and gate lines 121 shown in the "Prior Art" in Figures lA and 1 B of the '550 Patent
`
`(id. at Col. 1:45-47), as well as the data lines (D" D,., D" D,·) and the gate lines (G" G" G3)
`
`shown in Figures 4A-4C of the First Embodiment. (Id. at Col. 8:20-22, 29-31).
`
`67.
`
`I believe that "insulated with each other" means "spaced apart from and
`
`parallel to each other." This is consistent with Figures 1 A-I B of the "Prior Art" in the '550
`
`Patent, which show that the data lines 111 are spaced apart from and parallel to each other
`
`(thereby "insulated with each other") and the gate lines 121 are likewise spaced apart from
`
`and parallel to each other (thereby "insulated with each other"). This is also consistent with
`
`all of the figures that describe the First Embodiment of the '550 Patent (e.g., Figs 4A-4C,
`
`5A-5B, 6A-6B), which also show that the data lines (e.g., D" D,., D" D,) are spaced apart
`
`from and parallel to each other (thereby "insulated with each other"), and the gate lines (e.g.,
`
`G" G" G3) are spaced apart from and parallel to each other (thereby "insulated with each
`
`other").
`
`600321 .1
`
`22
`
`Page 22 of 76
`
`
`
`"the gate drivers" and the "source drivers"
`
`68.
`
`Independent Claims 1 and 2 refer 10 "gate lines oonnected to the gate drivers"
`
`and "data lines connected to the source drivers." However, Ihe term "source driver" is not
`
`mentioned in the specification of the '550 Patenl. Ralher, the specification refers to "data
`
`drivers."
`
`69.
`
`Using the broadest reasonable construction, I believe that a person of
`
`ordinary skill in the art would construe these terms as written in the plural form, that is, "the
`
`gate drivers" refer to more than one gate driver and "the source drivers" refer to more than
`
`one source driver.
`
`70. However, the specification, drawings, and prosecution history of the '550
`
`Patent use the terms "source drivers" and "gale drivers" to cover a variety of driving circuits
`
`and configurations known at the time of Ihe invenlion. These are discussed below:
`
`1.
`
`"Gate Drivers" and "Source Drivers" May Refer to Multiple
`Driving Circuits
`
`71.
`
`In the certain figures in the '550 Palent, Ihe "gate drivers" and "source drivers"
`
`are used to refer to multiple driving circuils, as shown in Ihe "Prior Art" (e.g., Fig. 1 A of the
`
`'550 Patent). As shown in Figure 1 A, the "gale driver" and "source driver" each comprise
`
`multiple driver circuits (e.g., integrate circuit (lC) chips in the purple and orange boxes).
`
`600321.1
`
`23
`
`Page 23 of 76
`
`
`
`Source Drivers
`1l
`$ourc:a 4r1w-r
`
`+1---+--4--; Unes
`
`Fig. IA (Prior Art)
`
`72.
`
`At the time that the '550 Patent was filed, it was widely known that such
`
`drivers could be implemented using multiple IC chips. Specifically, as LCD displays
`
`increase in size with the increased number of pixels, the number of gate lines and data lines
`
`likewise increases. However, it becomes difficult, from a packaging and cost perspective, to
`
`fabricate a single chip capable of driving hundreds or even thousands of data and source
`
`lines. Therefore, a person of ordinary skill in the art would use multiple driver IC chips in
`
`larger sized LCD panels to keep costs, time and labor down and to simplify packaging.
`
`2.
`
`"Gate Dr