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ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING...

Docket 17/391,036, U.S. Patent Application (Aug. 2, 2021)
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eGrant day-of Notification

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. LVBVMYNQXBLUEX6 (U.S. Pat. App. Apr. 23, 2024)
Box 1450 Alexandria, Virginia 22313-1450 17/391,036 08/02/2021 Dae Geun LEE
CANTOR COLBURN LLP 20 Church Street 22nd Floor Hartford, CT 06103
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): usptopatentmail @cantorcolburn.com PTOL-90A (Rev.
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5-2-US-1739103609P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 5-2-US-1739103609P1 (U.S. Pat. App. Aug. 28, 2022)
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29-6-US-1739103609P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 29-6-US-1739103609P1 (U.S. Pat. App. Aug. 28, 2022)
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1-4-US-1739103609P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 1-4-US-1739103609P1 (U.S. Pat. App. Aug. 28, 2022)
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1-1-US-1739103608P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 1-1-US-1739103608P1 (U.S. Pat. App. Nov. 26, 2021)
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35-18-US-1739103607P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 35-18-US-1739103607P1 (U.S. Pat. App. Nov. 1, 2021)
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61-9-US-1739103607P1

Document ARRAY SUBSTRATE AND METHOD OF MOUNTING INTEGRATED CIRCUIT USING THE SAME, 17/391,036, No. 61-9-US-1739103607P1 (U.S. Pat. App. Nov. 1, 2021)
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