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VLSI LAYOUTS OF FULLY CONNECTED GENERALIZED NETWORKS

60/940,394 | U.S. Patent Application

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Location ELECTRONIC
Filed May 25, 2007
Case Type Provisional
Status Provisional Application Expired
Child PCT/US08/64605 Published
Child 12/601,275 Patented
Child 16/202,067 Pending
Last Updated: 4 years, 10 months ago
Date # Transaction