`Westby
`
`I 1111111111111111 11111 lllll lllll 111111111111111 lllll 111111111111111 11111111
`US006279057Bl
`US 6,279,057 Bl
`Aug. 21, 2001
`
`(10) Patent No.:
`(45) Date of Patent:
`
`(54) COMMUNICATIONS SYSTEM HAVING
`DEDICATED FRAME BUFFERS LOCATED
`IN A CHANNEL NODE CONNECTED TO
`TWO PORTS OF THE CHANNEL NODE FOR
`RECEIVING FRAMES
`
`(75)
`
`Inventor: Judy Lynn Westby, Bloomington, MN
`(US)
`
`(73) Assignee: Seagate Technology, Inc., Scotts
`Valley, CA (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by O days.
`
`(21) Appl. No.: 09/193,681
`
`(22) Filed:
`
`Nov. 17, 1998
`
`Related U.S. Application Data
`(60) Provisional application No. 60/065,920, filed on Nov. 17,
`1997, provisional application No. 60/065,926, filed on Nov.
`17, 1997, provisional application No. 60/065,919, filed on
`Nov. 17, 1997, and provisional application No. 60/067,211,
`filed on Dec. 1, 1997.
`Int. Cl.7 ...................................................... G06F 13/14
`(51)
`(52) U.S. Cl. ................................................... 710/52; 710/7
`(58) Field of Search ............................. 710/7, 52, 36-38;
`709/236, 251; 370/400
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`4,486,739
`4,819,229
`
`12/1984 Franaszek et al. ................... 340/347
`4/1989 Pritty et al. . ... ... ... ... .... ... ... ... .. 370/89
`
`(List continued on next page.)
`
`OIBER PUBLICATIONS
`
`"Fibre Channel, Arbitrated Loop (FC-AL), REV 4.5",
`American National Standard for Information Technology
`draft proposed, ANSI X3.272-199 X, (Jun. 1, 1995).
`
`"Fibre Channel, Arbitrated Loop (FC-AL-2), REV 6.3",
`American National Standard for Information Technology
`draft proposed, ANSI X3.xxx-199x, (May 29, 1998).
`"Fibre Channel, Physical and Signaling Interface (FC-PH),
`REV 4.3", American National Standard for Informations
`Systems working draft, ANSI X3.230-199x, (Jun. 1, 1994).
`"Information Systems----dpANS Fibre Channel Protocol for
`SCSI", American National Standard----draft proposed,
`X3.269-199x revision 12, (Dec. 4, 1995).
`Georgiou, C. J., et al., "Scalable Protocol Engine for High(cid:173)
`Bandwidth Communications", IEEE, pp. 1121-1126,
`(1997).
`
`Primary Examiner-Thomas Lee
`Assistant Examiner-Thuan Du
`(74) Attorney, Agent, or Firm----Schwegman, Lundberg,
`Woessner & Kluth P.A.
`
`(57)
`
`ABSTRACT
`
`Dedicated receive buffers for receiving non-data frames are
`provided for each port of a two-port node in a fibre-channel
`arbitrated-loop serial communications channel design. The
`improved communications channel system and method
`includes a channel node having dual ports each supporting
`a communications channel, both ports interfaced from a
`single interface chip, and a dedicated on-chip frame buffer
`located on the chip for receiving frames. The dedicated
`on-chip frame buffer includes two inbound non-data buffers,
`one coupled to each of two ports, wherein inbound non-data
`frames from each port are received into the respective
`inbound non-data buffer. The system further includes an
`off-chip buffer, wherein received non-data frames are
`received into one of the non-data-frame buffers and trans(cid:173)
`ferred from the non-data-frame buffer to the off-chip buffer.
`A data-frame buffer is operatively coupled to both ports to
`receive data frames from the ports, and move the data frames
`to the off-chip buffer. In addition, a method for receiving
`frames using the dedicated buffer is described.
`
`22 Claims, 15 Drawing Sheets
`
`PORT A
`/117
`FIBRE
`CHANNEL I 118 TRANCEIVER
`I
`
`I t 116
`
`[1250
`
`r 116
`t
`
`115•
`
`PORT B
`1117
`FIBRE
`CHANNEL \ 118 TRANSCEIVER
`
`',,
`
`\
`
`\
`
`111
`
`OFF-CHIP BUFFE
`
`112
`
`µ PROCESSOR
`
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`:
`
`I
`I
`I
`I
`I
`I
`
`,.,,,,,,//
`__________ ? _________________________ - - - - - - - - - -
`1220
`,,,
`
`,
`
`I
`
`~ 100
`
`:
`
`i
`rl
`1256J:
`I
`I
`I
`
`\
`:
`
`/'
`I
`I
`I
`1126
`
`HOA INTERFACE
`
`HOA
`
`' - - - - -~~ I
`---1~0----\ 113
`:
`I
`I
`134 I
`I
`I
`I
`',,\, _____________ ,,, ___ ,,,,
`1V' 114 j
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 1
`
`
`
`US 6,279,057 Bl
`Page 2
`
`U.S. PATENT DOCUMENTS
`.......................
`395/725
`12/1992 Thayer et al.
`11/1993 Rouse ..................................... 370/14
`....................
`7/1996 DeFoster et al.
`359/161
`1/1997 Malladi ................................ 395/286
`4/1997 Anderson ............................ 371/10.2
`4/1997 Gallagher et al. ................... 370/394
`4/1997 Jardine .............................. 395/200.7
`6/1997 Malladi ........................... 395/200.21
`9/1997 Westby ................................... 341/59
`12/1997 Thapar et al. ....................... 395/822
`..............................
`5/1998 Aytac
`395/200.41
`...................
`6/1998 Lundberg et al.
`395/870
`6/1998 DeKoning et al. .................. 711/113
`6/1998 Schmahl et al. ..................... 395/287
`6/1998 Crouse et al. ....................... 395/601
`6/1998 Sandorfi .......................... 395/200.63
`6/1998 Judd et al. ........................... 395/857
`7/1998 DeKoning et al. .................. 711/122
`
`5,168,568
`5,260,933
`5,535,035
`5,598,541
`5,617,425
`5,619,497
`5,619,647
`5,638,518
`5,663,724
`5,694,615
`5,758,081
`5,761,534
`5,761,705
`5,764,931
`5,764,972
`5,768,530
`5,768,623
`5,778,426
`
`5,781,801
`5,787,242
`5,787,450
`5,790,773
`5,790,792
`5,802,080
`5,805,788
`5,805,920
`5,807,261
`5,809,328
`5,812,564
`5,812,754
`5,815,662
`5,819,054
`5,819,111
`5,822,143
`5,822,782
`6,012,128
`
`7/1998 Flanagan et al. .................... 395/876
`7/1998 DeKoning et al. ............. 395/182.03
`.....................
`7/1998 Diedrich et al.
`707/513
`8/1998 DeKoning et al. ............. 395/182.04
`8/1998 Dudgeon et al. ............... 395/200.42
`9/1998 Westby ................................... 371/53
`9/1998 Johnson .......................... 395/182.04
`9/1998 Sprenkle et al. . .................... 395/821
`. ....................
`9/1998 Benaron et al.
`600/473
`......................
`9/1998 Nogales et al.
`395/825
`.......................
`9/1998 Bonke et al.
`371/40.1
`........................
`9/1998 Lui et al.
`395/182.04
`Ong ................................. 395/200.47
`9/1998
`10/1998 Ninomiya et al. ................... 395/308
`10/1998 Davies et al. ........................ 395/849
`10/1998 Cloke et al. ........................... 360/65
`10/1998 Humlicek et al. . .................. 711/170
`1/2000 Birns et al. . ......................... 711/163
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 2
`
`
`
`i,-
`~
`""-l
`(It
`
`'° b
`""-l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`'"""' 0 ....,
`~ ....
`rF.J. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`~
`
`t
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`I
`I
`I
`
`I
`
`/
`
`/
`
`/
`
`_______ ...,,.
`
`µ PROCESSOR
`
`112
`
`OFF-CHIP BUFFE
`
`1
`\
`
`\
`
`\
`
`111
`
`'-"-'\
`
`-,
`
`110
`
`---HOA F , 114 1
`I
`I
`I
`
`I r,.
`I
`~~~~-~ 1~ I
`
`f--.:::::--==~
`
`I
`
`/
`
`'-~============----/
`
`'-
`\ 126
`I
`I
`I
`
`'\
`\
`I
`I
`I
`
`l
`
`'------.....-,1
`:
`\
`''\
`
`----------,i 113
`~---HDAINTERFACE
`
`(/
`
`12561:
`I
`:
`I
`/✓--
`
`1220
`
`FIG. I
`
`I
`
`100
`
`___________ ?"" _______________________ _
`
`119
`
`TRANCEIVER 1-4-+-i-,
`'
`'
`'
`: -------------------_5_3_ ---------------------596 -:
`.-----------------,
`
`-------------------------------------; ------------.
`'
`'
`'
`'
`'
`'
`'
`' '
`'
`'
`'
`'
`'
`'
`'
`' '
`'
`' ' '
`' '
`CHECKER !
`:
`'
`,-_._----,'
`
`55
`
`1----+-T------'----i~RECEIVE NON-DATA
`~~
`
`5~
`
`FRAME BUFFER
`
`BUFFER
`73 I FRAME
`DATA
`
`SINGLE-FRAME
`
`XMIT BUFFER
`
`NON-DATA
`
`RECEIVE NON-DATA__ CRC
`r-~----~--=-i
`
`FRAME BUFFER
`
`CHANNEL 1 118 TRANSCEIVER
`
`PORT B
`
`......
`
`' ' ......
`
`\
`1117
`I
`
`FIBRE
`
`115'
`
`116
`
`116
`
`i t
`
`I
`I
`I
`
`{1250 l f
`
`PORT A
`
`115
`
`--
`
`-c:
`CHANNEL j ~8
`
`I
`
`/117
`
`FIBRE
`
`{1250 I//,,-
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 3
`
`
`
`U.S. Patent
`
`Aug. 21, 2001
`
`Sheet 2 of 15
`
`US 6,279,057 Bl
`
`0
`0
`N .....
`~
`
`~
`0
`N .....
`
`N
`("')
`.....
`N
`
`~
`~
`
`t"'-l
`
`~ k;
`
`N
`0
`N .....
`
`.....
`
`0
`N
`N .....
`
`w
`(..)
`<(
`LL w 0::: ow
`Q I-zZ
`
`<(
`
`CD
`
`0
`lO
`.....
`N
`
`0
`lO
`.....
`N
`
`-.::t
`.....
`.....
`N
`
`N
`0
`N .....
`
`.....
`N
`.....
`N
`
`<O
`
`.....
`N .....
`•••
`
`• ••
`
`0
`.....
`0
`
`<(
`
`CD
`
`0
`.....
`0
`
`w
`(_)
`<(
`LL
`0 w 0:::
`N ow
`..... zZ
`N
`0 I-
`
`<O
`lO
`N .....
`
`<O
`lO
`.....
`N
`
`•
`•
`•
`
`•••
`
`<(
`
`CD
`
`w
`(..)
`<(
`LL w 0::: ow
`QI-
`zZ
`
`0
`N
`.....
`N
`
`(0
`lO
`.....
`N
`
`<( m
`
`w
`(..)
`<(
`LL w 0::: ow
`QI-
`z~
`
`0 .....
`.....
`N
`
`Q
`::::::
`
`~
`<(
`0:::
`
`N
`("')
`.....
`N
`
`0
`N
`.....
`N
`
`0
`("')
`N .....
`
`::>
`a..
`(.)
`
`-.::t
`0
`.....
`N
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 4
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`~
`
`'"""' Ul
`0 ....,
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`~
`
`t
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`"---110
`
`B_OUT
`
`I
`I
`
`FIG. 3
`
`20
`
`80
`
`(
`
`REGISTERS
`
`WRITE ENABLE
`
`~ ., MPU DATA
`
`...
`
`AND
`
`INTERFACE! 3095
`
`PORT B LOOP PORT CIRCUIT
`
`MPU
`90
`
`60
`
`(
`
`READ ENABLE
`MPU ADDRESS ~__L_ _
`
`3
`
`3091
`
`I
`I
`
`-
`
`122
`
`~
`
`B_IN
`
`MUX -
`PORT
`
`--
`--XMIT
`
`79
`
`(
`
`-
`
`MPU
`
`3076
`20
`
`(
`
`~
`
`---FRAME
`
`DATA
`
`PATH
`XMIT
`
`PATH
`XMIT
`FRAME
`SINGLE
`
`70
`
`~
`
`-
`
`40
`
`(
`
`CONTROL
`
`LOOP
`
`A_OUT
`
`I
`I
`3023
`
`PORT A LOOP PORT CIRCUIT
`
`-CONTROL
`TRANSFER
`
`3061
`
`~
`
`STATU
`BUFFE
`
`-
`
`-
`
`RECEIVE
`
`PATH
`
`--
`
`BUFFER
`TO OFF-CHIP
`
`~
`
`3052
`
`~
`
`50
`
`~
`
`3051
`
`~
`
`BUFFE
`OFF-CH
`DATA FRO
`
`I
`I
`
`3021
`
`-
`
`A .. _IN
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 5
`
`
`
`i,-
`~
`-...,l
`(It
`Q
`_,.\C
`-...,l
`N
`_,.a-...
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`~ ....
`'JJ. =(cid:173)~
`
`,i;;..
`
`'"""'
`0
`0
`N
`r-'
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`~ A_OUT /B_OUT
`
`2
`
`3023(30
`
`CONTROL
`
`~
`27
`
`__,_ ___ STATES AND
`LOOP A/B
`
`6422/6432
`
`LOOP A/B DATA
`
`4026/4027
`
`ENCODER
`8b/10b
`
`...
`
`I
`
`de
`
`-I
`
`6425/6427
`
`s
`
`OUTPUTS
`TRANSMIT CONTROL
`LOOP A/8
`
`4025 LOSS OF
`
`TIMER
`SYNC -~-SYNC
`
`LOSS OF 1----i LOSS OF
`
`25
`
`24
`
`ARBITRATED
`
`LOGIC
`LOOP
`
`MACHINE 1-
`
`WORD SYNC 1-
`~3
`
`~ STATE
`f
`
`DETECTOR
`
`RCLK
`
`DECODER
`
`A_IN/B_IN _ __J___-1 REG
`
`3021/3022 RCV H Bb/1 Ob
`20 "'
`
`22
`
`~
`
`21
`
`FIG.4
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 6
`
`
`
`U.S. Patent
`
`Aug. 21, 2001
`
`Sheet 5 of 15
`
`US 6,279,057 Bl
`
`0
`
`t") \
`
`z w
`a.
`0
`Q_
`
`0 g
`9
`0
`I
`
`l{)
`
`0 -0
`--0
`
`ll)
`
`lO
`
`0) -0
`-0
`
`lO
`
`0)
`1\1
`<(
`
`<( 0)
`
`0)
`1\1
`<(
`
`<( 0)
`
`N -
`
`0
`l{)
`
`" -0
`
`lO
`
`t") -
`
`0
`lO
`
`l{) -0
`
`lO
`
`~ en w
`<( ~
`0
`<( a:::
`w
`I.J..
`I
`CD :5 X
`~ <(
`
`_J
`
`Q_
`I
`(..)
`I
`LL
`I.J..
`0
`
`w en
`......J 0
`a:::
`CD
`~ 0
`==
`~ I
`<( >-
`~ <(
`
`0
`w
`~
`~
`I.J..
`~
`2§
`
`lr)
`cj
`~
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 7
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`~ ....
`'JJ. =-~
`
`O'I
`
`> =
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`(tQ
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`OUTPUTS
`CONTROL
`TRANSMIT
`LOOP B
`
`OUTPUTS
`CONTROL
`TRANSMIT
`LOOP A
`
`6427
`
`CONTROL ---46'
`OPEN INIT
`PORT B
`
`~
`
`6427
`
`~
`
`CONTROL
`
`OPEN
`PORT B ~42 I
`
`6425
`
`~
`
`CONTROL ---46
`OPEN INIT
`PORT A
`
`6425
`
`(
`
`~42
`
`CONTROL
`
`OPEN
`PORT A
`
`--
`
`-
`
`- -
`
`.
`
`-
`
`40/
`
`FIG. 6
`
`6432
`
`~
`
`(cid:141)
`
`6019
`
`{
`
`6422
`
`~
`
`6020
`
`(
`
`6017
`
`~
`
`AND
`LOOP
`
`DATA
`
`AND
`LOOP
`
`TO TRANSMIT
`PORT CREDIT
`
`TO TRANSMIT
`PORT BB_CREDIT
`
`OUTPUTS
`CONTROL
`TRANSMIT
`
`6413
`
`~
`
`SEQUENCER
`TRANSMIT
`
`~
`
`6411
`
`~
`
`INPUTS
`STATUS
`TRANSMIT
`
`41
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 8
`
`
`
`i,-
`~
`-...,l
`(It
`Q
`_,.\C
`-...,l
`N
`_,.a-...
`rJ'J.
`e
`
`"""" Ul
`0 ....,
`-..J
`~ ....
`'JJ. =(cid:173)~
`
`""""
`0
`0
`N
`r"
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`E BUF)
`1ATA IN
`.CNT_ZERO
`
`Fl
`_ (Al
`BXI
`
`.i.
`7542
`
`J
`
`,--
`
`56
`
`CNTRS
`XFER
`-LENGTH
`54-DATA BUF
`
`-
`
`l
`
`7533
`ENABLE
`NON-DATA RD_
`RECEIVE-
`53~ . PORT B
`
`BUFFER
`
`-FRAME
`
`-
`
`BUFFE~
`--OFF-Cl
`DATA T1
`
`r-RECEIVE 3052
`
`PATH
`
`COMMON
`
`BUFFER
`OFF-CHIP
`FOR
`CONTROLS
`
`1
`
`FACE
`INTER-
`BUF CTL
`
`-
`
`..i
`58
`
`i---
`
`'
`
`-:
`
`J.
`59
`
`/50
`
`CONTROL
`BUFFER
`FRAME
`
`7552
`.----BUFFER ENAB~
`RO_
`
`55
`
`1-52
`
`FRAME
`DATA-
`
`-
`
`-
`
`BUFFER
`FRAME
`
`-DATA-
`
`j
`
`MUX
`
`r-
`
`7532
`ENABLE
`NON-DATA RD_
`RECEIVE-
`PORT A
`
`L BUFFER
`FRAME
`
`-
`
`53
`
`FIG. 7
`
`7541
`
`7561
`
`LO_COUNTERS
`
`BUF_PAUSE
`
`RECEIVE
`BUFFER
`PRE-
`PORT B
`
`PATH
`
`1._
`6432
`
`1_
`4027
`
`7521
`
`I
`
`AND CONTROL
`LOOP B STATES
`
`LOOP B DATA
`
`DATA XFER CTL
`
`RECEIVE
`BUFFER
`PRE-
`PORT A
`
`PATH
`
`1_
`4026
`
`1
`3051
`
`1 -
`6422
`
`OFF-CHIP BUF DATA
`
`AND CONTROL
`LOOP A STATES
`
`LOOP A DATA
`
`l
`51'
`
`51
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 9
`
`
`
`i,-
`~
`-...,l
`(It
`Q
`_,.\C
`-...,l
`N
`_,.a-...
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`00
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`r-'
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`STATES
`RECEIVE
`BUFFER(cid:173)
`PRE(cid:173)
`
`DATA
`RECEIVE
`BUFFER(cid:173)
`PRE(cid:173)
`
`-
`
`COUNTER
`FRM LEN
`MUX RECEIVE
`
`5J5
`
`514
`
`,. ,J
`
`-
`
`8512
`
`)
`
`8~11
`
`51
`
`/
`
`513
`
`FIG. 8
`
`8517
`
`)
`
`MAX FRM SIZE
`
`512
`
`(
`
`DITTCT/EOF
`
`MODIFIER
`
`FRAME
`DATA
`
`._
`
`MACHINE
`STATE
`RECEIVE
`BUFFER
`PRE-
`
`6422/6432
`
`)
`
`AND CONTROL
`LOOP A/B STATES
`
`-
`
`4026/4027
`
`LOOP A/B DATA
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 10
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`\0
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`(tQ
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`SPACE
`AVAILABLE
`
`-
`
`9545
`
`)
`
`FFER DATA
`EIVE NON-DATA
`
`DREAD
`-DATA
`
`VAi
`NO
`BU
`RE1
`
`9546
`
`)
`
`95~43
`
`BUFFER
`NON-DATA
`RECEIVE
`
`RAM
`
`535
`
`~
`
`FFER
`MES IN
`NT OF
`
`Bl
`flj
`cc
`
`-
`
`9544
`
`)
`
`NON-DATA
`RECEIVE
`
`STATUS
`BUFFER
`
`536
`
`)
`
`----
`
`9542-
`
`534
`
`(
`
`53/
`
`FIG.9
`
`READ
`BUFFER
`NON-DAT:
`RECEIVE RPTR 9~41
`ROAT 95/0
`
`CONTROL
`
`WRAP
`
`I
`
`533---
`
`9539
`CONTROL
`WRITE
`BUFFER WRAP 95>38
`NON-DATA
`RECEIVE WPTR 95?7
`WDAT 95,36
`
`WE
`
`)
`
`9535
`
`)
`
`9534
`
`)
`
`95,33
`
`85)12
`
`8511
`
`)
`
`REGISTERED REAO_ENABLE
`
`REGISTERED MPU ADDRESS
`
`REGISTERED MPU DATA
`
`PRE-BUFFER-RCV STATES
`
`PRE-BUFFER-RCV DATA
`
`COUNTER
`FRAME
`FRM BUF
`NON-DATA i---531
`RECEIVE
`
`~
`INCR
`
`DECR
`
`9530
`
`)
`
`FRAME_OUT
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 11
`
`
`
`i,-
`~
`-...,l
`(It
`Q
`_,.\C
`-...,l
`N
`_,.a-...
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`'"""' 0
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`r"
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`-AVAILABLE
`
`SPACE
`
`9561
`
`)
`
`'A PARITY ERROR
`'A VALREAD
`
`[
`
`-
`
`--[
`
`FFER DATA
`'A FRAME
`
`E
`[
`
`9562
`9563
`9564
`
`l
`
`)
`
`)
`
`-
`
`BUFFER STATUS
`DATA-FRAME
`
`--~ --
`
`-
`
`556
`
`)
`
`RAM
`BUFFER
`FRAME
`DATA-
`
`~
`
`555
`
`)
`
`--
`
`-
`- -
`
`UTPUT
`PTURE
`JA
`
`-
`
`9565
`
`)
`
`BUFFER
`
`UNT OF
`
`FRAMES
`
`~ -
`
`9566
`
`l
`
`-
`
`I
`
`' -
`9557
`CONTROL
`WRITE
`BUFFER WRAP 95;56
`FRAME
`DATA-WPTR 95>55
`>
`9554
`
`~DAT 95>58
`
`)
`
`WE
`,
`
`553 ~-
`
`~
`
`-
`-
`
`-
`
`I
`
`9535
`
`)
`
`3051
`
`l
`
`8512
`8511
`
`l
`
`l
`
`REGISTERED RD ENABLE
`
`OFF-CHIP BUFFER
`DATA FROM
`
`PRE-BUFFER-RCV STATES
`PRE-BUFFER-RCV DATA
`
`9551
`
`)
`
`DATA DETECT
`ENABLE WRITE
`
`9550 .....
`
`55/
`
`FIG. 10
`
`RPTR 95>59
`
`CONTROL
`READ
`BUFFER w~
`FRAME
`554...,. DATA-
`
`-
`
`_ WDAT
`
`~
`r---552
`
`,___ CAPTURE
`HEADER
`--WRITE
`--
`DATA
`~ COUNTER r-551
`
`-
`
`BUFFER
`FRAME
`DATA-
`
`~
`
`9550
`
`)
`
`FRAME_OUT
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 12
`
`
`
`i,-
`~
`-....,l
`(It
`Q
`-..\I:;
`-....,l
`N
`-..a-...
`rJ'J.
`e
`
`'""" Ul
`'""" 0 ....,
`'"""
`~ ....
`rF.J. =(cid:173)~
`
`'"""
`0
`0
`N
`r-'
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`STATUS
`FRAME ~ STATUS
`RECEIVE I 95~0
`
`FRAME
`
`CHECKER ~ I --
`CRC
`
`596
`l~fn1~ 9596
`
`597
`
`595
`
`594
`
`VALIDATION
`HEADER
`
`OFF-CHIP BUFFER
`CONTROL FOR
`
`IRQ
`COMMAND RCVD
`
`.. OTHER RCVD IRQ
`(BBC CONTROL)
`COUNT
`OTHER
`
`COUNTER 5992
`COMMANDL~?,u
`i
`i OS:.7Q
`. --
`I
`I
`c
`COUNTER! 9577
`OTHER
`I
`
`5991 9576
`
`?
`
`1
`
`CONTROL
`BUFFER t----4-i GEN
`5993
`RECEIVE ~-i LAST 4 i----
`.-----, 7589
`
`598 9573
`INCR
`
`59"'
`
`.
`
`9574
`
`-
`
`DECR
`>
`9575
`
`MPU DECREMENTS
`
`INCREMENTS
`
`MPU
`
`FIG. 11
`
`932
`
`COUNTER
`MUX FRM LEN
`RECEIVE
`
`INPUTS
`
`MAX SIZE 9572
`
`5931 ,l--1.-~--,
`
`592
`
`-MACHINE
`
`DECODE
`CONTROL
`ROUTING r-5933
`
`STATE
`
`...------,
`
`BUFFER 1-----i-RECEIVE ~-----icAPTURE
`HEADER
`BUFFER 9570 r-==~:---1------------i RECEIVE
`
`READ
`V&_____.__-DECODE
`DATA__.__ FRAME
`
`9571
`
`591
`
`FRM
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 13
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`'"""' N
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`~
`
`t
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`FIG. 12
`
`60
`
`.. TRANSFER LENGTH COUNT
`
`--RELATIVE OFFSET COUNT
`
`6024
`
`1
`
`6023
`
`I
`
`1 TRANSFER LENGTH I
`
`COUNTER
`
`609
`
`I
`RELATIVE OFFSET I
`
`COUNTER
`
`608--,
`
`SEQUENCE COUNT
`
`-
`
`6022
`
`I
`
`SEQUENCE COUNT
`
`COUNTER
`
`-
`
`._,/
`
`TRANSMIT A FRAME
`PORT CREDIT AVAILABLE TO
`
`DATA AVAILABLE
`
`TO TRANSMIT R_RDY
`PORT BB_CREDIT AVAILABLE
`
`-
`
`6020
`
`\
`
`6919
`
`5911
`
`R_RDY CNTRS
`
`RECEIVED
`
`DATA BUFFER
`
`COUNTER
`
`t
`
`CONTROL
`BB_CREDIT
`
`'
`
`R_RDY CNTRS
`TRANSMITTED
`
`6011
`
`I
`
`6010
`
`PORT FRAME TRANSMITTED
`
`PORT R_RDY RECEIVED
`
`604---
`
`~
`
`603---
`
`601_)
`
`6002
`
`\
`
`6001
`
`\
`
`PORT FRAME RECEIVED
`
`PORT R_RDY TRANSMITTED
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 14
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`'"""' ~
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`~
`
`t
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`OUTPL
`XMIT
`
`-
`
`I
`
`SINGLE-TRANSMIT-FILL 7010
`
`GENERATOR
`
`75--
`
`'A
`
`MPU I
`
`3095
`
`I
`
`XMT _DPTH DATA
`
`1op1
`
`GEN
`CRC
`
`>
`76
`
`OUTPUT
`
`MUX
`
`XMIT
`>
`74
`
`70
`
`/
`
`FIG. 13
`
`BUFFER
`XMIT
`FRAME
`SINGLE
`
`-
`
`>
`73
`
`i--72
`J7072
`
`MACHINE
`STATE
`FRAME
`XMIT
`
`ENABLE COUNTER
`
`i--71
`
`L.J-7071
`
`COUNTER
`,._-FRM LEN
`
`XMIT
`
`COUNT=ZERO
`
`7004
`
`I
`
`7003
`>
`7002
`
`l
`
`RCV PATH CONTROLS
`
`RECEIVE PATH DATA
`
`MPU LOADABLE
`
`>
`7001
`
`SEND_FRAME
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 15
`
`
`
`i,-
`~
`-...,l
`(It
`Q
`_,.\C
`-...,l
`N
`_,.a-...
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`'"""'
`,i;;..
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`r-'
`N
`~
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`PARITY ERROR
`
`BUFFER DATA
`TRANSMIT
`SINGLE-FRAME
`
`14}6
`
`14}5
`
`/73
`
`FIG. 14
`
`BUFFER
`TRANSMIT
`FRAME
`SINGLE-
`
`RAM
`
`-
`
`775
`
`14}4
`
`14}3
`
`1412
`
`1
`
`1411
`
`)
`
`1410
`
`)
`
`734
`
`READ
`BUFFER
`FRAME RPTR
`
`CONTROL
`
`.____
`
`ROAT
`
`WE
`
`CONTROL WPTR
`WRITE
`BUFFER WDAT
`FRAME
`
`733
`
`14?8
`
`14?7
`
`95~34
`
`9533
`
`)
`
`1404
`
`)
`
`1403
`
`)
`
`1401
`
`XMIT STATES
`
`SEND FRAME
`
`REGISTERED MPU ADDRESS
`
`REGISTERED MPU DATA
`
`PORT B FRAME
`
`PORT A FRAME
`
`RECEIVE PATH
`DATA FROM
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 16
`
`
`
`i,-
`~
`-...,l
`(It
`
`'° b
`-...,l
`N
`O'I
`rJ'J.
`e
`
`'"""' Ul
`0 ....,
`'"""' Ul
`~ ....
`'JJ. =(cid:173)~
`
`'"""'
`0
`0
`N
`'"""' ~
`N
`(tQ
`~
`
`~ = ......
`~ ......
`~
`•
`r:JJ.
`d •
`
`XMT_DPTH DATA
`
`8008
`
`~
`
`GEN
`CRC
`
`87 ;
`
`,....-.
`
`-
`
`80
`
`/
`
`FIG. 15
`
`~8002
`
`COUNT=ZERO
`
`,....-. FRM LEN -82
`
`COUNTER
`
`XMIT
`
`OUTPUTS
`
`R READ CONTROL
`S TO FRAME
`
`8010
`
`>
`
`-
`
`8009
`
`~
`
`85--AND EOF GENERATOR
`
`K-CHAR, FILL,
`
`XMIT
`
`OUTPUT r--
`XMIT
`
`MUX
`
`l
`86
`
`- -
`
`>
`8007
`
`8006
`
`l
`
`>
`8005
`>
`8004
`
`TRANSFER-READY PAYLOAD
`
`TRANSFER COUNTS
`
`HEADER REGISTERS
`
`FRAME BUFFER DATA
`
`MACHINE -81
`STATE
`FRAME
`XMIT
`
`~8003
`
`ENABLE COUNTER
`
`8001
`
`;
`
`SENO_FRAME
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 17
`
`
`
`US 6,279,057 Bl
`
`1
`COMMUNICATIONS SYSTEM HAVING
`DEDICATED FRAME BUFFERS LOCATED
`IN A CHANNEL NODE CONNECTED TO
`TWO PORTS OF THE CHANNEL NODE FOR
`RECEIVING FRAMES
`
`RELATED APPLICATIONS
`
`This application claims the benefit under 35 U.S. C. 119( e)
`of U.S. provisional application Ser. No. 60/065,920 filed
`Nov. 17, 1997, U.S. provisional application Ser. No. 60/065,
`926 filed Nov. 17, 1997, U.S. provisional application Ser.
`No. 60/065,919 filed Nov. 17, 1997, and U.S. provisional
`application Ser. No. 60/067,211 filed Dec. 1, 1997.
`This application is related to the following applications
`filed on even data herewith, each of which is incorporated by
`reference: "Method and Dedicated Frame Buffer for Loop
`Initialization and Responses" by Judy Lynn Westby,
`"Method and Apparatus for Using CRC for Data Integrity in
`On-Chip Memory" by Judy Lynn Westby, and "Method and
`Apparatus to Reduce Arbitrated-Loop Overhead" by Judy
`Lynn Westby and Michael H. Miller.
`
`FIELD OF THE INVENTION
`
`The present invention relates to the field of mass-storage
`devices. More particularly, this invention relates to an
`improved fibre-channel arbitrated-loop ("FC-AL") appara(cid:173)
`tus and method having dedicated frame buffers for receiving
`frames.
`
`BACKGROUND OF THE INVENTION
`
`30
`
`One key component of any computer system is a device
`to store data. Computer systems have many different devices
`where data can be stored. One common place for storing
`massive amounts of data in a computer system is on a disc
`drive. The most basic parts of a disc drive are a disc that is
`rotated, an actuator that moves a transducer to various
`locations over the disc, and circuitry that is used to write and
`read data to and from the disc. The disc drive also includes
`circuitry for encoding data so that it can be successfully
`retrieved from and written to the disc surface. A micropro(cid:173)
`cessor controls most of the operations of the disc drive, in
`addition to passing the data back to the requesting computer
`and taking data from a requesting computer for storing to the
`disc.
`The interface for transferring data between the disc drive
`and the rest of the computer system is typically a bus or
`channel, such as the Small Computer Systems Interface
`("SCSI"), or the Fibre Channel. Certain aspects of such
`interfaces are often standardized in order that various
`devices from different manufacturers can be interchanged
`and all can be connected to a common interface. Such
`standards are typically specified by some standards com(cid:173)
`mittee of an organization such as the American National 55
`Standards Institute ("ANSI").
`One standardized interface for exchanging data between
`various storage devices and various computers is the fibre
`channel. In some embodiments, the fibre-channel standard
`includes arbitrated loops ( described further below). In some 60
`embodiments, the fibre-channel standard supports a SCSI(cid:173)
`like protocol for controlling data transfers.
`Fibre channels represent significant advantages over
`Small Computer Standard Interface ("SCSI") designs. Fibre
`channels provide significantly higher bandwidths, currently
`up to about 106 megabytes per second, compared to between
`two and twenty megabytes per second for traditional SCSI
`
`10
`
`15
`
`20
`
`2
`designs. Fibre channels provide greater connectivity in that
`up to one-hundred twenty-six devices (including the host)
`may be connected, as compared to a maximum of seven or
`fifteen devices in typical SCSI environments. The fibre
`5 channel can be attached with a single connector and does not
`require a switch. A fibre channel using coaxial electrical
`conductors operates at distances of up to thirty meters
`between devices, and up to ten kilometers using fibre optics
`for an entire channel, as compared to a maximum total
`length ofup to twenty-five meters for SCSI environments. In
`SCSI environments, errors in data transmission are detected
`through use of parity, whereas in fibre channels, errors are
`identified by a running disparity and cyclic-redundancy(cid:173)
`code check ("CRC check") information. More information
`can be found in U.S. Pat. No. 5,802,080 entitled "CRC
`Checking Using a CRC Generator in a Multi-port Design,"
`and U.S. Pat. No. 5,663,724 entitled "16B/20B Encoder,"
`both by the present inventor, Westby, and commonly
`assigned to the present assignee Seagate Technology, Inc.,
`each of which is incorporated by reference.
`The fibre-channel arbitrated loop ("FC-AL") is an
`industry-standard system employing a byte-oriented
`DC-balanced (0,4) run-length-limited 8B/10B-partitioned
`block-transmission code scheme. The FC-AL operates at a
`25 clock frequency of 106.25 MHZ. One form of an 8B/10B
`encoder/decoder is described in U.S. Pat. No. 4,486,739
`granted Dec. 4, 1984 for "Byte Oriented DC Balanced (0,4)
`8B/10B Partitioned Block Transmission Code" by Fra(cid:173)
`naszek et al., which is incorporated by reference.
`A fibre-channel arbitrated loop ("FC-AL") allows for
`multiple devices, each called "a node," to be connected
`together. A node may be any device (a computer,
`workstation, printer, disc drive, scanner, etc.) of the com(cid:173)
`puter system having an interface allowing it to be connected
`35 to a fibre-channel "topology" (defined just below). Each
`node has at least one port, called an NL port ("node-loop
`port") to provide access to other nodes. The components that
`connect two or more ports together are collectively called a
`"topology" or a "loop." Each node communicates with all
`40 other nodes within the provided topology or loop.
`Ports are the connections in a fibre-channel node, though
`which data may pass over the fibre channel to ports of other
`nodes (the outside world). A typical fibre-channel drive has
`two ports packaged within the drive's node. Each port
`45 includes a pair of "fibers" -one to carry information into the
`port and one to carry information out of the port. Each
`"fiber" is a serial data connection, and, in one embodiment,
`each fiber is actually a coaxial wire ( e.g., coaxial copper
`conductors, used when the nodes are in close proximity to
`50 one another); in other embodiments, a fiber is implemented
`as an optical fiber for at least some of its path ( e.g., when
`nodes are separated by an appreciable distance, such as
`nodes in different cabinets or, especially, different
`buildings). The pair of fibers connected to each port (one
`carrying data into the port, the other carrying data out from
`the port) is called a "link" and is part of each topology. Links
`carry information or signals packaged in "frames" between
`nodes. Each link can handle multiple types of frames (e.g.,
`initialization, data, and control frames).
`Since each fiber carries data in one direction only, nodes
`are connected to one another along a loop, wherein the nodes
`must arbitrate for control of the loop when they have data to
`transfer. "Arbitration" is the process of coordinating the
`nodes to determine which one has control of the loop.
`65 Fibre-channel arbitrated loops attach multiple nodes in the
`loop without hubs or switches. The node ports use arbitra(cid:173)
`tion operations to establish a point-to-point data-transfer
`
`Petitioners Microsoft Corporation and HP Inc. - Ex. 1008, p. 18
`
`
`
`US 6,279,057 Bl
`
`5
`
`3
`circuit. FC-AL is a distributed topology where each port
`includes at least the minimum necessary function to estab(cid:173)
`lish the circuit. The arbitrated-loop topology is used to
`connect any number of nodes between two and one-hundred
`twenty-six (126) node ports.
`In some embodiments, each node includes dual ports
`( each connected to a separate loop) which provide
`redundancy, so that if one loop fails, the other one can fulfill
`the loop duties. Dual ports also allow two hosts (e.g., two
`host computers) to share a single drive.
`In typical first- and second-generation FC-AL drives, the
`two ports shared the frame-validation and frame-generation
`logic. This meant that if one port was receiving or trans(cid:173)
`mitting a frame, the alternate port was effectively busy
`(since it could not simultaneously use the frame-validation 15
`and frame-generation logic), and the alternate port was thus
`forced to deny its host-bus adapter permission to send
`frames. Some host-bus adapters would continuously have to
`arbitrate and attempt to send a frame over and over until the
`primary port closed. Also, the drive was only able to transmit 20
`on one port at a time. In some cases, an outbound data
`transfer on a given port would have to be paused in order to
`send a response or perform loop initialization on the other
`(alternate) port.
`CRC Background
`Most data-transmission operations employ error checking
`by which an error code, based on the header and payload
`data of the transmission, is checked to verify the integrity of
`the received header and payload data. One such error(cid:173)
`checking scheme employs cyclic-redundancy-code ("CRC") 30
`information. A typical circuit employing CRC error check(cid:173)
`ing will include a CRC checker to verify the integrity of
`received data words and a CRC generator to generate CRC
`information for digital words being transmitted. In multi(cid:173)
`port designs, a CRC checker and a CRC generator must be 35
`available for each port to handle verification of each
`received digital word and to generate CRC information for
`each digital word being transmitted. In many applications,
`the circuit or loop-interface module transmits on only one
`port at a time. For example, a disc-drive subsystem com- 40
`municating through a multi-port interface module to a
`computer network would prepare and transmit data through
`only a single port at any given time. However, the loop(cid:173)
`interface module might attempt to receive data through
`plural ports at a given time.
`One approach to reception of data through plural ports is
`to simply inhibit reception of data through other ports when
`one port is already receiving data. This approach allows
`common resources, such as the CRC checker or the frame(cid:173)
`validation logic, to be shared among the several ports. The 50
`first port to receive data seizes use of the common resources
`to the exclusion of the other ports, and the other ports are
`inhibited from receiving data. Hence, incoming data cannot
`be received on the other ports and the other ports are limited
`to the function of data transmission. This approach resulted 55
`in the other ports receiving a "busy" condition in response
`to requests to transmit data, and necessitated repeating the
`sequence to request transmission of data again and again,
`until the first port completed the operation it was performing
`and freed-up the common resource.
`Loop Initialization Background
`In plural loop networks, it is necessary to "initialize" a
`loop after an error condition is detected, as well as when a
`loop-interface module is connected into the channel, or
`when the fibre channel is powered up. Initialization is 65
`ordinarily accomplished by transmitting loop-initialization
`data onto the loop. However, if a loop-interface module
`
`4
`connected to the loop is already receiving data through a port
`connected to another loop, that loop-interface module might
`not be able to receive the loop-initialization data. Normally,
`under such circumstances the data transfer is suspended, and
`loop initialization is allowed to proceed first. In other
`instances, the loop-initialization sequence will stall, and go
`into a continuous-retry mode until the other loop ( of the
`dual-loop node) completes receiving data. Moreover, if the
`loop-interface modules can receive only on one loop at a
`10 time, the modules cannot receive data through another port
`while loop initialization is occurring on one channel.
`Fiber links have received considerable attention in con-
`nection with transmission of data between various devices of
`a computer network. More particularly, fibre channels offer
`significant advantages over Small Computer System Inter(cid:173)
`face ("SCSI") buses in terms of higher bandwidth, greater
`connectability, greater ease of attachment of modules,
`greater transmission distance, and other factors. For
`example, a typical SCSI bus is able to handle up to fifteen
`(15) modules with a total distance of up to about 25 meters,
`whereas a fibre channel can handle up to one-hundred
`twenty-six (126) modules with a distance of about thirty
`meters between modules using electrical transmission, or up
`to ten kilometers using optical transmission. Thus, in order
`25 to achieve a data-transfer rate of, for example, a terrabyte/
`second peak, it would require up to seventy SCSI buses but
`would need only about ten fibre channels. It is important that
`a channel be brought up to oper