(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2011/0216033 A1
`MAMBA et al.
`(43) Pub. Date:
`Sep. 8, 2011
`
`US 20110216033A1
`
`(54) COORDINATE INPUT DEVICE AND DISPLAY
`DEVICE INCLUDING THE SAME
`
`(75) Inventors:
`
`73) Assi
`(73) Assignee:
`
`Norio MAMBA, Kawasaki (JP),
`Koji Nagata, Hachioji (JP); Koji
`Hayakawa, Chosei-gun (JP)
`s
`Hitachi Displ
`Ltd
`Itacn UIsplays,
`
`(21) Appl. No.:
`1-1.
`(22) Filed:
`(30)
`
`13/005,574
`
`Jan. 13, 2011
`O
`O
`Foreign Application Priority Data
`
`Mar. 2, 2010 (JP) ................................. 2010-044877
`Publication Classificati
`ublication Classification
`
`(51) Int. Cl.
`G06F 3/044
`
`(2006.01)
`
`
`
`
`
`
`
`(52) U.S. Cl. ........................................................ 345/174
`(57)
`ABSTRACT
`Provided is a coordinate input device including: a coordinate
`input unit having a plurality of first detection electrodes and a
`plurality of second detection electrodes; an electrode drive
`circuit that applies a drive signal to one or more of the detec
`tion electrodes; a capacitance detection circuit that detects a
`capacitance of the first and/or second detection electrode:
`means for selecting one or more of the detection electrodes to
`which the drive signal is not applied from among the detec
`tion electrodes which are disposed in parallel to the detection
`electrodes to which the drive signal is applied, as a reference
`electrode; means for detecting a capacitance of the selected
`reference electrode; means for correcting a capacitance
`detection result of the capacitance detection circuit on the
`basis of the detected capacitance of the reference electrode:
`and an input coordinate computing circuit that calculates an
`input coordinate from the corrected capacitance detection
`result.
`
`
`
`106
`
`
`
`
`
`102
`
`
`
`
`
`103
`
`104
`
`DELL EXHIBIT 1040 PAGE 1
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 1 of 16
`
`US 2011/0216033 A1
`
`
`
`
`
`
`
`
`
`TMG DREF
`
`
`
`DX2
`
`106
`
`104
`
`DELL EXHIBIT 1040 PAGE 2
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 2 of 16
`
`US 2011/0216033 A1
`
`TMG
`?ame SCNY1
`
`:
`:
`; SCNY2
`:
`
`201
`
`:
`
`SCNY3
`
`2O1
`
`; SCNY4
`:
`
`201
`
`102-
`
`:
`
`:
`
`REF :
`
`SCNY5
`
`201
`
`SCNY6-
`
`201
`
`DSLY1
`W
`
`:
`: Y1
`
`RSLY1
`DSLY2
`W
`- Y2
`
`N
`RSLY2
`DSLY3
`- YS
`:
`
`M
`RSLY3
`DSLY4 :
`W
`- 4
`:
`M
`RSLY4 :
`DSLY5 :
`V
`:
`
`Y
`
`N
`RSLY5
`DSLY6 :
`w
`:
`- Y
`
`(N
`RSLY6
`
`:
`
`-
`
`DELL EXHIBIT 1040 PAGE 3
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 3 of 16
`
`US 2011/0216033 A1
`
`FIG.3
`
`REF
`
`X1 X2 X3 X4 X5 X6 X7 X8
`
`: RES
`
`301 (30303030303030301
`TMG :
`MS-> SPL
`
`:
`:- -103
`AX1 IAX2 AX3 AX4 AX5 AX6 AX7 AX8:
`
`
`
`AREF
`
`DREF
`
`DX1 DX2 DX3 DX4 DX5 DX6 DX7 DX8
`
`DELL EXHIBIT 1040 PAGE 4
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 4 of 16
`
`US 2011/0216033 A1
`
`FIG.4
`
`Tcycle
`
`Tcycle
`>
`k
`Ty1 Jy2 Jy: Ty4 Jys Jy
`
`SCNY1
`SCNY2
`SCNY3
`SCNY4
`SCNY5
`SCNY6
`DSLY1
`DSLY2
`DSLY3
`DSLY4
`DSLY5
`DSLY6
`RSLY1
`RSLY2
`RSLY3
`RSLY4
`RSLY5
`RSLY6
`RES
`J
`L J
`SPL i? J.
`SCANNING SIGNAL
`* NON-SCANNING
`... SIGNAL....
`----------------->
`
`J
`
`
`
`DELL EXHIBIT 1040 PAGE 5
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 5 of 16
`
`US 2011/0216033 A1
`
`FIG.5
`X1
`
`Cody
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`2
`
`S(Cdx)
`
`
`
`DISP NODE
`
`Cdy
`
`
`
`
`
`
`
`
`
`S( C d y)
`
`
`
`DELL EXHIBIT 1040 PAGE 6
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 6 of 16
`
`US 2011/0216033 A1
`
`FIG.6
`X1
`
`201
`
`Y1
`
`Cxy
`
`:Cdx
`--
`Ody
`
`Cf
`cy:
`
`DISP NODE
`
`Y3
`
`REF
`
`c^
`
`S(Cdy):
`V
`
`301
`
`302
`
`S(Cxy)+S(Cf): iS(Cdx)
`
`301
`
`302
`
`DREF
`
`DX1
`
`DELL EXHIBIT 1040 PAGE 7
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 7 of 16
`
`US 2011/0216033 A1
`
`FIG.7
`
`TOUCH1
`
`101
`
`X SENS
`Y SENS
`
`
`
`Y1
`
`Y2
`
`
`
`Y4
`
`Y5
`
`
`
`Y6
`
`T
`
`X1 X2 X3 X4 X5 X6 X7 X8
`
`- TOUCH2
`
`DELL EXHIBIT 1040 PAGE 8
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 8 of 16
`
`US 2011/0216033 A1
`
`Tcycle
`FIG.8 Tyl Ty2 Ty3 Ty4 Tys Tys
`
`Toyole
`
`W
`
`W
`
`: W
`
`NON-SCANNING SIGNAL
`
`t
`
`
`
`W
`
`fi
`
`
`
`i
`
`DISP NODE
`
`SCANNIS
`
`Y1
`Y2
`Y3
`Y4
`Y5
`Y6
`
`SPL
`
`AREF
`AX1
`AX2
`AX3
`AX4
`AX5
`AX6
`AX7
`AX8
`
`
`
`
`
`
`
`DX1 ...oxy
`DX2 -...-bay pay
`DX3 i.-Cabar
`
`
`
`
`
`
`
`
`
`CREFY, DREFY,
`oxy
`
`DXY3
`
`
`
`(parov
`
`r
`
`s
`
`-
`
`
`
`
`
`
`
`oxyloxazoxyloxy)
`psy
`previousy
`DX7 - propavlo-Ooty.
`DX8 -os)
`coaxia,
`
`DELL EXHIBIT 1040 PAGE 9
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 9 of 16
`
`US 2011/0216033 A1
`
`
`
`DREF
`
`DX1 DX2DX3DX4 DX5DX6DX7DX8
`
`SIGNAL INTENSITY
`HIGH
`
`FIG.10
`DX1 DX2DX3DX4 DX5DX6DX7DX8
`
`DREF
`
`SIGNAL INTENSITY
`LOW
`
`SIGNAL INTENSITY
`HIGH
`
`FIG.11
`DREF CNT DX1 DX2DX3DX4 DX5DX6DX7DX8
`
`SIGNAL INTENSITY
`LOW
`
`SIGNAL INTENSITY
`HIGH
`
`
`
`
`
`SIGNAL INTENSITY
`LOW
`
`DELL EXHIBIT 1040 PAGE 10
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 10 of 16
`
`US 2011/0216033 A1
`
`FIG.12
`
`SCANNING
`PERIOD
`
`DRIVE
`ELECTRODE
`
`REFERENCE REFERENCE
`ELECTRODE | ELECTRODE
`(ONE)
`(TWO)
`
`FIG.13
`
`SCANNING
`PERIOD
`
`DRIVE
`ELECTRODE
`
`
`
`REFERENCE REFERENCE REFERENCE REFERENCE
`ELECTRODE ELECTRODE | ELECTRODE | ELECTRODE
`
`DELL EXHIBIT 1040 PAGE 11
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 11 of 16
`
`US 2011/0216033 A1
`
`FIG.14
`
`
`
`101
`
`X SENS
`
`
`
`106
`
`
`
`
`
`
`
`
`
`108
`
`TMG
`
`
`
`|| || || || ||
`
`DX
`
`DREFX
`
`DY DREFY
`
`109
`
`
`
`DATA
`
`105
`
`DELL EXHIBIT 1040 PAGE 12
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 12 of 16
`
`US 2011/0216033 A1
`
`
`
`108-----
`
`SCNY6--> 801
`
`Y6
`
`802
`
`RSLY6
`
`: SCNY1
`SCNY2
`: SCNY3
`SCNY4
`; SCNY5
`SCNY6
`
`- - - - - - - - - a - a a - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - as a a ma a -a - s -
`
`DELL EXHIBIT 1040 PAGE 13
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 13 of 16
`
`US 2011/0216033 A1
`
`"MG->
`
`DX
`
`
`
`SCNX1
`
`o
`
`X
`
`107---
`
`: SCNX1
`: SCNX2
`; SCNX3
`SCN X4
`; SCNX5
`SCNX6
`: SCNX7
`SCNX8
`
`DELL EXHIBIT 1040 PAGE 14
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 14 of 16
`
`US 2011/0216033A1
`
`
`
`DELL EXHIBIT 1040 PAGE 15
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`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 15 of 16
`
`US 2011/0216033 A1
`
`
`
`DELL EXHIBIT 1040 PAGE 16
`
`

`

`Patent Application Publication
`
`Sep. 8, 2011 Sheet 16 of 16
`
`US 2011/0216033 A1
`
`SCNX1
`
`SCNX2
`SCNX3
`
`SCN X4
`SCNX5
`SCNX6
`SCNX7
`SCNX8
`SCNY1
`SCNY2
`SCNY3
`SCNY4
`SCNY5
`SCNY6
`
`
`
`DELL EXHIBIT 1040 PAGE 17
`
`

`

`US 2011/0216033 A1
`
`Sep. 8, 2011
`
`COORONATE INPUT DEVICE AND DISPLAY
`DEVICE INCLUDING THE SAME
`
`CROSS-REFERENCE TO RELATED
`APPLICATION
`0001. The present application claims priority from Japa
`nese application JP2010-044877 filed on Mar. 2, 2010, the
`content of which is hereby incorporated by reference into this
`application.
`
`BACKGROUND OF THE INVENTION
`0002 1. Field of the Invention
`0003. The present invention relates to a coordinate input
`device that detects an indication point on a screen, and a
`display apparatus having the same. More particularly, it is
`relates to a technique which is effective in increasing the
`coordinate detection precision of a display apparatus having a
`capacitive coupling type coordinate input device.
`0004 2. Description of the Related Art
`0005. A display apparatus having a detection device (here
`inafter, also called a touch sensor or a touch panel) having a
`screen input function for inputting information by a touch
`operation (contact pressing operation, hereinafter, simply
`called a touch) using a finger or the like of a user on the
`display Screen is used for mobile electronic devices such as
`PDAs and portable terminals, various electronic appliances,
`and stationary customer guide terminals such as unattended
`reception machines. As such a touch input device, a resistive
`type that detects a change in resistance of a touched portion,
`a capacitive coupling type that detects a change in capaci
`tance, an optical sensor type that detects a change in light
`intensity of a portion blocked by a touch, and the like are
`known.
`0006. In Such types, recently, a capacitive coupling type
`touch panel has been spotlighted. In a case where a touch is
`input to an input device using a button, a slider, or the like
`displayed on a display apparatus of a mobile electronic
`device, the input device needs to be disposed on the front
`Surface of a display panel. In this case, an input function needs
`to be incorporated therein while maintaining a display image
`quality by minimizing a reduction in display luminance of the
`display apparatus. Here, in general, the resistive or the optical
`sensor type has a low transmittance of about 80%; however,
`the capacitive coupling type has a high transmittance of about
`90%. Accordingly, the capacitive coupling type is advanta
`geous in that the display image quality is not degraded. In
`addition, the resistive type senses a touch position by a
`mechanical contact of a resistance film. Therefore, the num
`ber of touches (mechanical contact) is increased, and the
`resistance film may be deteriorated or broken, so that there is
`a problem in that detection errors increase or detection fail
`ures may occur. On the other hand, the capacitive coupling
`type has no mechanical contact Such as the contact of a
`detection electrode with other electrodes, and thus is advan
`tageous in terms of durability.
`0007 As a capacitance detection circuit in the capacitive
`coupling type, for example, a type is disclosed in JP2005
`140612 A. In the disclosed type, a sensor unit having a plu
`rality of row wires and a plurality of intersecting column
`wires detects the capacitance existing in the vicinity of inter
`sections thereof. When the pitch between the row wires and
`the column wires is reduced, fingerprint detection can be
`performed by detecting a change in capacitance that occurs
`
`due to unevenness of a Surface of a fingerprint. On the other
`hand, as the sensor unit is made transparent and to have the
`same size as a screen of a display panel, a coordinate input
`device using a finger or the like as input means can be imple
`mented. Capacitance detection is performed by applying a
`drive signal to the row wires sequentially selected from
`among the plurality of row wires from a row wire driving unit,
`and detecting a current flowing via the capacitance in the
`vicinity of an intersection between the row wire to which the
`drive signal is applied and the column wire, by using a capaci
`tance detection circuit. Here, the capacitance detection circuit
`detects a capacitance on the basis of the difference of two
`detection current results. In the disclosed type, two means are
`disclosed for enhancing the capacitance detection precision
`by reducing external noise.
`0008. In the first means, from among column electrodes
`intersecting row electrodes that apply the drive signal, the
`column electrode which initially detects the capacitance in
`the vicinity of an intersection thereof compares the detected
`current to a reference current flowing through a reference
`capacitance of the capacitance detection circuits and calcu
`lates a capacitance, thereby enhancing the capacitance detec
`tion precision. The capacitance detection of the column elec
`trode thereafter is performed by obtaining the difference
`between the detection currents of the adjacent column elec
`trodes. In a case where capacitance detection of the row
`electrodes is performed after detecting the capacitances of all
`the column electrodes, the above-described operation is
`repeated.
`0009. In the second means, one is selected as a capacitance
`detection object from among the column electrodes to detect
`the detection current flowing through the corresponding col
`umn electrode, and the second detection current flowing
`through a plurality of the column electrodes excluding the
`corresponding column electrode is regarded as a reference
`current. Here, capacitances in the vicinities of the intersec
`tions thereof are detected by differences between the detec
`tion currents which are capacitance detection objects and the
`reference current.
`
`SUMMARY OF THE INVENTION
`0010 Here, the capacitance detection precision in a case
`where a sensor unit of a coordinate input device is transparent
`and a display panel is installed under the sensor unit will be
`described.
`0011 A plurality of scanning lines and a plurality of signal
`lines that Supply an image signal to pixels on the selected
`scanning lines exist on a screen of the display panel. Insula
`tors exist between the signal lines and the scanning lines on
`the screen of the display panel and between row electrodes
`and column electrodes in the sensor unit of the coordinate
`input device, so that parasitic capacitance occurs.
`0012 Here, a scanning signal used to rewrite an image is
`applied to the scanning line, and the corresponding image
`signal Voltage is applied to the signal line used to rewrite the
`image of the selected Scanning line. Accordingly, in the row
`electrodes or the column electrodes of the sensor unit which
`is coupled to the scanning lines or the signal lines via parasitic
`capacitance, charge or discharge currents that occur due to a
`change in image signal Voltage of scanning signal Voltage are
`incorporated as noise.
`0013 Here, in a method using a reference capacitance
`disclosed as the first means in JP2005-140612 A, when the
`capacitance in the vicinity of the intersection of the first
`
`DELL EXHIBIT 1040 PAGE 18
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`

`

`US 2011/0216033 A1
`
`Sep. 8, 2011
`
`column electrode is detected, the capacitance is calculated by
`the difference between a detection current of the first column
`electrode and a reference current that flows through a refer
`ence capacitance that a capacitance detection circuit holds. In
`this case, noise is not incorporated from the display panel to
`the reference current. On the other hand, noise is incorporated
`to the first column electrode, so that the capacitance value
`corresponding to the first column electrode obtained by the
`difference between the two is a value into which a noise
`component is incorporated. The noise component from the
`display panel sequentially changes due to a displayed image
`or the like and thus varies in the row electrodes driving.
`Therefore, the detection precision of the detected capacitance
`value is degraded, so that the input coordinate precision based
`on the calculation is also degraded.
`0014. In addition, in the method disclosed as the second
`means in JP2005-140612A for regarding the current of the
`plurality of the column electrodes excluding the column elec
`trode which is the capacitance detection object as the refer
`ence current, since noise is incorporated from the display
`panel to both the detection current and the reference current,
`the noise from the display panel can be reduced by calculating
`the difference. Here, in a case where a change in capacitance
`occurs due to an input to the plurality of the column electrodes
`which detect the reference current, the reference current is
`changed. Accordingly, in the case where the reference current
`is changed due to an existence of an input or a change in an
`input space, the capacitance detection result is changed due to
`the difference, so that it is difficult to always detect the capaci
`tance with good precision.
`0015. As described above, in the existing coordinate input
`device, it is difficult to always detect the capacitance with
`good precision by reducing random noise incorporated from
`the display panel, unfortunately.
`0016. Therefore, an object of the invention is to provide a
`technique capable of enhancing the capacitance detection
`precision by reducing random noise incorporated from a dis
`play panel.
`0017 (1) In order to solve the problem, a coordinate input
`device includes: a coordinate input unit having a plurality of
`first detection electrodes and a plurality of second detection
`electrodes intersecting the first detection electrodes; an elec
`trode drive circuit that applies a drive signal to one or more of
`the first and/or second detection electrodes; a capacitance
`detection circuit that detects a capacitance of the first and/or
`second detection electrode in synchronization with the drive
`signal; means for selecting one or more of the detection
`electrodes to which the drive signal is not applied from among
`the detection electrodes which are disposed in parallel to the
`detection electrodes to which the drive signal is applied, as a
`reference electrode; means for detecting a capacitance of the
`selected reference electrode; means for correcting a capaci
`tance detection result of the capacitance detection circuit on
`the basis of the detected capacitance of the reference elec
`trode; and an input coordinate computing circuit that calcu
`lates an input coordinate from the corrected capacitance
`detection result.
`0018 (2) In order to solve the problem, a display apparatus
`includes: a display panel that displays an image based on an
`image signal from an external system; and a coordinate input
`device disposed on the display Surface side of the display
`panel, wherein the coordinate input device includes a coordi
`nate input unit in which a plurality of first detection electrodes
`and a plurality of second detection electrodes intersecting the
`
`first detection electrodes are formed, and which is disposed
`on the display Surface side of the display panel, an electrode
`drive circuit that applies a drive signal to one or more of the
`first and/or second detection electrodes, a capacitance detec
`tion circuit that detects a capacitance of the first and/or second
`detection electrode in Synchronization with the drive signal,
`means for selecting one or more of the detection electrodes to
`which the drive signal is not applied from among the detec
`tion electrodes which are disposed in parallel to the detection
`electrodes to which the drive signal is applied, as a reference
`electrode, means for detecting a capacitance of the selected
`reference electrode, means for correcting a capacitance
`detection result of the capacitance detection circuit on the
`basis of the detected capacitance of the reference electrode,
`and an input coordinate computing circuit that calculates an
`input coordinate from the corrected capacitance detection
`result.
`0019. According to the invention, random noise incorpo
`rated from the display panel can be reduced, thereby enhanc
`ing the capacitance detection precision.
`0020. The other advantages of the invention will be more
`apparent from the entire description.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`0021
`FIG. 1 is a block diagram for explaining the entire
`configuration of a display apparatus according to a first
`embodiment of the invention.
`0022 FIG. 2 is a diagram for explaining a schematic con
`figuration of a selective electrode drive circuit in the display
`apparatus according to the first embodiment of the invention.
`0023 FIG. 3 is a diagram for explaining a schematic con
`figuration of a capacitance detection circuit in the display
`apparatus according to the first embodiment of the invention.
`0024 FIG. 4 is a timing chart of voltage waveforms of
`selective electrodes Y SENS and control signals included in
`a timing control signal group TMG in the display apparatus
`according to the first embodiment of the invention.
`0025 FIG. 5 is a schematic diagram of a case where a
`contact of a finger or the like does not exist in a coordinate
`input device according to the first embodiment of the inven
`tion.
`0026 FIG. 6 is a schematic diagram of a case where a
`finger or the like is in contact with the coordinate input device
`according to the first embodiment of the invention.
`0027 FIG. 7 is a schematic diagram of a case where a
`contact exists on a coordinate input unit according to the first
`embodiment of the invention.
`0028 FIG. 8 is a timing chart illustrating voltage wave
`forms of selective electrodes, control signals, and the like in
`the case where the contact exists as illustrated in FIG. 7.
`0029 FIG. 9 is a schematic diagram of the strength of the
`digital output signals in a first cycle Tcycle illustrated in FIG.
`8.
`0030 FIG. 10 is a schematic diagram of the strength of the
`digital output signals in a second cycle Tcycle illustrated in
`FIG 8.
`FIG. 11 is a schematic diagram of the strength of the
`0031
`digital output signals after a correction process is performed
`in the coordinate input device according to the first embodi
`ment of the invention.
`0032 FIG. 12 is a diagram for explaining another selec
`tion method of the reference electrode used in the coordinate
`input device according to the first embodiment of the inven
`tion.
`
`DELL EXHIBIT 1040 PAGE 19
`
`

`

`US 2011/0216033 A1
`
`Sep. 8, 2011
`
`0033 FIG. 13 is a diagram for explaining another selec
`tion method of the reference electrode used in the coordinate
`input device according to the first embodiment of the inven
`tion.
`0034 FIG. 14 is a block diagram for explaining the entire
`configuration of a display apparatus according to the second
`embodiment.
`0035 FIG. 15 is a diagram for explaining a schematic
`configuration of the other capacitance detection circuit in the
`display apparatus according to the second embodiment of the
`invention.
`0036 FIG. 16 is a diagram for explaining a schematic
`configuration of the one capacitance detection circuit in the
`display apparatus according to the second embodiment of the
`invention.
`0037 FIG. 17 is a timing chart of voltage waveforms of
`selective electrodes Y SENS and detection electrodes
`X SENS and control signals included in a timing control
`signal group TMG in the display apparatus according to the
`second embodiment of the invention.
`0038 FIG. 18 is a schematic diagram for explaining signal
`paths of the detection electrode X1 at a scanning period Tx1
`in the coordinate input device according to the second
`embodiment of the invention.
`0039 FIG. 19 is a schematic diagram for explaining signal
`paths of the detection electrodes X3 in the scanning period
`Tx1 in the coordinate input device according to the second
`embodiment of the invention.
`0040 FIG. 20 is a timing chart of the selection timing
`signals and the digital output signals DX, DREFX, DY, and
`DREFY in the single cycle in the display apparatus according
`to the second embodiment of the invention.
`
`DETAILED DESCRIPTION OF THE INVENTION
`0041. Hereinafter, exemplary embodiments of the inven
`tion will be described with reference to the accompanying
`drawings. It should be noted that, throughout the drawings for
`describing the embodiments, the components which have
`identical or similar functions are denoted by the same refer
`ence symbols, and the repetitive description thereof is omit
`ted.
`
`First Embodiment
`
`Entire Configuration
`0042 FIG. 1 is a block diagram for explaining the entire
`configuration of a display apparatus according to a first
`embodiment of the invention. Hereinafter, the entire configu
`ration of the display apparatus according to the first embodi
`ment will be described with reference to FIG.1. Here, since a
`configuration of the display panel is the same as that of a
`display panel according to the related art, a coordinate input
`device will be described in detail in the following description.
`In addition, X and y in the figure represent X and y axes.
`Moreover, the display panel according to the first embodi
`ment may be any one of non-light-emitting display panels
`Such as a liquid crystal display panel and self-light-emitting
`display panels such as an organic EL display panel.
`0043. As illustrated in FIG. 1, the display apparatus
`according to the first embodiment includes a display panel
`106 that displays an image based on display data (not shown)
`input from a system 105 which is an external apparatus, and
`a coordinate input device having a coordinate input unit 101
`disposed on the display surface side of the display panel 106.
`
`The coordinate input device includes the coordinate input unit
`101 that indicates an input position, a selective electrode drive
`circuit 102 needed to detect input coordinates, a capacitance
`detection circuit 103, and an input coordinate computing
`circuit 104. Data DATA such as the input coordinates detected
`by the coordinate input device is output to the system 105 of
`an apparatus including the coordinate input device and the
`display apparatus using the same, and the system 105 displays
`display contents or the like corresponding to an input on the
`display panel 106. In addition, in a case where the display
`apparatus 106 is installed under the coordinate input unit 101,
`that is, on the rear surface side thereof, it is preferable that the
`coordinate input unit 101 be transparent such that image
`contents displayed on the display apparatus 106 are seen by
`an operator.
`0044. In order to detect coordinates due to an input, the
`coordinate input unit 101 of the first embodiment includes a
`plurality of detection electrodes (second detection electrodes)
`X SENS extending in a y direction in parallel to an X direc
`tion, and a plurality of selective electrodes (first detection
`electrodes)Y SENS extending in the X direction in parallel to
`the y direction. The detection electrodes X SENS and the
`selective electrodes Y SENS intersect. In order to increase a
`transmitting property of the coordinate input unit 101, it is
`preferable that the detection electrodes X SENS and the
`selective electrodes Y SENS be transparent. In addition, in
`FIG. 1, a case where the number of selective electrodes
`Y SENS is 6, and the number of detection electrodes
`X SENS is 8 is illustrated; however, the number of electrodes
`is not limited thereto.
`0045. The selective electrode drive circuit 102 according
`to the invention is connected to the selective electrodes
`Y SENS with selective electrode wires Y1 to Y6. The selec
`tive electrode drive circuit 102 selects one or more from
`among the plurality of selective electrodes Y SENS by a
`timing control signal group TMG output from the input coor
`dinate computing circuit 104 and sequentially applies the
`drive signal. In addition, the selective electrode drive circuit
`102 selects one or more from among the selective electrodes
`Y SENS to which the drive signal is not applied as reference
`electrodes, and connects it or them to a reference signal wire
`REF.
`0046. In addition, the capacitance detection circuit 103 is
`also controlled by the timing control signal group TMG. The
`capacitance detection circuit 103 detects two types of signals
`including a signal from the selective electrode Y SENS
`selected by the selective electrode drive circuit 102 as the
`reference electrode and a signal that is changed by the capaci
`tance in the vicinity of an intersection between the selective
`electrode Y SENS to which the drive signal is applied by the
`selective electrode drive circuit 102 and the plurality of detec
`tion electrodes X SENS. The signal from the reference elec
`trode and the signal changed by the capacitance in the vicinity
`of the intersection are respectively input to the capacitance
`detection circuit 103 via the reference signal wire REF and
`detection electrode wires X1 to X8. That is, the signal input
`from the reference electrode selected by the selective elec
`trode drive circuit 102 is input to the capacitance detection
`circuit 103. The capacitance detection circuit 103 generates
`digital output signals DREF and DX1 to DX8 from the signals
`input via the reference signal wire REF and the detection
`signal wires X1 to X8 so as to be output to the input coordinate
`computing circuit 104.
`
`DELL EXHIBIT 1040 PAGE 20
`
`

`

`US 2011/0216033 A1
`
`Sep. 8, 2011
`
`0047. The input coordinate computing circuit 104 calcu
`lates a correction amount that cancels noise components from
`the digital output signal DREF, calculates input coordinates
`from data obtained by cancelling the noise components from
`the digital output signals DX1 to DX8, and outputs the
`obtained input coordinates to the system 105.
`
`Configuration of Selective Electrode Drive Circuit
`0048 FIG. 2 is a diagram for explaining a schematic con
`figuration of the selective electrode drive circuit in the display
`apparatus according to the first embodiment of the invention.
`Hereinafter, the selective electrode drive circuit will be
`described with reference to FIG. 2.
`0049. As illustrated in FIG. 2, the selective electrode drive
`circuit 102 according to the first embodiment includes a plu
`rality of drive circuits 201 that selects one or more from
`among the plurality of selective electrodes Y SENS and
`applying the drive signal to the selected selective electrodes,
`control switches DSL Y1 to DSL Y6, and control switches
`RSL Y1 to RSL Y6 that selects the selective electrodes
`Y SENS as the reference electrodes. The drive circuit 201
`outputs the drive signal at periods (hereinafter, referred to as
`timing periods) that can be detected by selective timing sig
`nals SCN Y1 to SCN Y6 included in the timing control
`signal group TMG. Here, the drive signal output from the
`drive circuit 201 in the Scanning periods may be a Voltage
`drive signal or a current drive signal. In addition, the drive
`signal output may be output once or a plurality of times in the
`signal scanning period. Moreover, it is preferable that an
`arbitrary constant voltage be applied by the drive circuits 201
`to the selective electrodes to which the drive signal is not
`applied.
`0050. As such, the selective electrode drive circuit 102
`sequentially drives the selective electrodes Y SENS of the
`coordinate input unit 101 by the drive circuits 201. On the
`other hand, one or more of the selective electrodesY SENS to
`which the drive signal is not applied by the drive circuits 201
`are selected by the control switches RSL as the reference
`electrodes. Here, the control switches DSL corresponding to
`the selective electrodes Y SENS selected as the reference
`electrodes are on a non-selected state. The reference elec
`trodes selected by the control switches RSL are connected to
`the reference signal wire REF, and the signals detected from
`the selected reference electrodes are output to the reference
`signal wire REF.
`
`Configuration of Capacitance Detection Circuit
`0051
`FIG. 3 is a diagram for explaining a schematic con
`figuration of the capacitance detection circuit in the display
`apparatus according to the first embodiment of the invention.
`Hereinafter, the capacitance detection circuit will be
`described with reference to FIG. 3.
`0052. As illustrated in FIG. 3, the capacitance detection
`circuit 103 includes signal detection circuits 301 that detects
`signals input via the reference signal wire REF and the detec
`tion signal wires X1 to X8, and AD conversion circuit 302 that
`converts analog output signals AREF and AX1 to AX8 output
`from the signal detection circuits 301 into digital signals
`DREF and DX1 to DX8. The signal detection circuits 301 are
`reset by a reset control signal RES included in the timing
`control signal group TMG before detecting the signals.
`Thereafter, at a period at which the selective electrode drive
`circuit 102 applies the drive signal to the selective electrode,
`
`the signals transmitted via the reference signal wire REF and
`the detection electrode wires X1 to X8 are detected. Here, A
`Voltage or a current transmitted from each electrode may be
`detected by the signal detection circuit 301. The signal detec
`tion circuit 301 samples and holds the analog signal detected
`by the period at which the drive signal is applied to the
`selective electrode at a timing of a sampling control signal
`SPL and outputs the sampled and held analog signals to the
`AD conversion circuits 302 as the analog output signals
`AREF and AX1 to AX8. The AD conversion circuits 302
`converts the analog output signals AREF and AX1 to AX8
`into digital output signals DREF and DX1 to DX8 to be
`output to the input coordinate computing circuit 104.
`
`Basic Operations for Noise Reduction
`0053 FIG. 4 is a timing chart of voltage waveforms of the
`selective electrodes Y SENS and control signals included in
`the timing control signal group TMG in the display apparatus
`according to the first embodiment of the invention. Hereinaf
`ter, operations of the coordinate input device according to the
`first embodiment will be described with reference to FIG. 4.
`Here, in the following description, a case where one of selec
`tive electrodes is selected for applying the drive signal in each
`of scanning periods Ty1 to Ty6 is described; however, the
`plurality