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`PACT XPP SCHWEIZ AG
`
`
`
`
`
`INTEL CORPORATION,
`
`
`
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`)
`)
`)
`)
`)
`)
`)
`)
`)
`
`Plaintiff,
`
`Defendant.
`
`
`
`C.A. No. 19-1006-JDW
`
`
`
`PACT XPP SCHWEIZ AG’S PROPOSED CLAIM CONSTRUCTIONS
`
`I.
`
`INTRODUCTION
`
`Pursuant to Paragraph 9 of the Scheduling Order (Dkt. No. 20), Plaintiff PACT XPP
`
`Schweiz AG (“PACT”) hereby provides this list of proposed constructions of the terms identified
`
`in parties’ December 20, 2019 disclosure.
`
`Discovery in this action is in its early stages, and Plaintiff’s investigation is ongoing.
`
`Defendant’s production of documents remains deficient. Defendant’s core technical document
`
`production is incomplete. For example, Defendant continues to refuse to provide core technical
`
`documents describing how the accused products actually function, i.e., the functions of the Tape-
`
`Out Products sold on the market. Plaintiff has repeatedly requested supplementation by
`
`Defendant, including in its October 9, 2019 letter, October 23, 2019 letter, November 18, 2019
`
`letter, December 16, 2019 letter, December 20, 2019 letter, and during numerous meet-and-
`
`confers, but to date Defendant has failed to correct the deficiencies in its production. During the
`
`telephone status conference on January 16, 2020, the Court ordered Intel to produce core
`
`technical documents. PACT reserves its right to supplement new terms and revise constructions
`
`after Intel produces all core technical documents. Similarly, Defendant’s invalidity contentions
`
`
`
`1
`INTERIM TERMS AND CONSTRUCTIONS
`SUBJECT TO COURT ORDER REQUIRING INTEL TO MAKE
`ADDITIONAL PRODUCTION OF CORE DOCUMENTS
`
`INTEL - 1045
`Page 1 of 5
`
`

`

`
`
`are vague, ambiguous, and fail to identify its invalidity theories. Plaintiff will amend or
`
`supplement their identification of proposed constructions in the event it obtains or discerns
`
`additional information through further investigation, discovery, or disclosure from Defendant or
`
`from third parties.
`
`This list is preliminary and Plaintiff reserves the right to add, delete, and/or amend claim
`
`terms and/or constructions from the list based on, without limitation, the list(s) propounded by
`
`Defendant pursuant to the Scheduling Order or any information learned throughout the course of
`
`discovery.
`
`II.
`
`CLAIM CONSTRUCTION
`
`PLAINTIFF’S TERMS
`
`No.
`
`Patent
`
`Claim Terms and Phrases
`
`1
`
`’763
`
`2
`
`’763
`
`3
`
`’763
`
`“interconnecting at runtime at least one
`of data processing cells and memory
`cells with at least one of memory cells
`and one or more of the at least one
`interface unit”
`
`“the data processing cells are adapted
`to connect simultaneously to a
`plurality of at least one of cells and
`units of at least one of the memory
`cells, the data processing cells, and the
`at least one interface units”
`
`“cells of the data processing cells are
`adapted to connect simultaneously to
`other cells of the data processing cells
`and to a plurality of at least one of
`cells and units of at least one of the
`memory cells, the data processing
`cells, and the at least one interface
`units”
`
`Plaintiff’s Proposed
`Construction
`connect at least one data
`processing cell, at least one
`memory cell, and at least one
`interface unit with each other
`at runtime.
`each of the data processing
`cells is adapted to
`simultaneously connect to a
`plurality of elements; each of
`the elements is either one of
`the memory cells, another one
`of the data processing cells, or
`the interface unit.
`the data processing cells are
`adapted to simultaneously
`connect each other and to a
`plurality of elements; each of
`the elements is either one of
`the memory cells, another one
`of the data processing cells, or
`the interface unit.
`
`
`
`2
`INTERIM TERMS AND CONSTRUCTIONS
`SUBJECT TO COURT ORDER REQUIRING INTEL TO MAKE
`ADDITIONAL PRODUCTION OF CORE DOCUMENTS
`
`INTEL - 1045
`Page 2 of 5
`
`

`

`
`
`
`
`
`
`No.
`
`Patent
`
`Claim Terms and Phrases
`
`4
`
`’763
`
`5
`
`’763
`
`6
`7
`8
`9
`10
`
`11
`
`’763
`’872
`’301
`’593
`’505
`
`’807
`
`“interconnect a data processing cell
`simultaneously to a plurality of at least
`one of cells and units of at least one of
`the memory cells, others of the data
`processing cells, and the at least one
`interface units”
`
`“interconnect a plurality of data
`processing cells simultaneously to a
`plurality of at least one of cells and
`units of at least one of the memory
`cells and the interface units”
`
`Preambles (claims 1 and 31)
`Preambles (claims 2, 10, 14, 15)
`Preambles (claims 3, 6, 8, 10, 12)
`Preambles (claims 1 and 16)
`Preambles (claims 1, 14, 16-18, 27)
`Preambles (claims 1-6, 24, 26-27, 29,
`32, 44, and 73-74)
`
`12
`
`’605
`
`“sequentially processing data”
`
`13
`14
`15
`16
`
`’605
`’812
`’908
`’631
`
`Preamble (claim 1)
`Preamble (claim 12)
`“train mission” (claim 4)
`“may executed” (claim 1)
`
`17
`
`’047
`
`“sequentially processing data”
`
`18
`
`’047
`
`Preambles (claims 1, 19)
`
`Plaintiff’s Proposed
`Construction
`simultaneously interconnect a
`data processing cell to a
`plurality of elements; each of
`the elements is either one of
`the memory cells, another one
`of the data processing cells, or
`the interface unit.
`simultaneously interconnect
`each one of a plurality of data
`processing cells to a plurality
`of elements; each of the
`elements is either one of the
`memory cells or the interface
`unit.
`
`Preambles are limiting.
`Preambles are limiting.
`Preambles are limiting.
`Preambles are limiting.
`Preambles are limiting.
`Preambles are limiting.
`
`passing onto one or more
`other data processing units for
`subsequently processing of
`data.
`Preamble is limiting.
`Preamble is limiting.
`transmission
`may be executed
`passing onto one or more
`other data processing units for
`subsequently processing of
`data.
`Preambles are limiting.
`
`3
`INTERIM TERMS AND CONSTRUCTIONS
`SUBJECT TO COURT ORDER REQUIRING INTEL TO MAKE
`ADDITIONAL PRODUCTION OF CORE DOCUMENTS
`
`INTEL - 1045
`Page 3 of 5
`
`

`

`
`
`
`
`
`
`
`
`DEFENDANT’S TERMS
`
`No.
`
`Patent
`
`Claim Terms and Phrases
`
`1
`
`’763
`
`“data processing cells, each adapted
`for sequentially executing”
`
`2
`
`’763
`
`“programmably interconnecting at
`runtime” / “dynamically
`interconnecting at runtime”
`
`’301
`
`“data processing element” and/or “data
`processing elements adapted for
`programmably processing sequences”
`
`’301
`
`“code sections”
`
`’593
`
`’505
`
`“the bus system includes a first
`structure dedicated for data transfer in
`a first direction and a second structure
`dedicated for data transfer in a second
`direction”
`“more of the plurality of data
`processing cores are implemented than
`used”
`
`’549
`
`“programmable data processing units”
`
`’605
`
`’605
`
`’812
`
`“data processing unit” and/or “data
`processing unit . . . adapted for
`sequentially processing data”
`
`“to a minimum”
`
`“instruction dispatch unit”
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`9
`
`10
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning.
`No construction necessary.
`No construction necessary for
`“programmably” or
`“dynamically.” Plain and
`ordinary meaning.
`
`For “interconnecting at
`runtime,” see PACT’s
`proposed construction of
`“interconnecting at runtime at
`least one of data processing
`cells and memory cells with at
`least one of memory cells and
`one or more of the at least one
`interface unit.”
`Plain and ordinary meaning.
`No construction necessary.
`
`Plain and ordinary meaning.
`No construction necessary.
`Plain and ordinary meaning.
`No construction necessary.
`
`Plain and ordinary meaning.
`No construction necessary.
`
`Plain and ordinary meaning.
`No construction necessary.
`See PACT’s proposed
`construction of “sequentially
`processing data.”
`Plain and ordinary meaning.
`No construction necessary.
`Plain and ordinary meaning.
`
`4
`INTERIM TERMS AND CONSTRUCTIONS
`SUBJECT TO COURT ORDER REQUIRING INTEL TO MAKE
`ADDITIONAL PRODUCTION OF CORE DOCUMENTS
`
`INTEL - 1045
`Page 4 of 5
`
`

`

`
`
`No.
`
`Patent
`
`Claim Terms and Phrases
`
`11
`
`’631
`
`12
`
`’047
`
`“a plurality of bus segments for each
`processor”
`
`“data processing unit” and/or “data
`processing unit . . . adaptable for
`sequentially processing data”
`
`13
`
`’047
`
`“clocked manner”
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning.
`No construction necessary.
`
`See PACT’s proposed
`construction of “sequentially
`processing data.”
`Plain and ordinary meaning.
`No construction necessary.
`
`
`
`
`
`
`Dated: January 17, 2020 Respectfully submitted,
`
`/s/ Ziyong Li
`Ziyong Li
`
`
`
`
`
`
`
`5
`INTERIM TERMS AND CONSTRUCTIONS
`SUBJECT TO COURT ORDER REQUIRING INTEL TO MAKE
`ADDITIONAL PRODUCTION OF CORE DOCUMENTS
`
`INTEL - 1045
`Page 5 of 5
`
`

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