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IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`PACT XPP SCHWEIZ AG,
`
`Plaintiff,
`
`v.
`
`INTEL CORPORATION,
`
`Defendant.
`
`)
`)
`)
`)
`)
`)
`)
`)
`)
`
`C.A. No. 19-1006-RGA
`
`INTEL CORPORATION’S INITIAL INVALIDITY CONTENTIONS
`
`
`
`PACT - Ex. 2011.0001
`
`

`

`
`
`Contentions, these phrases are indefinite because they do not have a meaning that can be clearly
`
`and definitely determined from the patent, and thus fails to put the public on notice of what is and
`
`is not covered by claims 4-5, 7-16, 18-19, 23-28, 30, 32-34, 36, 41, and 44.
`
`Claims 4-5, 7-16, 18-19, 23-28, 30, 32-34, 36, 41, and 44 are invalid because they are not
`
`enabled or described by the specification of the ’301 Patent. The subject matter of claims 4-5, 7-
`
`16, 18-19, 23-28, 30, 32-34, 36, 41, and 44 as applied in Plaintiff’s Infringement Contentions, and
`
`particularly the “programmably processing sequences,” “code sections,” “individually defining a
`
`power supply,” “runtime configurable,” and “state of the processing device” is not sufficiently
`
`shown in the specification of the ’301 Patent. The foregoing phrase is not described in such a way
`
`that one of ordinary skill in the art could implement it to achieve the results sought by the
`
`individuals named on the face of the ’301 Patent as inventors. The foregoing phrase is not
`
`described in such a way that a person having ordinary skill in the art at the time of the alleged
`
`invention would have understood that the individuals named as inventors on the face of the ’301
`
`Patent were in possession of the claimed subject matter. The asserted claims of the ʼ301 patent
`
`also do not comply with section 112 because they do not set forth what the applicant regards as
`
`the invention.
`
`A more detailed basis for the above indefiniteness, written description, and enablement
`
`defenses may be set forth in any expert report(s) on invalidity to be served by Intel in accordance
`
`with the Court’s Scheduling Order.
`
`IV.
`
`THE ’593 PATENT
`
`Claims 1, 2, 4-11, 14-17, 21-27 of the ’593 Patent (the “Asserted ’593 Patent Claims”)
`
`have been asserted by Plaintiff in this litigation.
`
`-36-
`
`PACT - Ex. 2011.0002
`
`

`

`
`
`
`
`A.
`
`Identification of Prior Art, Basis for Invalidity Under 35 U.S.C. §§ 102, 103
`and Claim Charts
`1.
`
`Anticipation
`
`Based on Plaintiff’s October 11, 2019 Disclosure of Asserted Claims and Infringement
`
`Contentions, Intel identifies prior art below and in Exhibit D, which contains charts disclosing
`
`the identity of each item of prior art that anticipates each claim and/or renders it obvious. As
`
`shown in Exhibit D and below, Intel has identified each prior art patent by its number, country of
`
`origin, and date of issue. To the extent feasible, Intel has identified each prior art publication by
`
`its title, date of publication, author, and publisher. Intel notes that it has applied the prior art in
`
`accordance with Plaintiff’s improper assertions of infringement and improper applications of the
`
`claims. Intel does not agree with Plaintiff’s application of the claims and denies infringement.
`
`As set forth in Exhibit D and below, each of the following references, and any products,
`
`devices, or processes used in the prior art that embody the subject matter disclosed in the
`
`references, anticipates one or more asserted claims of the ’593 Patent by expressly or inherently
`
`disclosing each and every limitation of those claims. To the extent PACT contends that any of the
`
`following anticipatory references do not anticipate any asserted claim, Intel reserves the right to
`
`contend that each of the anticipatory references renders the claims obvious either in view of the
`
`reference alone or in combination with other references. A corresponding claim chart for each
`
`reference is attached hereto in Exhibit D as indicated in the “Exh. No.” column.
`
`While Intel has identified at least one citation per element or limitation for each reference
`
`identified in the charts contained in Exhibit D, each and every disclosure of the same element or
`
`limitation in the same reference is not necessarily identified. In an effort to focus the issues,
`
`Intel cites exemplary relevant portions of identified references, even where a reference may
`
`contain additional disclosure for a particular claim element or limitation, and reserves all rights
`
`-37-
`
`PACT - Ex. 2011.0003
`
`

`

`
`
`to rely on other portions of the identified references to support its claims and/or defenses.
`
`Persons of ordinary skill in the art generally read a prior art reference as a whole and in the
`
`context of other publications and literature. Intel may rely on uncited portions of the prior art
`
`references and on other publications and expert testimony to provide context and as aids to
`
`understanding and interpreting the portions of the prior art references that are cited. Disclosures
`
`relating to initial elements of dependent claims are disclosed in connection with the independent
`
`claims from which they depend. Intel may also rely on uncited portions of the prior art
`
`references, other publications, and the testimony of experts to establish that a person of ordinary
`
`skill in the art would have been motivated to modify or combine certain of the cited references so
`
`as to render the claims obvious. Where Intel cites to a particular figure in a prior art reference,
`
`the citation should be understood to encompass the caption and description of the figure and any
`
`text relating to the figure in addition to the figure itself. Conversely, where a cited portion of text
`
`refers to a figure, the citation should be understood to include the figure as well.
`
`a.
`
`Prior Art Patents and Domestic and Foreign Patent
`Applications Under 35 U.S.C. § 102
`
`Patent / Publication No. Country
`
`Inventor(s)
`
`Date of Issue
`
`Exh.
`No.
`
`D1
`
`6,457,087
`
`U.S.
`
`Daniel D. Fu
`
`September 24,
`2002
`
`D2
`
`0071727A1
`
`D3
`
`D4
`
`6,240,458
`
`5,197,140
`
`EP
`
`U.S.
`
`U.S.
`
`Robert L. Budzinski and
`Satish M. Thatte
`
`February 16,
`1983
`
`Roger Lee Gilbertson
`
`May 29, 2001
`
`Keith Balmer
`
`March 23, 1993
`
`-38-
`
`PACT - Ex. 2011.0004
`
`

`

`Patent / Publication No. Country
`
`Inventor(s)
`
`Date of Issue
`
`Exh.
`No.
`
`D5
`
`2002/0016891
`
`D6
`
`5,909,702
`
`D7
`
`5,761,523
`
`U.S.
`
`U.S.
`
`U.S.
`
`Karen L. Noel, Gregory
`H. Jordan, Paul K. Harter
`Jr., and Thomas Benson
`
`Feburary 7,
`2002
`
`Marc Jalfon, David
`Regenold, Franco Ricci,
`and Ramprasad Satagopan
`
`June 1, 1999
`
`Paul Wilkinson, James
`Dieffenderfer, Peter
`Kogge, Nicholas
`Schoonover
`
`June 2, 1998
`
`b.
`
`Prior Art Product
`
`Exh. No. Product Name
`
`D8
`
`D9
`
`D10
`
`D11
`
`--
`
`TMS320C80
`
`POWER4
`
`Intel IXP2800
`
`Date6
`
`1996
`
`1999
`
`1999
`
`Sequent NUMA-Q
`
`1997
`
`Intel Nehalem-EX7
`
`2010
`
`2.
`
`Obviousness
`
`See obviousness discussion supra Section I.A.2.
`
`6 See 93613DOC0000003-4. Intel reserves the right to modify and supplement this information
`in the event that additional data is identified.
`7 Nehalem-EX was sold by Intel at least as early as January 15, 2010. PACT is not entitled to a
`priority date earlier than the filing date of the application leading to the ’593 patent. To the
`extent PACT cannot prove an earlier priority date, the Nehalem-EX processor would invalidate
`the ’593 patent for at least the reasons set forth in PACT’s infringement contentions.
`
`-39-
`
`PACT - Ex. 2011.0005
`
`

`

`
`
`Intel contends that one of ordinary skill in the art, at the time of the alleged invention of
`
`the Asserted ’593 Patent Claims was made, would have been motivated to combine the references
`
`disclosed herein in such a way to reach the alleged inventions. The teaching, suggestion, or
`
`motivation to combine these references, although not required, is explicitly or implicitly found in
`
`one or more of the following: the knowledge or common sense of one of ordinary skill in the art;
`
`the prior art references themselves and/or the prior art as a whole, including interrelated teachings
`
`of multiple prior art references; the subject matter acknowledged as prior art in the ’593 Patent;
`
`the nature of the problem to be solved and the existence of similar improvements in similar
`
`applications; design incentives and other market forces, including the advantages of creating a
`
`superior and more desirable product and the effects of demands known to the design community
`
`or present in the marketplace; the ability to implement the alleged invention as a predictable
`
`variation of the prior art; improvements in similar devices; the interrelated teachings of multiple
`
`prior art references; any needs or problems known in the field addressed by the ’593 Patent; and
`
`the number of identified, predictable solutions to the problem addressed by these patents. In
`
`addition, the simultaneous (and/or prior) inventions described above, and elsewhere in these
`
`contentions) is evidence that motivation to combine the concepts described in the various prior art
`
`references did, in fact, exist, and they were, in fact, combined. The combinations evidencing
`
`teachings, suggestions, and/or motivations to combine the prior art references in a way that renders
`
`the asserted claims obvious are merely exemplary. A person of ordinary skill would have access
`
`to the materials found in the attached Exhibits and would have at least the ordinary creativity and
`
`skill to combine the attached references in ways not explicitly recited above.
`
`Exhibit D and the table below identifies prior art that anticipates each asserted claim or that
`
`in combination renders the asserted claims obvious, under Plaintiff’s erroneous assertions and/or
`
`-40-
`
`PACT - Ex. 2011.0006
`
`

`

`applications of the claims as noted above. The following is a list of prior art references that, either
`
`alone, or in combination with the knowledge of one skilled in the art, and/or in combination with
`
`other prior art references, render obvious one or more asserted claims of the ’593 Patent, as
`
`indicated in the associated claim charts. Intel contends that all claims that are anticipated by a
`
`particular reference are also rendered obvious by that same reference alone, or in combination with
`
`the other references, discussed below.
`
`Regarding the motivation to modify or combine references, said motivation to modify or
`
`combine references, unless otherwise stated, is provided by the discussions in the cited references,
`
`the state of the art discussed in the references of Exhibit D, and the knowledge of one of ordinary
`
`skill in the art. One of skill in the art would have been motivated to combine these references,
`
`because these references relate to common objectives and subject matter. The references share
`
`commonalities in terms of their general subject matter as well as the types of equipment, products,
`
`and/or approaches used. Further, the prior art references explicitly or implicitly reference other
`
`prior art references, share common authors or inventors, were published in the same journals,
`
`presented at the same conferences, and/or were developed at common companies, schools, or
`
`organizations which would motivate one of skill in the art to combine them. These references are
`
`within the field of the asserted patents and are directed to similar subject matter within the field.
`
`Additionally, the references, and any products, devices, or processes described in the references,
`
`existed and/or were invented in the same time period providing further motivation for combination.
`
`Intel provides these disclosures without prejudice to any arguments or objections concerning the
`
`relevance of motivation to combine in connection with any invalidity contentions.
`
`For example, the prior art references all are directed to interconnecting processors,
`
`memory, and other components within a multiprocessor device. See, e.g., TMS320C8x System-
`
`-41-
`
`PACT - Ex. 2011.0007
`
`

`

`
`
`Level Synopsis at Fig. 2-1; Power4 Redbook at 6; Customer Information Book, Rev. 0.3 at 104;
`
`NUMA-Q SMP White Paper at Fig. 6; Wilkinson ’523 at Abstract; 12:1-9; Gilbertson ’458 at
`
`5:37-55; Budzinski ’727 at 1:5-10; Noel ’681 at Claim 1; Balmer ’140 at 2:67-3:10; Fu ’087 at
`
`Abstract; Jalfon ’702 at 1:44-63. The references all use the same general architecture of arranging
`
`processing elements and memory, which are connected via bus systems with secondary
`
`connections. See e.g., Budzinski at 7:5-10; Gilbertson ’458 at 5:37-55; Fu ’087 at FIGS. 2, 13;
`
`Noel ’681 at Claim 1; Jalfon ’702 at 1:44-63; Wilkinson ’523 at Abstract; Balmer ’140 at Abstract;
`
`TMS320C8x System-Level Synopsis at FIG. 2-2; Customer Information Book, Rev. 0.3 at 104;
`
`Power4 Focuses on Memory Bandwidth at FIGS. 1, 2; STiNG: A CC-NUMA Computer System
`
`for the Comercial Marketplace at FIGS. 2.1, 2.2. In addition, the ’593 patent itself admits that
`
`systems with segmented buses were known in the art. See, e.g., ’593 patent at 2:18-30. Further,
`
`the recitations in claims 1 and 16 of the ’593 patent of multiprocessor systems using bus systems
`
`flexibly interconnecting components and having a seconday bus path consist of mere duplication
`
`of concepts in the prior art, and have no patentable significance given that no unexpected result
`
`occurs—the arrangement of elements and transfer of data occur as a person of ordinary skill in the
`
`art would expect. See MPEP 2144.04(VI)(B); In re Harza, 274 F.2d 669 (CCPA 1960). Other
`
`examples of these concepts are cited in the attached charts for these references.
`
`As another example, of the relevant references were disclosed years before the provisional
`
`application for the ’593 patent was filed, which demonstrates these teachings would have been
`
`available to a person of ordinary skill in the art. See, e.g., TMS320C8x System-Level Synopsis;
`
`Power41999 Microprocessor Presentation; IXP2800 Customer Information Book, Rev. 0.3;
`
`NUMA-Q SMP White Paper; Wilkinson ’523; King ’455; Budzinski ’727 at 1:5-10; Noel ’681;
`
`Distinti ’327; Balmer ’140; Fu ’087; Jalfon ’702. Further, a person of ordinary skill in the art
`
`-42-
`
`PACT - Ex. 2011.0008
`
`

`

`
`
`would have understood they could look to art related to programamble or reconfigurable bus
`
`architectures, which includes the combination art here. See, e.g., TMS320C8x System-Level
`
`Synopsis at Fig. 2-1; Power4 Redbook at 6; Customer Information Book, Rev. 0.3 at 104; NUMA-
`
`Q Redbook at FIG. 2; Wilkinson ’523 at Abstract; 12:1-9; King ’455 at Abstract; 2:47-53;
`
`Budzinski ’727 at 1:5-10; Noel ’681 at Claim 1; Balmer ’140 at 2:67-3:10; Fu ’087 at Abstract;
`
`Jalfon ’702 at 1:44-63. Moreover, several of the relevant refernces contain overlapping assigness.
`
`See e.g., TMS320C80, Budzinski ’727, and Balmer ’104; Power4, NUMA-Q, and Wilkinson;
`
`IXP2800 and Jalfon ’702.
`
`Primary Reference
`
`In Combination With
`
`TMS320C80
`
`TMS320C80
`
`TMS320C80
`
`TMS320C80
`
`TMS320C80
`
`TMS320C80
`
`TMS320C80
`
`POWER4
`
`POWER4
`
`POWER4
`
`POWER4
`
`POWER4
`
`Budzinski ’727
`
`Gilbertson ’458
`
`Noel ’891
`
`Jalfon ’702
`
`Wilkinson ’523
`
`Balmer ’140
`
`Fu ’087
`
`Budzinski ’727
`
`Gilbertson ’458
`
`Noel ’891
`
`Jalfon ’702
`
`Wilkinson ’523
`
`-43-
`
`PACT - Ex. 2011.0009
`
`

`

`
`
`Primary Reference
`
`In Combination With
`
`POWER4
`
`POWER4
`
`IXP2800
`
`IXP2800
`
`IXP2800
`
`IXP2800
`
`IXP2800
`
`IXP2800
`
`IXP2800
`
`Balmer ’140
`
`Fu ’087
`
`Budzinski ’727
`
`Gilbertson ’458
`
`Noel ’891
`
`Jalfon ’702
`
`Wilkinson ’523
`
`Balmer ’140
`
`Fu ’087
`
`Sequent NUMA-Q
`
`Budzinski ’727
`
`Sequent NUMA-Q
`
`Gilbertson ’458
`
`Sequent NUMA-Q
`
`Sequent NUMA-Q
`
`Noel ’891
`
`Jalfon ’702
`
`Sequent NUMA-Q
`
`Wilkinson ’523
`
`Sequent NUMA-Q
`
`Balmer ’140
`
`Budzinski ’727
`
`Budzinski ’727
`
`Budzinski ’727
`
`Wilkinson ’523
`
`Jalfon ’702
`
`Gilbertson ’458
`
`Wilkinson ’523
`
`Jalfon ’702
`
`-44-
`
`PACT - Ex. 2011.0010
`
`

`

`
`
`Primary Reference
`
`In Combination With
`
`Wilkinson ’523
`
`Wilkinson ’523
`
`Fu ’087
`
`Fu ’087
`
`Fu ’087
`
`Fu ’087
`
`Fu ’087
`
`Fu ’087
`
`Balmer ’140
`
`Balmer ’140
`
`Balmer ’140
`
`Balmer ’140
`
`Balmer ’140
`
`Gilbertson ’458
`
`Noel ’682
`
`King ’455
`
`Budzinski ’727
`
`Balmer ’140
`
`Jalfon ’702
`
`Gilbertson ’458
`
`Noel ’682
`
`Budzinski ’727
`
`Noel ’682
`
`Gilbertson ’458
`
`Jalfon ’702
`
`Noel ’682
`
`Above combinations in further combination with the knowledge of a person of ordinary skill
`in the art
`
`B.
`
`Invalidity Under 35 U.S.C. § 112, ¶¶ 1-2
`
`Intel provides the following contentions relating to the invalidity of the asserted claims
`
`under 35 U.S.C. § 112, first and second paragraphs. These contentions are being proffered without
`
`expert disclosure or discovery.
`
`-45-
`
`PACT - Ex. 2011.0011
`
`

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