throbber
IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`Attorney Docket No.:

`United States Patent No.: 9,537,071
`112868-0001-656

`Inventors: Hirofumi Ichikawa,

`Masaki Hayashi, Shimpei Sasaoka,

`Tomohide Miki

`Formerly Application No.: 14/928,550

`Issue Date: January 3, 2017

`PCT Filing Date: August 27, 2009

`Filing Date: October 30, 2015

`Former Group Art Unit: 2895

`Former Examiner: Caridad Everhart
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`Petitioner: VIZIO, Inc.
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`Customer No.: 28120
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`LIGHT EMITTING DEVICE, RESIN PACKAGE, RESIN-MOLDED
`For:
`BODY, AND METHODS FOR MANUFACTURING LIGHT EMITTING DE-
`VICE, RESIN PACKAGE AND RESIN-MOLDED BODY
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`MAIL STOP PATENT BOARD
`Patent Trial and Appeal Board
`United States Patent and Trademark Office
`Post Office Box 1450
`Alexandria, Virginia 22313-1450
`
`DECLARATION OF DR. STANLEY R. SHANFIELD
`IN SUPPORT OF PETITION FOR INTER PARTES REVIEW OF
`UNITED STATES PATENT NO. 9,537,071
`
`NICHIA EXHIBIT 2009
`Vizio, Inc. v. Nichia Corporation
`Case IPR2018-00386
`
`VIZIO Ex. 1003 Page 0001
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`TABLE OF CONTENTS
`INTRODUCTION ........................................................................................... 1
`I.
`BACKGROUND AND QUALIFICATIONS ................................................. 1
`II.
`PRIORITY DATE AND ONE OF ORDINARY SKILL ............................... 6
`III.
`IV. MATERIALS RELIED UPON ....................................................................... 8
`BACKGROUND ON THE STATE OF THE ART ........................................ 8
`V.
`VI. ANALYSIS OF THE ’071 PATENT ............................................................ 18
`A.
`Overview of the ’071 Patent ................................................................ 18
`B.
`Overview of the ’071 Patent Prosecution History .............................. 28
`Claim Construction of the ’071 Patent Claims ................................... 31
`C.
`VII. THE CHALLENGED CLAIMS ARE INVALID ......................................... 32
`A.
`Legal Standards ................................................................................... 32
`Claims 1, 2, 4-9, 11-12, 15-19, 21-23, and 25 Are Unpatentable Under
`B.
`§§ 102 and/or 103 Over Loh, Mori, Wang and/or Oshio .................... 37
`1.
`Overview of U.S. Patent Publication No. 2008/0012036
`(“Loh”) ...................................................................................... 37
`Overview of U.S. Patent Publication No. 2005/0211991
`(“Mori”) .................................................................................... 43
`Overview of U.S. Patent Publication No. 2008/0073662
`(“Wang”) ................................................................................... 45
`Overview of U.S. Patent Publication No. 2005-0280017
`(“Oshio”) ................................................................................... 48
`Invalidity of Claim 1 Over Grounds 1 and 2 (Loh) .................. 50
`Invalidity of Claim 4 Over Grounds 1 and 2 (Loh) .................. 67
`Invalidity of Claim 8 Over Grounds 1 and 2 (Loh) .................. 68
`Invalidity of Claim 9 Over Grounds 1 and 2 (Loh) .................. 69
`Invalidity of Claim 11 Over Grounds 1 and 2 (Loh) ................ 69
`Invalidity of Claim 12 Over Grounds 1 and 2 (Loh) ................ 70
`Invalidity of Claim 15 Over Grounds 1 and 2 (Loh) ................ 71
`Invalidity of Claim 16 Over Grounds 1 and 2 (Loh) ................ 73
`Invalidity of Claim 17 Over Grounds 1 and 2 (Loh) ................ 77
`Invalidity of Claim 18 Over Grounds 1 and 2 (Loh) ................ 77
`Invalidity of Claim 25 Over Grounds 1 and 2 (Loh) ................ 77
`Invalidity of Claim 2 Over Ground 3 (Loh and Mori) .............. 78
`Invalidity of Claim 19 Over Ground 3 (Loh and Mori) ............ 83
`Invalidity of Claim 5 Over Ground 4 (Loh and Wang) and,
`alternatively, Ground 5 (Loh, Wang, and Oshio) ..................... 83
`Invalidity of Claim 6 Over Ground 4 (Loh and Wang) and,
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`5.
`6.
`7.
`8.
`9.
`10.
`11.
`12.
`13.
`14.
`15.
`16.
`17.
`18.
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`19.
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`i
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`2.
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`3.
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`4.
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`20. 
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`21. 
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`alternatively, Ground 5 (Loh, Wang, and Oshio) ..................... 91 
`Invalidity of Claim 7 Over Ground 4 (Loh and Wang) and,
`alternatively, Ground 5 (Loh, Wang, and Oshio) ...................100 
`Invalidity of Claim 21 Over Ground 4 (Loh and Wang) and,
`alternatively, Ground 5 (Loh, Wang, and Oshio) ...................107 
`Invalidity of Claim 22 Over Ground 4 (Loh and Wang) and,
`alternatively, Ground 5 (Loh, Wang, and Oshio) ...................108 
`Invalidity of Claim 23 Over Ground 4 (Loh and Wang) and,
`alternatively, Ground 5 (Loh, Wang, and Oshio) ...................108 
`VIII.  SECONDARY CONSIDERATIONS .........................................................108 
`IX.  CONCLUSION ............................................................................................109 
`
`APPENDIX A (Curriculum Vitae)
`APPENDIX B (List of Materials Considered)
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`22. 
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`23. 
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`
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`ii
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`I, Dr. Stanley Shanfield, hereby declare under penalty of perjury under the
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`laws of the United States of America:
`
`I.
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`INTRODUCTION
`1.
`I have been retained to provide assistance regarding U.S. Patent
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`No. 9,537,071 (“the ’071 patent”). Specifically, I have been asked to consider the
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`validity of claims 1, 2, 4-9, 11-12, 15-19, 21-23, and 25 of the ’071 patent (the
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`“Challenged Claims”). I have personal knowledge of the facts and opinions set
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`forth in this declaration, and believe them to be true. If called upon to do so, I
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`would testify competently thereto. I have been warned that willful false statements
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`and the like are punishable by fine or imprisonment, or both.
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`2.
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`I am being compensated for my time at my standard consulting rate of
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`$385 per hour. I am also being reimbursed for expenses that I incur during the
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`course of this work. My compensation is not contingent upon the results of my
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`study, the substance of my opinions, or the outcome of any proceeding involving
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`the challenged claims. I have no financial interest in the outcome of this matter or
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`on the pending litigation between Petitioner and Patent Owner.
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`3.
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`A table of contents and a list of exhibits referenced herein are
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`included above.
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`II. BACKGROUND AND QUALIFICATIONS
`4.
`I offer statements and opinions on behalf of Petitioner VIZIO, Inc.
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`(“VIZIO” or “Petitioner”), generally regarding the validity, novelty, prior art,
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`anticipation and obviousness considerations, and understanding of a person of
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`ordinary skill in the art (“POSITA”) as it relates to U.S. Patent No. 9,537,071
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`(“the ’071 patent”). Attached hereto as Appendix A, is a true and correct copy of
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`my Curriculum Vitae describing my background and experience.
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`5.
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`As set forth in my curriculum vitae, I received a B.S. degree in
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`Physics from the University of California, Irvine in 1977, and was a member of the
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`Phi Beta Kappa Society. In 1975, I received the University of California Regents
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`Award for Outstanding Research on experimental and theoretical work on rotating
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`relativistic electron beams. Under full Energy Research and Development
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`Administration scholarship, I received a Ph.D. in Physics from the Massachusetts
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`Institute of Technology in 1981.
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`6.
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`Starting in 1985 at Raytheon Research Division, most of my work
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`focused on the development, packaging, and testing of semiconductor devices,
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`including devices made using GaAs, AlGaAs, InGaAs, GaN, and SiC. During the
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`late 1980s and most of the 1990s, I was directly involved in the epitaxial growth
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`and packaging of electronic devices and integrated circuits, specialized light
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`emitting diode (LED) devices and optical detectors. Along with other activities, I
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`produced, packaged and tested LEDs for government and commercial applications
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`e.g. display illumination devices, fiber optic modules, and detection instruments.
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`Experimental and small lot production LEDs were placed in metal-ceramic
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`packaging and, later, in compression or transfer-molded thermoset packages
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`manufactured on leadframes.
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`7.
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`During the time period of 1996-1999 at Raytheon Commercial
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`Electronics as Semiconductor Operations Director, I was responsible for integrated
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`circuit fabrication, device packaging, and electronic assembly manufacturing. This
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`included the operation of a large-scale, 24-hour component and integrated circuit
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`manufacturing facility with on-site and overseas (S. Korea) chip and optical device
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`packaging facilities. In addition to performing higher cost packaging efforts, these
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`facilities manufactured compression or transfer molded packaging with punched
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`and plated leadframes. I was directly involved in establishing packaging operations,
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`including equipment selection and evaluation, packaging process development,
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`final test and reliability evaluation. As part of my activities, I led teams that
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`investigated thermoset packaging issues for high power devices (including LEDs),
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`as well as packaging yield loss and in-depth device failure analysis.
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`8.
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`From 1999 to 2003 I co-founded a start-up company, AXSUN
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`Technologies, and became the VP of Operations. AXSUN developed a new
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`electro-optical assembly platform and used it to build miniature optical modules
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`for fiber optic communications systems. I was directly involved in the
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`development and manufacturing of the company’s flagship product, and devised
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`custom packaging of a high power super-luminescent LEDs. I received a patent for
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`the key electro-optical component in this product. The company, which grew to
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`more than 100 employees by 2001, was eventually sold.
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`9.
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`Since 2003 I have served at the Charles Stark Draper Laboratory
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`(“Draper Laboratory”) in Cambridge, Massachusetts, ultimately becoming a
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`Distinguished Member of the Technical Staff and Technical Director in the
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`Advanced Hardware Development Division. For several years, I led the Advanced
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`Hardware Development Division (consisting of approximately 80 staff members)
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`in their work on the laboratory’s high density multi-chip packaging technology.
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`This work involved the use of a multi-layer (miniature leadframe) and thermoset
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`encapsulation schemes suitable for packaging multiple chip components, including
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`LEDs and semiconductor lasers. I have led teams responsible for the design and
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`thermo-mechanical modeling of new packaging schemes and the development of
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`their manufacturing processes, and eventually received a patent for an ultra-high
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`density packaging process currently in use at Draper.
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`10. With respect to the manufacturing of packaged LED and other high
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`power semiconductor components, I have about 25 years of experience with most
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`of the possible manufacturing processes and materials involved, and understand the
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`relevant assembly and packaging manufacturing economics. My direct technical
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`experience includes work with plated copper leadframe assembly processes (and
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`plating processes in general, including masking and spot plating techniques),
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`thermoset molding methods and equipment (as well as other molding approaches),
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`die mounting (both eutectic and conductive epoxy), gold and aluminum
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`wirebonding techniques and equipment, molded leadframe dicing and singulation
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`methods, and a variety of package failure analyses on high power devices
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`(including an LED) in thermoset packages.
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`11.
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`I have authored more than 25 journal and conference papers,
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`including numerous papers on topics relating to semiconductor devices, electronic
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`circuit design and packaging.
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`12.
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`I have been invited to give professional talks at various conferences.
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`For example, in 1997, I gave an invited talk on “IC [Integrated Circuit]
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`Technologies for Wireless Applications Beyond 2000” and received an Author’s
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`award for my work in that area.
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`13.
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`I am a named inventor or co-inventor on the following nine U.S.
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`Patents:
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` U.S. Patent No. 8,653,897, entitled “Devices, systems, and methods for con-
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`trolling the temperature of resonant elements”
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` U.S. Patent No. 8,248,173, entitled “Devices, systems, and methods for con-
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`trolling the temperature of resonant elements”
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` U.S. Patent No. 7,727,806, entitled “Systems and methods for high density
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`5
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`multi-component modules”
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` U.S. Patent No. 6,836,366, entitled “Integrated tunable fabry-perot filter and
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`method of making same”
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` U.S. Patent No. 6,525,880, entitled “Integrated tunable fabry-perot filter and
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`method of making same”
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` U.S. Patent No. 5,880,483, entitled “Semiconductor devices”
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` U.S. Patent No. 5,223,458, entitled “Method of manufacturing a III-V semi-
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`conductor device using a self-biased substrate and a plasma containing an electro-
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`negative species”
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` U.S. Patent No. 4,526,673, entitled “Coating method”
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` U.S. Patent No. 4,440,108, entitled “Ion beam coating apparatus”
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`14.
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`I have previously testified in a number of patent cases, many of which
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`concerned integrated circuits and components, including optical components,
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`before various District Courts, the International Trade Commission and the Patent
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`Trial and Appeal Board. These engagements as well as a list of my publications
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`can be found on my curriculum vitae, attached as Appendix A.
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`15.
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`I have been qualified in multiple courts to offer expert opinions on
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`integrated circuits, optical and electronic devices, and their packaging technology.
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`III. PRIORITY DATE AND ONE OF ORDINARY SKILL
`16.
`I understand that the factors considered in determining the ordinary
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`level of skill in a field of art include the level of education and experience of
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`persons working in the field; the types of problems encountered in the field; and
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`the sophistication of the technology at the time of the invention, which I
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`understand is asserted to be September 3, 2008. I understand that a person of
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`ordinary skill in the art is not a specific real individual, but rather is a hypothetical
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`individual having the qualities reflected by the factors above. I understand that a
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`person of ordinary skill in the art would also have knowledge from the teachings of
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`the prior art, including the art cited below.
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`17.
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`In my opinion, on or before September 3, 2008, a person of ordinary
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`skill in the art (“POSITA”) relating to the technology of the ’071 patent would
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`have a minimum of a Bachelor’s degree in Physics, Electrical Engineering,
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`Material Science, or a related field, and approximately 5 years of professional
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`experience in the field of semiconductor technology, including manufacturing and
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`packaging processes for light emitting devices. Additional graduate education
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`could substitute for professional experience, or significant experience in the field
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`could substitute for formal education. A POSITA is presumed to have knowledge
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`of all relevant prior art, and would thus have been familiar with each of the
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`references cited herein, as well as the background knowledge in the art discussed
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`in Section V, and the full range of teachings they contain.
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`18. Well before September 3, 2008, my level of skill in the art was at least
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`that of a POSITA. I am qualified to provide opinions concerning what a POSITA
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`would have known and understood at that time, and my analysis and conclusions
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`herein are from the perspective of a POSITA as of September 3, 2008.
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`IV. MATERIALS RELIED UPON
`19.
`In reaching the conclusions described in this declaration, I have relied
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`on the documents and materials cited herein as well as those identified in Appendix
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`B attached to this declaration. These materials comprise patents, related
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`documents, and printed publications. Each of these materials is a type of document
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`that experts in my field would reasonably rely upon when forming their opinions.
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`20. My opinions are also based upon my education, training, research,
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`knowledge, and personal and professional experience.
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`V. BACKGROUND ON THE STATE OF THE ART
`21. Before the claimed priority date of the ’071 patent, it was well-known
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`in the art to manufacture light emitting diode (LED) packages comprising a resin
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`part and a metal part (referred to in the art as a lead or leadframe), and to use metal
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`leadframes with notches on four sides. As discussed further below, each element
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`of the Challenged Claims was disclosed in the prior art and well-known before the
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`claimed priority date.
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`22. LEDs and methods for manufacturing LEDs were well-known in the
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`art before the claimed priority date of the ’071 patent. E.g., Ex. 1004 (Loh) ¶ 2
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`(disclosing “packages for solid state light emitting devices and methods of forming
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`packages for solid state light emitting devices”); Ex. 1005 (Mori) ¶¶ 2, 45
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`(disclosing “a light-emitting apparatus and illuminating apparatus for radiating out
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`light that has been emitted from a light-emitting element such as a light-emitting
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`diode” and “a method for manufacturing the light-emitting apparatus”); Ex. 1006
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`(Wang) ¶ 2 (disclosing “a method of manufacturing high power light-emitting
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`device packages and structure thereof”); Ex. 1007 (Oshio) ¶¶ 2, 83 (disclosing “a
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`semiconductor light emitting device” and “a process of manufacturing a
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`semiconductor light emitting device”).
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`23.
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`It was also well-known and conventional in the art before the claimed
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`priority date of the ’071 patent to form a resin package for an LED comprising a
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`resin part and a metal part including first and second metal plates (known in the art
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`as leads). E.g., Ex. 1004 (Loh), Abstract, ¶¶ 60, 73, 76, 96, Figs. 5-8 (disclosing a
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`“package for a light emitting device” comprising “a leadframe … includ[ing] … a
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`plurality of leads” formed of “copper, aluminum or another metal” and “package
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`body 230 … formed on/around the leadframe” using “thermosets such as epoxy or
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`phenolic resin”); Ex. 1005 (Mori) ¶¶ 5-7, Figs. 1-3, 8-9 (disclosing a “light-emitting
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`apparatus” comprising “a molded lead terminal made of copper (Cu) or an iron
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`(Fe)-nickel (Ni) alloy [that] is fixedly arranged within the base bod[y]” and a
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`“frame bod[y]” made of “a resin material such as epoxy resin”); Ex. 1007 (Oshio)
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`¶ 49, Figs. 1-10 (disclosing a “semiconductor light emitting device” that
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`“comprises a pair of leads 20 and 30, and embedding resin 40”). And it was well-
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`known in the art before the claimed priority date to form a resin package for an
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`LED having four outer lateral surfaces and a concave portion having a bottom
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`surface. E.g., Ex. 1004 (Loh) ¶¶ 79, 96, Figs. 5, 7 (disclosing a resin package
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`having four outer lateral surfaces and “a reflector cup above and surrounding the
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`die mounting regions”); Ex. 1007 (Oshio) ¶ 61, Figs. 1-4, 5A, 6-10, 16-17
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`(disclosing a resin package having four outer lateral surfaces where “the
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`embedding resin 40 has a recess 40C, at the bottom of which are exposed in part
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`the inner lead sections 20B and 30B including the recess 20C of the lead”); Ex.
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`1008 (Koung) ¶ 21, Figs. 2A-C (disclosing a resin package having four outer
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`lateral surfaces where “reflective base (230) has a recess (233)” with a bottom
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`surface).
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`24.
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`It was further well-known and conventional in the art before the
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`claimed priority date of the ’071 patent to mount a light emitting element on a
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`bottom surface of a concave portion of the resin package and to electrically
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`connect the light emitting element to the metal part (known in the art as a lead).
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`E.g., Ex. 1004 (Loh) ¶ 81, Figs. 5, 7 (disclosing that “solid state light emitting
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`devices 214 are mounted” on the bottom surface of a concave portion of a resin
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`package and “electrically connected to respective ones of the first electrical leads
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`206”); Ex. 1005 (Mori) ¶¶ 5, 7-8, 13, Figs. 8-9 (disclosing that a “light-emitting
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`element” is mounted on a bottom surface of a concave portion of a resin package
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`and “electrically connected” to the leads); Ex. 1007 (Oshio) ¶¶ 61-63, Figs. 1-2
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`(disclosing that “[t]he LED chip 10” is mounted on the bottom surface of a
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`concave portion of a resin package and “[t]he electrode of the LED chip 10 is
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`connected to the other inner lead section 30B via bonding wire 60”).
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`25.
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`It was further well-known in the art before the claimed priority date of
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`the ’071 patent to form a resin package such that at least a portion of an outer
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`lateral surface of the resin part and at least a portion of an outer lateral surface of
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`the metal part are coplanar at each of the four outer lateral surfaces of the resin
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`package. E.g., Ex. 1004 (Loh) ¶¶ 60, 73, 76, 96, Fig. 7 (disclosing that at least a
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`portion of an outer lateral surface of a resin part and at least a portion of an outer
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`lateral surface of a metal part are coplanar at each of the four outer lateral surfaces
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`of the resin package); Ex. 1008 (Koung) ¶¶ 20-21, 24, Fig. 2C (disclosing that at
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`least a portion of an outer lateral surface of a resin part and at least a portion of an
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`outer lateral surface of a metal part are coplanar at each of the four outer lateral
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`surfaces of the resin package); Ex. 1010 (Lin) ¶¶ 9, 25, Figs. 2a-2f, 3a-3b, 4a-4g
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`(disclosing that at least a portion of an outer lateral surface of a resin part and at
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`least a portion of an outer lateral surface of a metal part are coplanar at each of the
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`four outer lateral surfaces of the resin package).
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`26. And it was further well-known in the art before the claimed priority
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`date to form a notch in the metal part (known in the art as a lead) at each of the
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`four outer lateral surfaces of the resin package. E.g., Ex. 1004 (Loh) ¶¶ 60, 73, 76,
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`96, Figs. 6-7 (disclosing a notch in the leadframe at four outer lateral surfaces of
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`the resin package); Ex. 1008 (Koung) ¶¶ 20-21, 24, Figs. 2B-C, 3A-B, 4B-F
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`(disclosing a notch in the leadframe at four outer lateral surfaces of the resin
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`package); Ex. 1010 (Lin) ¶¶ 9, 25, Figs. 2a-2f, 3a-3b, 4a-4g) (disclosing a notch in
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`the leadframe at four outer lateral surfaces of the resin package).
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`27. And it was further well-known in the art before the claimed priority
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`date to form a resin package such that the resin part is located at left and right sides
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`of a portion of the metal part (known in the art as a lead) at at least two of the four
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`outer lateral surfaces of the resin package. E.g., Ex. 1004 (Loh) ¶¶ 60, 73, 76, 96,
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`Fig. 7 (disclosing that at at least two of the four outer lateral surfaces of the resin
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`package, the resin part is located at left and right sides of a portion of the metal
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`part); Ex. 1008 (Koung) ¶¶ 20-21, 24, Figs. 2B-C (disclosing that at at least two of
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`the four outer lateral surfaces of the resin package, the resin part is located at left
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`and right sides of a portion of the metal part); Ex. 1010 (Lin) ¶¶ 9, 25, Figs. 2a-2f,
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`3a-3b, 4a-4g (disclosing that at at least two of the four outer lateral surfaces of the
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`resin package, the resin part is located at left and right sides of a portion of the
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`metal part).
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`28. Using metal plates (known in the art as leads) that are substantially
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`flat and where all upper edges are coplanar was also well-known and conventional
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`in the art before the claimed priority date of the ’071 patent. E.g., Ex. 1004 (Loh)
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`¶ 73, Figs. 5-7 (disclosing metal plates that are substantially flat where all upper
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`edges are coplanar); Ex. 1006 (Wang) ¶ 9, Figs. 3-5 (disclosing metal plates that
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`are substantially flat where all upper edges are coplanar); Ex. 1008 (Koung) ¶ 20,
`
`Figs. 2A-2B, 4B (disclosing metal plates that are substantially flat where all upper
`
`edges are coplanar).
`
`29.
`
`It was further well-known in the art before the claimed priority date of
`
`the ’071 patent to use a metal part (known in the art as a lead) having a step portion,
`
`a concave portion, and/or a convex portion. E.g., Ex. 1004 (Loh) ¶¶ 73, 76, Fig. 5
`
`(disclosing a metal part having a step portion and/or concave portion); Ex. 1006
`
`(Wang) ¶ 9, Figs. 3-5 (disclosing that the leadframe has a step portion); Ex. 1007
`
`(Oshio) ¶¶ 52, 61, Figs 1-3 (disclosing a metal part having a step portion); Ex.
`
`1008 (Koung) ¶¶ 30, 32, Figs. 2A, 2D (disclosing a metal part having a step
`
`portion and/or concave portion).
`
`30. Plating the metal part (known in the art as a lead) on each of an upper
`
`surface and a lower surface of the base portion, the metal layers being made of a
`
`material that is different from that of the base portion, was further well-known and
`
`conventional in the art before the claimed priority date of the ’071 patent. E.g., Ex.
`
`
`
`13
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`VIZIO Ex. 1003 Page 0016
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`

`

`
`
`
`
`
`
`
`
`
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`1006 (Wang) ¶¶ 9, 13, 39, 41, 53-54; Figs. 2-5 (disclosing plating a metal layer
`
`made of a different material than the base portion on all surfaces of the metal
`
`leads); Ex. 1007 (Oshio) ¶ 69, Figs. 1-4 (disclosing plating a metal layer such as
`
`“silver (Ag), or nickel (Ni)/palladium (Pd)/gold (Au)” on all surfaces of the leads
`
`made of, e.g., a “copper (Cu) based alloy”).
`
`31.
`
`It was also well-known in the art before the claimed priority date of
`
`the ’071 patent to cut the metal part (known in the art as a lead) after plating, such
`
`that a metal layer (of plating) is disposed at all surfaces of the metal part except an
`
`outer lateral surface (and a portion thereof) of the metal part. E.g., Ex. 1006
`
`(Wang) ¶¶ 9, 13, 39, 41, 53-54, Figs. 2-5 (disclosing plating on all surfaces of a
`
`leadframe, then molding and cutting into individual packages, such that a metal
`
`layer of plating is disposed at all surfaces of the metal part except an outer lateral
`
`surface (and a portion thereof) of the metal part); Ex. 1007 (Oshio) ¶¶ 69, 114, Figs.
`
`4, 18B (disclosing plating on all surfaces of a leadframe, then molding and cutting
`
`into individual packages, such that a metal layer of plating is disposed at all
`
`surfaces of the metal part except an outer lateral surface (and a portion thereof) of
`
`the metal part).
`
`32.
`
`It was further well-known and conventional in the art before the
`
`claimed priority date of the ’071 patent to use a thermosetting resin. E.g., Ex. 1004
`
`(Loh) ¶¶ 88, 96-100 (disclosing “a body formed of a thermoset on a dual-gauge
`
`
`
`14
`
`VIZIO Ex. 1003 Page 0017
`
`

`

`
`
`
`
`
`
`
`
`
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`metal leadframe” and “thermosets such as epoxy or phenolic resin”); Ex. 1009
`
`(Park ‘697) ¶¶ 13, 1, 12, Abstract, Figs. 1-7 (disclosing a “thermosetting resin”).
`
`And it was well-known in the art before the claimed priority date to use a light
`
`reflecting material such as titanium dioxide in the resin part. E.g., Ex. 1004 (Loh)
`
`¶¶ 103, 80 (disclosing that “thermoset material[]” of the package body is “loaded
`
`with filler particles, such as…irregularly-shaped TiO2 (titanium dioxide) solid
`
`particles…to obtain desired…optical surface reflectance.”); Ex. 1009 (Park ‘697)
`
`¶¶ 13, 1, 12, Abstract, Figs. 1-7 (disclosing that “the reflection cup 91 having a
`
`reflector on the surface is produced from a TiO2-based white thermosetting resin 9
`
`by the transfer mold method”).
`
`33. Using a sealing member containing two or more kinds of phosphors to
`
`adjust the color of light emitted from the LED package was also well-known and
`
`conventional in the art before the claimed priority date of the ’071 patent. E.g., Ex.
`
`1005 (Mori) ¶ 5 (disclosing “a light-emitting apparatus 111 of conventional design”
`
`that includes a “light transmitting member” containing “two kinds of phosphors”
`
`which serve to “perform wavelength conversion on the light emitted from the light-
`
`emitting element”); Ex. 1010 (Lin) ¶ 29 (disclosing “an UV (ultra-violet) LED chip
`
`150 is buried in red, green, and blue phosphors 105”).
`
`34.
`
`It was further well-known in the art before the claimed priority date of
`
`the ’071 patent to expose a lower surface of the metal part (known in the art as a
`
`
`
`15
`
`VIZIO Ex. 1003 Page 0018
`
`

`

`
`
`
`
`
`
`
`
`
`
`lead) from the resin part directly under the light emitting element. E.g., Ex. 1004
`
`(Loh) ¶ 77, Figs. 5, 8 (disclosing that “[t]he package body 230 may expose the
`
`bottom surface 202b of the die mounting regions 202…of the leadframe 200”); Ex.
`
`1007 (Oshio) ¶ 50, Figs. 1, 3 (disclosing that “the portion of the lead 20 directly
`
`below the semiconductor light emitting chip (LED chip) 10 is not covered with the
`
`resin 40 and exposed”); Ex. 1008 (Koung) ¶ 21, Fig. 2A (disclosing “at least a
`
`portion of an lower surface of the dissipating board (210) and at least a portion of
`
`an lower surface of the electrodes (220) are exposed from a lower surface of the
`
`reflective base (230)”).
`
`35. And it was well-known in the art before the claimed priority date to
`
`expose at least a portion of the light emitting element from the resin part. E.g., Ex.
`
`1004 (Loh) ¶¶ 81, 96, Fig. 5 (disclosing that the solid state light emitting devices
`
`are exposed from the resin of the package body); Ex. 1005 (Mori) ¶¶ 5-7, Fig. 9
`
`(disclosing a “light-emitting element” exposed from the resin of the frame body);
`
`Ex. 1007 (Oshio) ¶ 61, Fig. 1 (disclosing that the “LED chip” is exposed from the
`
`resin part).
`
`36.
`
`It was also well-known in the art before the claimed priority date to
`
`dispose the resin part over a first portion of a metal layer (of plating) at the upper
`
`surface of the metal part (known in the art as a lead), and expose a second portion
`
`of the metal layer (of plating) at (and on) the upper surface of the metal part from
`
`
`
`16
`
`VIZIO Ex. 1003 Page 0019
`
`

`

`
`
`
`
`
`
`
`
`
`
`the resin part. E.g., Ex. 1006 (Wang) ¶¶ 9, 41, 44, Figs. 2-5 (disclosing that the
`
`encapsulant is disposed over a portion of an upper surface of a plated leadframe
`
`and a second portion of the upper surface of the plated leadframe is exposed from
`
`the encapsulant); Ex. 1007 (Oshio), ¶¶ 69, 71, Figs. 1, 4 (disclosing that the resin
`
`part is disposed over a portion of an upper surface of a plated leadframe and a
`
`second portion of the upper surface of the plated leadframe is exposed from the
`
`resin part); Ex. 1008 (Koung) ¶¶ 26, 20-21, Figs. 2A, 2D (disclosing that the resin
`
`part is disposed over a portion of an upper surface of a plated leadframe and a
`
`second portion of the upper surface of the plated leadframe is exposed from the
`
`resin part); Ex. 1009 (Park ‘697) ¶¶ 1, 12, Figs. 1a-c (disclosing that the resin part
`
`is disposed over a first portion of an upper surface of a silver-plated leadframe and
`
`a second portion of the upper surface of the silver-plated leadframe is exposed
`
`from the resin part).
`
`37.
`
`It was further well-known to form a resin package such that at least a
`
`portion of an outer surface of the resin part and at least a portion of an outer
`
`surface of the metal part are coplanar at an outer bottom surface of the resin
`
`package. E.g., Ex. 1004 (Loh) ¶ 77, Figs. 5, 8 (disclosing that a portion of an outer
`
`surface of the resin and a portion of an outer surface of the lead are coplanar at an
`
`outer bottom surface of the resin package); Ex. 1008 (Oshio) ¶ 50, Figs. 1, 3
`
`(disclosing that a portion of an outer surface of the resin and a portion of an outer
`
`
`
`17
`
`VIZIO Ex. 1003 Page 0020
`
`

`

`
`
`
`
`
`
`
`
`
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`surface of the lead are coplanar at an outer bottom surface of the resin package);
`
`Ex. 1008 (Koung) ¶ 21, Fig. 2A (disclosing that a portion of an outer surface of the
`
`resin and a portion of an outer surface of the lead are coplanar at an outer bottom
`
`surface of the resin package).
`
`VI. ANALYSIS OF THE ’071 PATENT
`A. Overview of the ’071 Patent
`38. The ’071 patent, entitled “[l]ight emitting device, resin package, resin-
`
`molded body, and methods for manufacturing light emitting device, resin package
`
`and
`
`resin-molded body”
`
`relates
`
`to semiconductor
`
`technology,
`
`including
`
`manufacturing and packaging processes for light emitting devices. E.g., Ex. 1001
`
`(’071 patent), 1:18-36. The ’071 patent states that such light emitting devices are
`
`used for, e.g., “light equipment, a display, a backlight of a mobile telephone, a
`
`movie lighting auxiliary light sourc

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