United States Patent
`Bechtolsheim et al.
`
`11»
`
`US005973951A
`
`(11) Patent Number:
`
`[45] Date of Patent:
`
`S97S901
`*Oct. 26, 1999
`
`[54] SINGLE IN-LINE MEMORY MODULE
`
`FOREIGN PATENT DOCUMENTS
`
`[75]
`
`Inventors: Andreas Bechtolsheim, Stanford;
`Edward Frank, Portola Valley; James
`Testa, Mountain View; Shawn Storm,
`Mt. View, all of Calif.
`
`[73] Assignee: Sun Microsystems, Inc., Palo Alto,
`Calif.
`
`(188 828 A2
`.
`European Pat. Off.
`7/1986
`11/1987
`0 246 025 Bl
`.
`European Pat. Off.
`10/1988
`0 287 274 A2
`European Pat. Off. .
`10/1990
`0 394 935 A2
`European Pat. Off.
`.
`11/1990
`0398 188 A2
`European Pat. Off. .
`6/1991
`0 434 543 AQ
`European Pat. Off. .
`10/1991
`0484062 Al
`European Pat. OF,
`.
`3/1992
`0476 685 A2
`European Pat. Off. .
`0571092 A2
`4/1993
`European Pat. Off,
`.
`59-144155
`6/1984
`Japan .
`[*] Notice:—This patent issued on a continued pros-
`62-155546
`7/1987
`Japan .
`ecution application filed under 37 CFR
`63-1970835
` 8/L9RS
`Japan.
`1,53(d), and is subject to the twenty year
`63-137957
`9/1988
`Japan .
`patent
`term provisions of 35 U.S.C.
`1258466
`10/1989
`Japan .
`1305562
`12/1989
`154(a)(2).
`Japan .
`02310644
`12/1990
`Japan .
`3248896
`11/1991
`Japan.
`Japan .
`3262055
`11/1991
`2 223 335
`4/1990 United Kingdom .
`OTHER PUBLICATIONS
`
`This patent is subject to a terminal dis-
`claimer.
`
`[21] Appl. No.: 08/878,705
`
`[22]
`
`Filed:
`
`Jun. 19, 1997
`
`Related U.S, Application Data
`
`[63] Continuation of application No. 08/643,094, May2, 1996,
`abandoned, which is a continuation of application No.
`08/473,073, Jun. 7, 1995, Pat. No. 5,532,954, which is a
`continuation of application No, 08/345,477, Nov. 28, 1994,
`Pat. No, 5,465,229, which is a continuation of application
`No. 08/279,824, Jul. 25, 1994, Pat. No. 5,383,148, which is
`a continuation of application No. 08/115,438, Sep. 1, 1993,
`abandoned, which is a continuation of application No.
`07/886,413, May 19, 1992, Pat. No, 5,270,964,
`
`[SL] Unt. Cho cccccsecsveecnsusersnennmneaene GLC 13/00
`[52] US. Ch oiccccccscssssunee 365/52; 365/51; 365/59;
`365/63
`wetimnn 365/52, 51, 58,
`365/63, 59
`
`[58] Field of Search oo...
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`3,161,859
`3,508,209
`
`12/1964 Medwin et al.
`4/1970 Augusta et al.
`
`.....ccces
`....ccce
`
`stresses 305/92
`siemens SOD
`
`Sams Computerfacts Compaq Portable 101709 Computer
`with schematics, 93 sheets, 1987.
`Kingston Technology Installation Guide—KTC-SLT 386/1,
`2, & 4 Memory Expansion Boards for Compaq SLT 386s/20,
`8 sheets, 1990.
`
`(List continued on next page.)
`
`Primary Examiner—Ian T. Nguyen
`Attorney, Agent, or Firm—Conley, Rose & Tayon, PC; B.
`Noel Kivlin
`
`[57]
`
`ABSTRACT
`
`for memory
`A single in-line memory module (SIMM)
`expansion in a computer system. The SIMM includes a
`plurality of memory chips surface-mounted on a printed
`circuit board. The printed circuit board includes a dual
`read-out connector edge adapted for insertion within a
`socket of the computer system. One or more driver chips
`may further be mounted on the printed circuit board and
`connected to distribute control signals to the memory chips.
`A full-width data path may further be connected between the
`dual read-out connector edge and the plurality of memory
`chips.
`
`(List continued on next page.)
`
`51 Claims, 6 Drawing Sheets
`
`
`
`
`
`
`
`
`
`
`
`
`
`1
`
`KINGSTON 1004
`
`KINGSTON 1004
`
`

`

`5,973,951
`
`Page 2
`
`OTHER PUBLICATIONS
`
`U.S. PATENT DOCUMENTS
`
`5,169,393
`12/1992 Yang Lee vcs eseceeecereers 439/296
`5,191,404
`we 257/724
`3/1993 Wuetal. ...
`
`6/1972 Ammon et al. owe 330/17
`3,671,917
`5,192,220
`3/1993 Billman et aal. ..
`we 439/327
`
`7/1972 Johnson... conssetesrentonrenaererensen, 4BO/B25
`3,680,038
`5,200,917
`4/1993 Shaffer et al. caccesesearnes JOS/SL
`LOSL9T2 Lymoo scteeeseeeeeees 450399
`3,701,078
`5,252,857
`10/1903 Kane-et al... 257/686
`. 439/329
`10/1975 Kasuya etal.
`3,912,353
`5,260,892
`vee 365/63
`11/1993 Testa sesso
`
`
`....
`wees 439/280
`9/1976 Anhalt et al.
`3.982.807
`5,263,870 11/1993 Billman et al
`os 439/108
`
`
`4,077,094
`3/1978 Cobaugh etal.
`. 339/176 MP a: ae hae ; ie =girs ee
`
`4/1978 Gi
`NaS
`22tassaimuiat: 439/326
`4.084.874
`EChtolsheim ef al. s..cceseeersee
`a2
`/)
`a!
`Es
`a 365/51
`4,163,289 wane oha
`» 405/52
`5,272,664 12/1993 Alexander etal.
`
`
`8/1979 Tasch, Jr...
`. 257/306
`4.164.751
`peer Peed ead . oe
`pone
`
`3/1981 McGinley .
`BF SIaea
`4,253,719
`439/329
`seus
`
`365/154
`oe ctene aPSSSTETE oe
`4,262,340
`4/1981 Sasaki et al
`7/1983 Penzel.......
`.. 365/236
`4394.753
`see
`ME ee Ren
`yeh
`
`5/1995 Kayimoto et ab. cueccaee 365/230,01
`ee
`5,420,824
`
`
`4,426,689=1/1984 Henle etal. i DS 5465 339 11/1995 B x ns
`
`
`
`
`echtolsheim et al. vce 365/52
`y
`3465226
`c
`L/L984 Hargis «1...
`vw 29/832
`4,426,773
`5,532,954
`7/1996 Bechtolsheimet alsiasssssenes 365/52
`4,428,635
`1/1984 Hamsher, Jr et al. we 459/265
`au
`E
`4,500,906
`2/1985 Olm0 et al. cece 257/211
`4.548.456
`10/1985 Robertson .
`« 439/373
`
`Kingston Technology KTC386/4000 (2001002) memory
`12/1985 Colleret al. wc339/64 M
`4,558,912
`board color photocopies, 3 sheets, 1989.
`4,051,416 BEES CLASPEDL. casesnemrenenaace 29/174
`
`Kingston Technology KTC386/4000 (2001002) memory
`Amey 365/52
`4,656,605
` 4/LO87 Clayton sigchscantes
`board schematic, 4 sheets, 1989.
`Sse aon a : ‘ see sees casteeeneeeneees sass
`.
`oe
`Pot
`aapca
`4695,
`{
`tabbe eb al... seeereee
`43
`?
`Kingston Technology KTV5000/16 (2001015) memory
`4,696,529
`9/1987 Verhoevenct al.
`439/267
`
` Doard color photocopies, 2 sheets, 1989.
`10/1987 Hvezda et al. scsesseansen 439/235
`4,700,998
`Kingston Technology KTV5000/16 (2001015) memory
`4,724,531
`2/1988 Angleton et al.cess365/181
`board schematic, 3 sheets, 1989.
`365/152
`4,727,513
`3/1988 Clayton........
`
`
`Kingston Technology KTC/SLT286—4 (2001075) memory
`» SOL/421
`4,740,808
`4/1988 Hawkins.
`...
`
`board color photocopy, 1 sheet, 1989.
`7/1988 Billmanetal. ..
`as 439/61
`4,756,694
`
`Kingston Technology KTC/SLT286—4 (2001075) memory
`SETBERGA SIREE Ct hy once
`aanee
`:
`fy
`. 395/800
`4,777,590 10/1988 Durkoset al.
`
`POard schematic, 2 sheets, 1989.
`11/1988 Thrush ctecscneeceenennsnneee 439/329
`4,781,612
`Kingston Technology KST4000/25 (2001086) memory
`4,706,224
`1/1980 Kawai etal. wissen 365/51
`board color photocopies, 2 sheets, 1990,
`4,802,132
`1/1989 Ohsawa.....
`365/230.03
`
`
`ABAZ538—G/LOBI Noschese wressesseseccrseeserssnnees 439/260 Kingston Technology KST4000/25 (2001086) memory
`sessrsrseneessssestone a board schematic, 2 sheets, 1990,
`ope ae ae GE AL.
`ALO cece rerccwamncnevcamvsssrear genes
`850,86
`{
`f
`:
`"361/386
`4.879.631
`11/1989 Soca ~
`Kingston Technology KTC/SLT386—4 (2001090) memory
`
`4,882,700 11/1989 Mauritz et al.
`..
`.. 430/51
`board color photocopies, 3 sheets, 1990.
`11/1989 Mueller et al. wccccccceceeeee 365/463
`4,884,237
`Kingston Technology KTC/SLT385—4 (2001090) memory
`1/1990) Quattrini et al. cccSOL/408
`4,891,789
`board schematic, 3 sheets, 1990,
`ZLIID SAND srupe-erene
`» 439/153
`ETD!
`Kingston Technology KDG16000 (2001092) memory board
`
`vee 439/326
`4.946.403
`8/1990 Billmanet al.
`z
`to
`9/1990 Kogugi et al. .......0.0.. 365/189.01
`4,958,322
` 0!0r photocopies, 2 sheets, 1990.
`4,973,270 11/1990 Billman et al. we. 439/630
`Kingston Technology KDG16000 (2001092) memory board
`....
`. 257/724
`4,984,064
`1/1991 Toshio et al.
`schematic, 3, sheets, 1990.
`
`4,990,097
`2/991 Billman et al,
`439/160
`Kingston Technology KTV31764/4 (2001122) memory
`pean aa eee ooesrnenmneecusiin a board color photocopies, 2 sheets, 1990,
`orbett ef al. cisiseissisrescrereeen S97
`092,
`a :
`i
`iE
`2/1991 Corbett cnn.
`-. 439/72
`4.992.850
`Kings on Technology KTV3176/4 (2001122) memory board
`
`. 257/724
`4,994,896
`2/1991 Uemura etal.
`Schematic, 3 sheets, Jan. 1991.
`
`6/1991 Sudo et al.ee 257/736
`5,021,866
`Kingston Technology KTC4000E (2001157) memoryboard
`5,026,297
`6/1991 Krehbiel...ee 439/326
`color photocopies, 3 sheets, 1988.
`5,043,792
`8/1991 Adachi
`6
`« 2OFTTS
`*
`779
`
`9/1991 Bluethmanetal.
`371/11
`5,051,994
`Kingston Technology KTC4000E (2001157) memory board
`
`5,061,990 10/1991 Arakawa et al. os. wwe 257/676|--Schematic, 6 sheets, 1988.
`
`wae 439/637
`......
`$082,459
`1/1992 Billman et al.
`Compaq computer (Model #101709) memory board #RA
`
`....
`w» 305/63
`5,089,993
`2/1992 Neal et al.
`004163 color photocoy, 1 sheet, 1986,
`
`. oe Compaq SLT/286 computer (Model 2680) memory board
`5,094,624
`3 ee Baal et al.
`Pre tae Sadey AMHR REIT cele
`#6C33027CM color photocopy, 1 sheet, 1988.
`6/1992 Windsor etal. oo 3 357/42
`=126.910
`Sun Microsystems, Inc. v. Dataram Corporation, Complaint
`
`5,138,434
`8/1992 Corbett et al.
`430/74
`For Patent Infringement and DemandFor Jury Trial dated
`G/L992 Yeung oc cececcnesereecee 305/326
`$145,396
`Aug. 29, 1996 (9 pages).
`
`vy Dataram Corporation, First
`ae ee Sass oe si italTNS ieee Seta
`Sun Microsystems,
`Inc.
`Sic Mcci mee
`Amended Answer and Counterclaims of Defendant Dataram
`5,162,970 1L/L992 David, In et ali saciciinee FTSZ
`Cc
`ion
`dated Feb. 27, 1997 (29
`11/1902 Anzelone etal.
`ceecsccuceecus 430/415
`5,162,979
`Orporation Gated
`Pep. ai,
`29 pages).
`
`we 365/52
`5,164,916
`11/1992 Wwuetal.
`..
`Alford, R., “The Pastest Portable: IBM’s P75 Road War-
`S.67,517 12/1992 Long wee 439/160
`nor,” BYTE, Apr. 1991, pp. 265-266 and 268.
`
`
`
`2
`
`

`

`5,973,951
`Page 3
`
`Burton, E., “Transmission—Line Methods Aid Memory—
`Board Design; Understanding Transmission Line Effects Is
`‘The Way To Keep Up With The Ever Increasing Speed of
`Memories,”Design Applications, Dec. 8, 1988, pp. 87-91.
`Technical Notice AVIION 4000 and 4020 Series Computer
`Systems, AVION Product Line, Customer Documentation,
`Data General Corporation, Mar. 1990, (excerpts—16 double
`sided sheets and | colored sheet of LOM Memory Module).
`Setting Up and Installing VMEbus Options in AVON
`Systems, AVIION Product Line, Customer Documentation,
`data General Corporation, Mar. 1993, (excerpts including
`Appendices A and B—15 doubled sided sheets).
`AViiON 300D Series Stations: Programming System Con-
`irol and [/O Registers, AVION Product Line, Customer
`Documentation, Data General Corporation, Aug. 1990,
`(excerpts including Chapters 1 and 2 and Appendix D—37
`double sided sheets),
`Expanding and Maintaining AVION 3000 and 4000 Series
`and Computer Systems, AVION Product Line, Customer
`Documentation, Data General Corporation,
`Jun. 1990.
`(excerpts including Appendix A, Index and Documentation
`Set—34 double sided sheets).
`Technical Notice for AViiON 3000 and 4000 Series Systems:
`Programming System Control and 1/O Registers, AVION
`Product Line, Customer Documentation, Data General Cor-
`poration, Jun, 1990, (excerpts including Chapter 7 and
`Appendix D—24 double sided sheets).
`Expanding and Maintaining AViiON 400 Series Stations,
`AVITION Product Line, Customer Documentation, Data
`General Corporation, Mar. 1990, (excerpts including Chap-
`ter 4 and Appendix B—12 double sided sheets),
`Setting Up and Starting AViiON 400 Series Stations, AVI-
`ION Produet Line, Customer Documentation, Data General
`Corporation, Mar. 1990, (excerpts including Appendices A
`and B—17 double sided sheets).
`AVION 100, 200, 300 and 400 Series Stations and AVIION
`3000 and 4000 Series Systems: Programming System Con-
`trol and L/O Registers, AVITON Product Line, Customer
`Documentation, Data General Corporation, Oct. 1991,
`(excerpts including Chapters 1, 2 and 4—62 double sided
`sheets).
`Setting Up, Starting, Expanding, and Maintaining AViiON
`Computer Systems: 400, 3000, and 4000 Series,Customer
`Documentation, Data General Corporation, Oct. 1991,
`{excerpts including Chapters 1, 6 and 8 and Appendices A
`and B—54 double sided sheets).
`Setting Up and Starting AVON 300D Series Stations,
`Customer Documentation, Data General Corporation, Aug.
`1990, (excerpts including Appendix A—17 double sided
`sheets).
`Setting Up, Starting, and Maintaining AViiON 210, 300CD,
`and 310 CD Workstations, Customer Documentation, Data
`General Corporation, Jun. 1993, (excerpts including Chap-
`ters 1 and 4, Appendices A-C—5?2 double sided sheets).
`Maintaining AVION 300 Series Stations, Customer Docu-
`mentation, Data General Corporation, Nov. 1989, (excerpts
`including Chapter 3, Appendix A—22 double sided sheets).
`1991 IC Master: 3 Advertiser Technical Data (excerpts—39
`double sided sheets).
`through
`Electronic Design: Loaded DSP chip speeds
`advanced applications, Mar. 19, 1997 (2 double sided
`sheets).
`VAXstation 3100 Model 76 Owner’s Guide, Digital Equip-
`ment Corp. 1991, (excerpts including Chapters 7-9, Appen-
`dices C—E, —69 double sided sheets).
`
`DECdirect: Desktop Edition, Winter/Spring 1991, pp. 1-3
`and 44-67 (15 double sided sheets).
`VAXstation 3100 Model 76 Maintenance Guide, Digital
`Equipment Corp. 1991, (excerpts including Chapters 2-4,
`—36 double sided sheets).
`DECdirect: Add-Ons, Upgrades, Desktop Solutions and
`Supplies for all Digital Systems, Spring/Summer 1989, pp,
`1-11 and 98-107 (12 double sided sheets).
`Miyamoto, et al, “A Fast 256Kx4 CMOS DRAM with a
`Distributed Sense and Unique Restore Circuit”, E.E.E. Jour-
`nal of Solid-State Circuits, vol. SC-22 (1987) OQct., No. 5,
`New York, U.S.A., pp. 861-866—double sided sheets).
`Nakahara, “Complex Multilayer Boards Vie for Space in
`Japanese Computers” Electronic Packaging & Production,
`Feb. 1987, pp. 71-75—double sided sheets).
`Minutes of Mecting Nos. 3-7 JC-42.5 Committee on
`Memory Cards and Modules; 1990-1991 (77 double sided
`sheets).
`Minutes of Meeting Nos. 45-52 JC-42.3 Committee on
`MOS Memories, 1988-1989 (239 double sided sheets).
`“HP720: Fast, Stylish”, UniX Today, Apr. 1991 (1 double
`sided sheet).
`“Multiprocessor Schemes: Which Is Best For You?”, EDN,
`Apr. 1989 (3 double sided sheets).
`Mitsubishi
`Electronics Advertisement:
`
`Transportable
`
`Memory Cards (1 sheet).
`VLSI MOS Memory RAM/ROM & Memory Cards, 1
`Quarter 1992, Mitsubishi Electronic Device Group.
`(2
`double sided sheets).
`Prasad, R., Surface Mount Technology: Principles and Prac-
`tice, Van Nostrand Reinhold, New York, 1989, pp. 10-13
`and 38-39 (4 double sided sheets).
`Sartore, R., “Seeking a Wide Berth,"BYTE Magazine, Nov.
`1989, pp. 307-308, 310, 312-318 (5 double sided sheets).
`Data Book MOS Memory: Commerical and Military Speci-
`fications, Texas Instruments, 1991, pp. 6-—16—LO7 (57 double
`sided sheets).
`Wawrzynek, R., “Tailor memory-sysiem architecture for
`your chosen DRAM,” Designer’s Guide dynamic RAMs:
`Part 2, EDN Apr. 13, 1989, pp. 157-162 and 164 (4 double
`sided sheets).
`IBM Personal System/2 Model 70 386 Quick Reference,
`Nov. 1987, (excerpts—12 double sided sheets and 2 colored
`sheets of IBM PS/2 2MB Memory Module and Memory
`Expansion Card).
`IBM Personal System/2 Model P70 386 Quick Reference,
`Nov. 1987 (excerpts—9 double sided sheets).
`IBM Personal System/2 Model P70 386 (Type 8573), Jan.
`23, 1990, (excerpts—11 double sided sheets).
`IBM 2-8MB 80386 Memory Expansion Option Technical
`Reference, Apr. 1988, (excerpts—11 double sided sheets).
`IBM Portable PS/2 Models P70 and P75, Technical Aware-
`ness Information, Course 40646, Jan. 1991, (excerpts—22
`double sided sheets).
`IBM Personal System/2
`IBM Product Announcement,
`Model P70 386 (8573-031) Mar. 20, 1990 (3 double sided
`sheets).
`Apple IGS Memory Expansion card Owner’s Guide, 1986,
`Apple Computer, Inc., pp. tii-vi and Chapters 1, 2, and 3 (11
`double sided sheets and 2 colored sheets).
`Apple IIGS Owner’ Guide, 1986, Apple Computer, Inc., pp.
`wi—xi and pp. L03, 124, 130-131, and 158 (8 double sided
`sheets).
`DEC MS01 SIMM samples (1 colored sheet).
`Gavilon Computer Memory Module (2 colored sheets).
`
`3
`
`

`

`5,973,951
`Page 4
`
`HP 3006 Module (1 colored sheet).
`Micron XCEED Card (1 colored sheet).
`NCRO Module (1 colored sheet).
`S-1l Memory Card Model #2065 (2 colored sheets).
`High Performance Package for Memory;
`IBM Technical
`Disclosure Bulletin, vol. 21, No. 2, Jul, 1978.
`Semiconductor Packaging Using “Chip Mate” Concept With
`Dual Inline Package (DIP) for Bonded Vias, Terminals and
`Reflowed Solder Pads and Using Chip Carrier for Relowed
`Solder Pads and Bonded Terminals; IBM Technical Disclo-
`sure Bulletin, vol, 27, No, 11, Apr. 1985,
`Dataram, Memory Upgrades for DECstation 2100/3100and
`5000/100 Series.
`Dataram, Memory Upgrades for DECsystem 5500.
`Dataram Memory for the AVILON Workstation, Paul Henke,
`dataram Corporation, pp. 1 and 2.
`Samsung Electronics, KM41C1000C/C/CSL, 1Mx1 Bit
`CMOS Dynamic RAM with Fast Page Mode, pp. 73 and 74.
`Texas Instruments, 3 State Outputs Drive Bus Lines or
`Buffer memory Address Registers, pp. 2691 and 2692.
`Dataram Announces Memory Boards for the DEC Microvax
`3X00 Series Including a Single Board 32MB Version,
`DEC-Compatible Memory Expansion Boards for Microvax
`3X00 Series Computers, DR-300.
`Wide Word System, Data Ram, The Off-the-Shelf Founda-
`tion for All High Speed Data Handling Problems, pp. 1-9.
`Dataram, Memory Upgrades for VAX 6000, 1 page.
`Brochure, “DR 5100 memory for DECsystem 5100, VAX-
`station 3100 Model 76, VAXstation 4000 Model 60 and 90
`VAX 4000 Model 100, and Micro VAX 3100 Model 30, 40,
`80and 90 workstations”, Dataram, ‘The Memory Specialists
`Apr. 1993, 2 pages.
`Texas Instruments, MOS Memory Data Book Commerical
`and Military Specifications, 1991, Houston, Texas pp. 6-1
`through 6—LO7.
`Mitsubishi Electric Corp., Semiconductor Marketing Divi-
`sion, Mitsubishi
`Semiconductors Memories RAM
`Databook, May 1990, Japan, pp. 1-1 through 6-60.
`PERICOM Semiconductor Corp., Application brief—5,
`PI74PCT162344T For Heavy Load Applications, pp.
`692-693.
`PERICOM Semiconductor Corp., Application Specific.
`PI74PCT162244MT, Jun. 21, 1995 p. 1-8.
`‘leleMagic Enterprise, General Features and Specs, down-
`loaded from hittp:/+www.telemagic.com/html/enspec1.htm,
`Jun. 11, 1997, 6 pages.
`Lattice Semiconductor Corp., Specifications ispLSI® and
`pLSI 2032®, Sep. 1996, pp. 1-16.
`Advanced Micro Devices, MACH211-7/10/12/15/20 High-
`Density EE CMOSProgrammable Logic, Pub. #19601, Rev,
`B. Issue date: Sep. 1995, pp. 1-38.
`Xilinx, Ordering Information, Jun. 1, 1996 (Version 1.0), 3
`pages.
`Specifications
`Corporation,
`Semiconductor
`Lattice
`GAL22LV10, 1996 Data Book, pp. 3-251 through 3-268.
`Digital Equipment Corporation, Digital Storage Technology
`Handbook, 1989.
`Digital Equipment Corporation, PDP—11 Architecture Hand-
`book, 1983.
`A. Feller et al., “Crosstalk and Reflections in High-Speed
`Digital Systems”, Radio Corp. OF America Computer
`Advanced Product Research, Camden, New Jersey, pp.
`511-525,
`
`(12
`
`John A. DeFalco, “Reflection and Crosstalk in Logic Circuit
`Interconnections,” Honeywell, Inc., IEEE Spectrum, Jul.
`1970, pp. 45-50.0.
`William K. Springfield, IBM Corp., “Designing Transmis-
`sion Lines Into Multilayer Circuit Boards”, Electronics,
`Nov. 1, 1965, pp. 90-96.
`O. Gene Gabbard, COMSAT Laboratories, “High-Speed
`Digital Logic For Satellite Communications”, Electro—Tech-
`nology—Apr. 1969, pp. 59-65.
`H.R. Kaupp, “Characteristics of Microstrip Transmission
`Lines”, IEEE Transactions on Electronics Computers, Apr.
`1967, pp. 185-193.
`Digital Equipment Corporation, DECdirect catalog (RV),
`Fall/Winter 1989.
`Digital Equipment Corporation, VAXBI Options handbook,
`1986,
`Motorola, Inc., MECL System Design handbook, Fourth
`Edition, 1983,
`AMP Dual Read—Out SIMM Sockets, Supplement 82834,
`(May 1991), (4 pages).
`AMP Product Specification (Tentative 108-1303,
`pages).
`AMP Customer Drawing 90-1439-24, (2 pages).
`AMP Customer Drawing 91-1793-1, (2 pages).
`Top, bottom and side views of Atari CX853 Memory Mod-
`ule (color copy), (1 page).
`Top and bottom views Printed Circuit Board of Atari CX853
`(color copy), (1 page).
`Sams Computerfacts Technical Service Data, Atari Model
`800 Computer, (41 pages).
`Rockwell R650X% and R651X% Microprocessors (CPU) Data
`Sheet, (16 pages).
`S54ACQ/74.ACQ244-54.ACTOQO/
`National Semiconductor
`7T4ACTQ244 Quiet Series Octal Buffer/Line Driver with
`Tri-State Outputs, (10 pages).
`Texas Instruments, SN54157 Data Sheet, (8 pages).
`Texas Instruments, SN5410 Data Sheet, (1 page).
`Texas Instruments, TMS4116 16, 348—Bit Dynamic Ran-
`dom—Access Memory Data Sheet, (14 pages),
`Top and bottom views of Commodore VIC-1111 16K RAM
`Cartridge, (1 page).
`Top and bottom views of printed circuit board of Commo-
`dore VIC-1111 16K RAM Cartridge, (1 page).
`Sams Computerfacts Commodore Model VIC20, 1984, (22
`pages).
`Sams Computerfacts Commodore Model VIC 20 (Early
`Version), 1985, (17 pages).
`National Semiconductor 54.8138 Decoders/Demultiplexers
`Data Sheet, (8 pages).
`Hitachi HM6116 Series Data Sheet, (5 pages).
`Front and back views of DEC MS44—AA memory module
`(color copy), (1 page).
`Texas Instruments SN54ALS1034 Hex Drivers Data Sheet,
`(6 pages).
`Siemens HYB 51L000BJ—50/60/70 Data Sheet, (22 pages).
`Digital DECdirect Desktop Edition, Winter/Spring 1991
`(excerpts), (14 pages).
`Front and back views of Kingston Technology memory
`boards for HP Apollo 9000 Series 700 computers, (2 pages).
`Kingston Technology KTH700/16, /32, ‘64 & /128 memory
`upgrade kits, documentation, (3 pages).
`CE Handbook HP Apollo 9000 Series 700 Workstation/
`Servers, (247 pages).
`
`4
`
`

`

`U.S. Patent
`
`Oct. 26, 1999
`
`Sheet 1 of 6
`
`5,973,951
`
`DJainsi
`
`or
`
`PLAE
`
`lose9id
`
`TOULNO
`
`$4VPI=H.VdVIVO
`
`
`“SVW)SNVUGITVOL
`(se1elafovedal*—|(Frid
`SdNI'T
`
`
`
`5
`
`
`
`
`
`
`

`

`U.S. Patent
`
`Oct. 26, 1999
`
`Sheet 2 of 6
`
`5,973,951
`
`
`
`aiae eee eee ee
`
`
`
`nmeceeoneeues)eeeeeeeeeesepBE
`
`QIainsiy
`
`OF
`
`
`
`ferz0dIPSInCnore
`
`0101oe
`
`olOl
`
`
`
`
`
`BESTIMEgIterdFPOPLOUC
`
`
`
`(eLSL)1[rels]d
`
`ot0101
`
`POT
`
`20T
`
`0101
`
`6
`
`[s#16}d
`
`
`
`

`

`U.S. Patent
`
`Oct. 26, 1999
`
`Sheet 3 of 6
`
`5,973,951
`
`
`
`PIN #0
`
`PIN #199
`
`530A
`
`50B
`
`Figure 2a
`
`
`
`Figure 2b
`
`7
`
`

`

`U.S. Patent
`
`Oct. 26, 1999
`
`Sheet 4 of 6
`
`5,973,951
`
`
`
`
`
`J9AB][BUSBISULYOQQ[twOT
`
`
`
`dps9RI1gpavogwwisWVUd
`
`
`IOAB][BUSISWYOBg
`
`
`
`[aotGNO
`
`
`
`Jake][eUBISWYOZO[ru
`
`
`IaA¥B][CUBISWYO79Tw)
`
`
`8
`
`
`[runASt
`
`@auns1y
`
`

`

`U.S. Patent
`
`D< O>
`D< 1>
`D
`D< 3>
`<4>
`
`D
`D< 6>
`D< 7>
`De
`§
`De< 9>
`D< 10>
`D
`De< 12>
`D< 13>
`7)
`4
`D< 15>
`D< 16>
`D
`7
`D< 18>
`De 19>
`D
`0
`D< 21>
`De 22>
`D
`De 24>
`D< 25>
`De< 26>
`D< 27>
`D< 28>
`De<
`29
`De 30>
`De 31>
`CBW< 0>
`CBW< 1>
`CBW< 2>
`BY
`ROE*
`VIRQ*
`RAS1*
`AS1*
`A< 1l>
`A< 3>
`A< 5>
`
`Oct. 26, 1999
`
`Sheet 5 of 6
`
`5,973,951
`
`Ae 4
`
`D< 32>
`D< 33>
`D< 34>
`D< 35>
`D< 36>
`D< 37>
`D< 38>
`D< 39>
`D< 40>
`D< 41>
`D< 42>
`D< 43>
`De 44>
`D< 45>
`D< 46>
`D< 47>
`De 48>
`De 49>
`D< 50>
`D< 51>
`D
`D
`De 53>
`D< 54>
`D
`De 56>
`D< 57>
`De< 58>
`D< 59>
`De 60>
`De 61>
`D< 62>
`De 63>
`CBW< 4>
`CBWe< 5>
`CBW< 6>
`BY
`BUSY
`SIRQ*
`RASO*
`Aso*
`A< 0>
`Ac 2>
`
`*
`
`D< O>
`D< l>
`D< 2>
`D< 3>
`D< 4>
`Bess
`D< 6>
`De< 7>
`D< &>
`D< 9>
`D< 10>
`D< 11>
`De 12>
`De< 13>
`D< 14>
`D< 15>
`D< 16>
`D< 17>
`D< 18>
`De 19>
`D< 20>
`De< 21>
`De 22>
`D< 23>
`De 24>
`De< 25>
`D< 26>
`De< 27>
`D< 28>
`D< 29>
`D< 30>
`De< 31>
`CBW< 0>
`CBW< 1>
`CBW«< 2>
`CBW< 3>
`ROE*
`VIRQ*
`RAS1*
`CAS1*
`A< l>
`A< 3>
`A< 5>
`
`De 32>
`D< 33>
`D< 34>
`D«< 35>
`D< 36>
`Be 37>
`D< 38>
`D< 39>
`D< 40>
`D< 41>
`D< 42>
`D< 43>
`D< 44>
`D«< 45>
`D< 46>
`D< 47>
`D< 48>
`D< 49>
`De< 50>
`De 51>
`De 52>
`De< 53>
`De 54>
`De< 55>
`D«< 56>
`D< 57>
`D< 58>
`D< 59>
`De< 60>
`De< 61>
`De 62>
`D< 63>
`CBW< 4>
`CBW< 5>
`CBW< 6>
`CBWe< 7>
`BUSY*
`SIRQ*
`RASO*
`CASO0*
`A< 0>
`A< 2>
`A< 4>
`
`Figure 4a
`
`9
`
`

`

`U.S. Patent
`
`Oct. 26, 1999
`
`Sheet 6 of 6
`
`5,973,951
`
`A< 6>
`A< 8>
`
`A< 10>
`VE*
`MCLK
`D< 96>
`D«< 97>
`D< 98>
`D< 99>
`De< 100>
`
`D< 101>
`De< 102>
`D< 103>
`D< 104>
`D< 105>
`D< 106>
`D
`0
`D< 108>
`
`D< 109>
`
`A< 10> WE*
`
`A< 7>
`
`C
`
`A< 9>
`A< 1l>
`MEMRESET*
`IOSEL*
`D<
`64>
`65>
`
`De
`
`A< 6>
`
`A< 8>
`
`MCLK
`D< 96>
`De 97>
`
`66>
`67>
`
`68>
`69>
`70>
`
`71>
`
`72>
`73>
`
`T4>
`
`75>
`76>
`
`71>
`
`78>
`79>
`
`De
`De<
`De<
`De<
`De<
`De
`
`De
`D<
`
`D<
`De
`De
`De<
`
`D<
`De<
`De
`
`D< 98>
`De< 99>
`100>
`De<
`
`De<
`De<
`De<
`
`D<
`De
`
`De
`De
`De<
`
`Dec
`De<
`De
`
`De<
`
`101>
`102>
`
`103>
`104>
`105>
`
`106>
`107>
`108>
`
`1og9>
`110>
`l1l1l>
`112>
`
`A< 7>
`
`Ac 9>
`
`A< 1l>
`MEMRESET*
`IOSEL*
`64>
`D<
`De
`
`65>
`66>
`67>
`
`68>
`69>
`70>
`71>
`
`72>
`73>
`
`74>
`
`76>
`77>
`
`79>
`
`De<
`De
`De
`
`De<
`De<
`De<
`
`De
`De
`
`D<
`
`D b
`
`e
`De<
`D<
`De<
`
`De<
`
`80>
`
`CBW< 15>
`
`D<
`De<
`
`De<
`D<
`De<
`De<
`
`D<
`
`80>
`81>
`82>
`
`83>
`84>
`85>
`
`86>
`
`87>
`88>
`
`89>
`
`90>
`91>
`92>
`
`93>
`94>
`D<
`De<
`95>
`CBW< &>
`CBW< 9>
`CBW< 10>
`CBW< 11>
`
`110
`D<
`D< 1115
`D< 112>
`
`D D
`
`< 114>
`D< 115>
`D< 116>
`D< 117>
`D< 118>
`
`119>
`D<
`D< 120>
`D< 121>
`
`D D
`
`< 123>
`D< 124>
`
`D D
`
`< 126>
`
`D< 127>
`CBW< 12>
`
`CBW< 13>
`CBW< 14>
`BW< 1
`
`De<
`De
`
`De<
`De
`De
`
`Dec
`
`De
`De
`
`De<
`De<
`De<
`De
`
`113>
`114>
`
`115>
`116>
`117>
`118>
`
`119>
`120>
`
`121>
`122>
`123>
`124>
`
`125>
`126>
`
`De<
`De
`127>
`De<
`CBW< 12>
`
`CBW< 13>
`
`CBW< 14>
`
`Figure 46
`
`10
`10
`
`D D
`
`e
`
`82>
`
`De
`
`83>
`
`84>
`85>
`86>
`
`87>
`88>
`
`De<
`De<
`
`D<
`
`D D
`
`e<
`
`De
`
`89>
`
`90>
`91>
`
`92>
`
`De
`D<
`D<
`Y)
`D<
`
`91>
`92>
`D<
`CBW< 8&>
`CBW< 9>
`CBW< 10>
`
`CBWé<11>
`
`

`

`5,973,951
`
`1
`SINGLE IN-LINE MEMORY MODULE
`
`‘This 1s a continuation application of Ser. No, 08/643,094,
`filed May 2, 1996 now abandoned whichis a continuation of
`Ser. No. 08/473,073, filed Jun. 7, 1995, now US. Pat. No.
`5,532,954 issued Jul. 2, 1996, whichis a continuation ofSer.
`No. 08/345,477 filed Nov. 28, 1994, now U.S. Pat. No.
`5,465,229 issued Nov. 7, 1995, which is a continuation of
`Ser. No. 08/279,824, filed Jul. 25, 1994, now U.S, Pat. No.
`5,383,148 issued Jan. 17, 1995, which a continuation ofSer.
`No, 08/115,438, filed Sep. 1, 1993, now abandoned, which
`is a continuation of Ser. No. 07/886,413,filed May 19, 1992,
`now U.S. Pat. No. 5,270,964, issued on Dec. 14, 1993,
`
`BACKGROUND OF THE INVENTION
`
`15
`
`1. Related Applications
`This application is related to U.S. Pat. No, 5,260,892,
`entitled “High Speed Electrical Signal Interconnect
`Structure”, issued Nov. 9, 1993 and U.S, Pat. No. 5,265,218,
`entitled “Bus Architecture for Integrated Data and Video
`Memory’, issued Nov. 23, 1993.
`2. Field of the Invention
`
`2
`a memory increment forthe entire data path. Instead the user
`must obtain and install multiple SIMMs,
`in combination
`with performing any additional configuration requirements
`necessary to make the separate SIMMs modules function as
`a single memory unit, such as setting base addresses for the
`SIMM modules installed.
`
`As a result, a user seeking to increase his usable main
`memory by adding SIMMs constructed according to the
`priorart, typically must insert multiple SIMMsto achieve a
`memoryexpansion for the entire data path of his computer.
`The foregoing is a consequence of typical prior art SIMM
`architecture, wherein the SIMM is arranged around DRAM
`parts which comprise one byte wide memory increments.
`Thus in a data path having a width of 32 bits, there being
`eight bits per byte, a 1 megabyte expansion of main memory
`using SIMMs constructed according to the prior art would
`require four SIMM modules each of one megabyte capacity
`in order to obtain a full data path expansion of one mega-
`byte.
`in the following
`As will be described in more detail
`detailed description, the present invention provides, among
`other attributes, facility for providing memory expansion in
`full data path widths, thereby relieving the user of config-
`uring and installing multiple SIMMs modules to obtain any
`desired memory increment.
`SUMMARY OF THE INVENTION
`
`A full width single in-line memory module (SIMM) for
`dynamic random access memory (ORAM) memory expan-
`sions is disclosed. A printed circwit board having a multi-
`plicity of DRAM memory elements mounted thereto is
`arranged in a data path having a width of 144 bits. The
`SIMM of the present invention further includes on-board
`drivers to buffer and drive signals in close proximity to the
`memoryelements. In addition, electrically conductive traces
`are routed on the circuit board in such a manner to reduce
`loading and trace capacitance to minimize signal skew to the
`distributed memory elements. The SIMM further includes a
`high pin density dual read-out connector structure receiving,
`electrical traces from both sides of the circuit board for
`enhanced functionality. The SIMMis installed in comple-
`mentary sockets one SIMM at a time to provide memory
`expansion in full width increments. Finally, symmetrical
`powerand ground routings to the connector structure insure
`that
`the SIMM cannot be inserted incorrectly, wherein
`physically reversing the SIMM in the connectorslot will not
`reverse power the SIMM.
`BRIEP DESCRIPTION OF THE DRAWINGS
`
`The objects, features and advantages ofthe present inven-
`tion will be apparent from the following detailed description
`given below and from the accompanying drawings of the
`preferred embodiment of the invention in which:
`FIG. la illustrates the electrical schematic ofa first side
`ofthe single in-line memory module (SIMM)according to
`the teachings of the present invention.
`FIG. 16 illustrates the electrical schematic for a left-to-
`right mirror image layout of memory elements on a second
`side of the SIMM.
`
`FIG. 2a@ illustrates the physical layout of the memory
`elements and drivers placed on the SIMM.
`FIG. 25 is a magnified view of the dual read-out connector
`structure on the SIMM.
`
`FIG. 3 illustrates the stacked conductive layers separated
`by insulating dielectric necessary to build up the intercon-
`nections for the electrical schematic shown in FIGS. 1a and
`Ib.
`
`25
`
`30
`
`invention relates to the field of computer
`The present
`systems and memory hardware. More particularly,
`the
`present invention relates to modular circuit boards which
`may be combined to form a memory structure within a
`computer system.
`3. Art Background
`Single In-Line Memory Modules (“SIMMs”) are compact
`circuit boards designed to accommodate surface mount
`memory chips. SIMMs were developed to provide compact
`and easy to manage modular memory components for user
`installation in computer systems designed to accept such
`SIMMs. SIMMsgenerally are easily inserted into a connec-
`tor within the computer system, the SIMM thereby deriving
`all necessary power, ground, and logic signals therefrom.
`A SIMM typically comprises a multiplicity of random
`access memory (“RAM”) chips mounted to a printed circuit
`board. Depending on the user’s needs, the RAM memory
`chips may be dynamic RAM (DRAM), non volatile static
`RAM (SRAM) or video RAM (WRAM). Because DRAM
`memories are larger and cheaper than memory cells for
`SRAMs, DRAMsare widely used as the principal building
`block for main memories in computer systems, SRAM and
`VRAM SIMMshave more limited application for special
`purposes such as extremely fast cache memories and video
`frame buffers, respectively. Because DRAMsform the larg-
`est portion of a computer system memory,
`it
`is therefore
`desirable that memory modules flexibly accommodate the 5
`computation needs of a user as the users’ requirements
`change over time. Moreover, it is desirable that the SIMM
`modules may be added to the computer system with a
`minimum user difficulty, specifically in terms of configura-
`tion of a SIMM within a particular memory structure. In the 5:
`past, SIMMs have generally been designed to provide
`memory increments of one or more megabytes (MB), but
`where the memory addition comprises only a portion of the
`full data path used in the computer system. A leading
`example of the prior art organization and structure is that
`disclosed in U.S. Pat. No. 4,656,605, issued Apr. 7, 1987 to
`Clayton. Clayton discloses a compact modular memory
`circuit board to which are mounted nine memory chips
`whichare arranged to provide memory increments in eight
`bit (one byte) data widths, plus parity bits. Thus, because
`most computer systems use data paths of 32, 6+ or more bits,
`the SIMM constructed according to Clayton cannot provide
`
`3
`
`60
`
`11
`11
`
`

`

`5,973,951
`
`3
`FIGS. 4@ and 46 are a connector diagram illustrating data,
`address and control signals routed to a SIMM.
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`4
`one WE signal and one reset line. The routing for all control
`signals 20, address signals 21 and data signals 25 minimize
`conductive trace capacitance and loading in accordance with
`US. Pat. No, 5,260,892, entitled ‘High Speed Electrical
`Signal Interconnect Structure’, assigned to the assignee of
`the present invention, and which is incorporated herein by
`A bus architecture for integrated data and video memory
`reference. The trace routing control for all control signals 20
`are taken from driver 15 to the central DRAM 10 for each
`is disclosed. In the following description, for purposes of
`explanation, specific numbers, times, signals etc., are set
`DRAM cluster 10a, 105, 10c, and 10¢. DRAMssurrounding
`forth in order to provide a thorough understanding of the
`the central DRAM 10 are coupled to contro! signals 20 via
`present invention. However,it will be apparent to one skilled
`short sub traces (not shown),
`thereby minimizing total
`in the art that the present invention may be practiced without
`capacitance, and increasing signal rise times.
`these specific details. In other instances, well knowncircuits
`With brief reference to FIG. 3, the stack up used to route
`and devices are shownin block diagram form in order not to
`all control, addresses, data, and power and ground signals is
`obscure the present invention unnecessarily.
`illustrated. In the embodiment shown in FIG, 3, the printed
`The preferred embodiment of the SIMM described herein
`circuit board is a multi-layered board including several
`signal layers.
`is designed and intended to be used with the integrated data
`and video memory bus disclosed in copending U.S. patent
`With brief reference to PIG. Lb, a second, reverse side of
`SIMM 5 is shown.
`In FIG. 15,
`two additional DR