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`[a H Y s I I: 5 III F
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`jéifiBDNDUETDR
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`Dilip K Roy
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`Universities Pro-l (India) Private Limited
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`*0 Universities Press (India) Private Limited 1992. 2004
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`First Published 1992
`Reprinted l999, 2000, 2001 . 2002
`Second edition 2004
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`Reprinted 2008. 2009, 201 l. 2013
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`ISBN: 978 8] 7371 494 3
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`Typeset by
`Krishlel eMaging Solutions. Chennai 600 0! 7
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`Printed in india at
`Orion Printers Private Limited
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`Published by
`Universities Press (India) Private Limited
`3-6-747illA 8:. 3-0254! 1, Himayatnagar
`Hyderabad 500 029 (AP), India
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`334
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`Physics ofsemiconductor devices
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`Vs
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`Metal
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`m®¥ Si 02
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`hr Drain
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`Figure 4.21 Configuration of a DMOS transistor
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`The HEXFET incorporates vertical DMOS transistors
`Htit'ngo’iioificz’d cfiect transistor (HEXFET)
`in a three—dimensional structure. The hexagonal shape ofthe source and the mesh gate structure further
`maximizes the surface area required for high power applications.
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`In this configuration. the
`V—Gi‘oovc (or Vertical} rectal-aride—scmicondut'tor (VMOS) transistor
`gate electrode and the oxide layers are given the shape of :1 V. The structure provides a short channel
`length independant of the lithographic capability. UMOS is a variation of the VMOS configuration.
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`A TFTIS an IGFEF whose active layer is a deposited film on an insulator
`Tiiiiifiim rrmrsirror (TFT)
`substrate or a layer Since the film is non--crystai|ine the device performanceis inferior to that ol the
`bulk devices. The current drivers much smaller and the speed15 lower The structure of :1 TFTis shown
`in Fig. 4.22. The gate insulator can either be a thermal oxide or :1 deposited dielectric.
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`Semiconductor (It)
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`substrate
`insulating
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`Figure 4.22 An n—channet thin film transistor (Ti-Ti
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