US007420550B2
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`(12) United States Patent
`Yuh-Ren et al.
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`(10) Patent No.:
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`(45) Date of Patent:
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`US 7,420,550 B2
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`Sep. 2, 2008
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`References Cited
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`U.S. PATENT DOCUMENTS
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`................... .. 345/96
`5,805,128 A *
`9/1998 Kim et a1.
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`349/143
`........... ..
`6,057,904 A *
`5/2000 Kim et a1.
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`.... ..
`6,157,056 A * 12/2000 Takeuchi et al.
`257/315
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`. . . . . . . . .
`6,310,594 B1* 10/2001 Libsch et al.
`. . . .. 345/90
`2004/0056331 A1*
`3/2004 Chen et al.
`................ .. 257/629
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`* cited by examiner
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`Primary Examiner—Bipin Shalwala
`Assistant Examiner—Vince E Kovalick
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`(74) Attorney, Agent, or Firm—Lowe Hauptman Ham &
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`Bemer, LLP
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`(56)
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`(57)
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`ABSTRACT
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`A liquid crystal display driving device of matrix structure
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`type and its driving method are disclosed in the present inven-
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`tion. The driving device consists of a group of thin film
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`transistors with matrix array, a plurality of gate lines and a
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`plurality of data lines. The object of increasing response
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`speed can be accomplished by the different arrangement of
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`gate lines and data lines and the different connection between
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`each thin film transistor and the gate and data lines. The
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`driving method for the said driving device includes: each pair
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`of gate lines in the display panel are simultaneously and
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`orderly turned on at different time of driving transistor, and
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`the different driving voltages are orderly applied to the thin
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`film transistors connected to the gate lines. The structure and
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`method can suit for picture treating of various displays such
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`as liquid crystal display, organic light-emitting diode (OLED)
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`display or plasma display panel (PDP).
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`7 Claims, 26 Drawing Sheets
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`(54)
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`(75)
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`LIQUID CRYSTAL DISPLAY DRIVING
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`DEVICE OF MATRIX STRUCTURE TYPE
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`AND ITS DRIVING METHOD
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`Inventors: Shen Yuh-Ren, Tainan (TW); Chen
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`Cheng-Jung, Miaoli Hsien (TW); Chen
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`Chun-Chi, Kaohsiung (TW)
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`(73)
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`Assignee: Vast View Technology, Inc., Hsinchu
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`(TW)
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`(*)
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`Notice:
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`Subject to any disclaimer, the term of this
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`patent is extended or adjusted under 35
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`U.S.C. 154(b) by 677 days.
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`Appl. No.: 10/929,473
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`Filed:
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`Aug. 31, 2004
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`Prior Publication Data
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`US 2006/0044292 A1
`Mar. 2, 2006
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`Int. Cl.
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`G09G 3/36
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`(2006.01)
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`U.S. Cl.
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`......................... .. 345/204; 345/50; 345/90;
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`345/98; 345/103; 345/214; 349/143
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`Field of Classification Search ................. .. 345/50,
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`345/58, 90, 93, 95, 98, 103, 204, 205, 214;
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`349/ 143
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`1
`LIQUID CRYSTAL DISPLAY DRIVING
`DEVICE OF MATRIX STRUCTURE TYPE
`AND ITS DRIVING METHOD
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a liquid crystal display
`driving device ofmatrix structure type and its driving method,
`especially to a display driving device and its driving method,
`which can simultaneously or synchronously drive a plurality
`ofthin film transistors to increase the response speed, wherein
`the source and the gate of each thin film transistor in the
`driving device are respectively connected with different gate
`lines and data lines to let the specific transistor be driven by
`the gate drivers and the data drivers, and the predetermined
`voltage for over drive or the data voltage for the present frame
`interval is applied to accomplish the object of increasing the
`response speed. The present invention can suit for the picture
`treatment of various liquid crystal displays, organic light
`emitting diode (OLED) display or plasma display panel
`(PDP).
`2. Description of the Prior Art
`Because the liquid crystal display possesses the advantages
`of low power consumption, light of weight, thin thickness,
`without radiation and flickering,
`it gradually replaces the
`traditional cathode ray tube (CRT) display in the display
`market. The liquid crystal display is chiefly used as the screen
`of the digital television, the computer or the notebook com-
`puter. In particular, the large sized liquid crystal display is
`widely used in the amusements of the life, especially in the
`field in which the view angle, the response speed, the color
`number, and the image of high quality are in great request.
`Referring to FIGS. 1A and 1B, they are the simple sche-
`matic views showing the internal structure of the prior liquid
`crystal display. Mark 10 is the display panel. The data driver
`11 is installed above the display panel, which can change the
`data of the adjusted gray level signal into the corresponding
`data voltage. The image signal can be transferred to the dis-
`play panel 10 through the plurality of data lines 111 con-
`nected with the data driver 11. The gate driver 12 is installed
`on one side of the display panel 10, which can continuously
`provide scarming signal. The scanning signal can be trans-
`ferred to the display panel 10 through the plurality of gate
`lines 121 connected with the gate driver 12. The data line 111
`and the gate line 121 are orthogonally crossed and insulated
`with each other. The area enclosed in them is a pixel 13. After
`the image signal is output from the data driver 11, it will get
`to the source of the thin film transistor Q1 in the pixel 13
`through the data line D1, and a control signal is correspond-
`ingly output from the gate driver 12, it will get to the gate of
`the thin film transistor Q 1 through the gate line G1. The circuit
`in the pixel 13 will output the output voltage to drive the liquid
`crystal molecular corresponding to the pixel 13, and a parallel
`plate type ofcapacitor CLC (capacitor ofliquid crystal) will be
`formed by the liquid crystal molecules between the two
`pieces of glass substrates in the display panel 10. Because the
`capacitor CLC cannot keep the voltage to the next time of
`renewing the frame data, so there is a storage capacitor C5
`provided for the voltage ofthe capacitor being able to be kept
`to the next time of renewing the frame data.
`The image treatment of the display is affected by the prop-
`erties ofthe liquid crystal molecular such as viscosity, dielec-
`tricity and elasticity etc. The brightness in the traditional CRT
`is displayed by the strike of the electron beam on the screen
`coated with phosphorescent material, but the brightness dis-
`play in the liquid crystal display needs time for the liquid
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`crystal molecular to react with the driving voltage, the time is
`called “response time”. Taking the normally white (NW)
`mode as an example, the response time can be divided to two
`parts:
`(1) The ascending response time: it is the time for the liquid
`crystal molecular to rotate with the application of the volt-
`age when the brightness of the liquid crystal box in the
`liquid crystal display changes from 90% to 10%, simply
`called “T,”; and
`(2) The descending response time: it is the time for the liquid
`crystal molecular to restore without the application of the
`voltage when the brightness of the liquid crystal box
`changes from 10% to 90%, simply called “Tf”.
`When the display speed ofthe frame is above 25 frames per
`second, human will regard the quickly changing frames as the
`continuous picture. In general above 60 frames per second is
`the display speed of the screen in the modern family amuse-
`ments such as DVD films of high quality and electronic
`games of quick movement, in other words, the time of each
`frame interval is 1/so sec:l6.67 ms. Ifthe response time ofthe
`liquid crystal display is longer than the frame interval time,
`the phenomena ofresidue image or skip lattice would happen
`in the screen so that the quality ofthe image is badly affected.
`At present the methods for decreasing the response time ofthe
`liquid crystal display have: lowering the viscousity, reducing
`the gap of the liquid crystal box, increasing the dielectricity
`and the driving voltage, wherein the methods of lowering the
`viscosity, reducing the gap of the liquid crystal box and
`increasing the dielectricity can be executed from the material
`and the making process ofthe liquid crystal and the method of
`increasing the driving voltage can be executed from the driv-
`ing method of liquid crystal panel. The latter can further
`improve the response speed of the gray level in no need of
`largely changing the structure ofthe display panel. It is called
`“overdrive” (OD) technique, wherein the increasing voltage
`can be transferred to the liquid crystal panel through the
`driver integrated circuit (diver IC) to increase the voltage for
`rotating the liquid crystal so that the expected brightness of
`the image data can be quickly obtained and the response time
`can be reduced due to the quick rotation and restoration ofthe
`liquid crystal.
`Referring to FIG. 2, the liquid crystal display has different
`brightness at different driving voltage. If L1 is the expected
`brightness of the image data and the liquid crystal molecular
`is driven by the present data voltage V1 to display the bright-
`ness, the brightness variation displayed by the driven liquid
`crystal molecular is shown as curve 21 and the time for
`obtaining the brightness is to. An increased driving voltage V2
`is provided to reduce the time for obtaining the brightness
`according to the brightness variation ofthe display gray level,
`which has been measured in advance. The brightness varia-
`tion is shown as curve 22. Therefore, the time for obtaining
`the expected brightness can be reduced from toto to‘; this is the
`so-called OD technique.
`Referring to FIG. 3A to 3C, ifthe expected brightness of an
`image in the preceding frame interval I-1 is code 32, and the
`expected brightness of the said image in the present frame
`interval I becomes code 120, the brightness variation of the
`liquid crystal display is shown as curve (a) without making
`use of OD technique. It is shown that the expected brightness
`carmot be obtained unless the I+1”’ frame interval is got. This
`would produce the problem of residue image. By use of OD
`technique, the driving voltage is increased to code 200 in the
`present frame interval I to be able to obtain the expected
`brightness at the end of the frame interval. Its brightness
`variation is shown as curve (b). In the driving process of the
`first gate line G1 and the first data line D 1, when the frame
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`interval I begins, a control voltage pulse is given to the first
`gate line G1 by the gate driver and at the same time a driving
`voltage code 200 is given to the first data line D1 by the data
`driver so that the first pixel (not shown) connected with the
`first gate line and the first data line can change its brightness.
`If the sequential frame interval still display the brightness of
`code 120 and the next frame interval I+l begins, a control
`voltage pulse is still given to the first gate line and the driving
`voltage given to the first data line is decreased to code 120 to
`keep the expected brightness. The present invention makes
`use of the “overdrive” concept and discloses a novel liquid
`crystal display driving device of matrix structure type and its
`driving method to reduce the response time of the liquid
`crystal display.
`
`SUMMARY OF THE INVENTION
`
`The chief object of the present invention is to provide a
`liquid crystal display driving device of matrix structure type
`to increase the response speed ofthe liquid crystal display and
`the aspect ratio ofthe panel and to decrease the number of the
`data drivers and the data lines.
`
`Another object of the present invention is to provide a
`driving method for the liquid crystal display of matrix struc-
`ture type, which can simultaneously or synchronously start
`the plurality of thin film transistors in the display panel and
`drive the pixels controlled by the thin film transistors to
`reduce the response time of the liquid crystal display.
`To achieve the above-stated objects of the present inven-
`tion, the basic structure of the driving device of the present
`invention includes a group ofthin film transistors with matrix
`array, gate lines connected with the gate drivers and insulated
`with each other, wherein the gates and the sources of all the
`thin film transistors are respectively connected with the gate
`lines and the data lines. The response time ofthe liquid crystal
`display can be reduced by the different arrangement design of
`the gate lines and the data lines and by the different connec-
`tion location between the gate lines and the gates of the thin
`film transistors and between the data liens and the sources of
`
`the thin film transistors. The gate drivers can be respectively
`installed on the left side and the right side of the liquid crystal
`panel and the data drivers can be respectively installed on the
`upper side and the lower side. The gate driver can be a chip
`installed on glass or an integrated gate driver circuit installed
`on glass.
`The driving method for the said driving device includes:
`the period of the predetermined voltage of the over drive
`received by the thin film transistors connected with the first
`gate line is set as a over exciting period and the period of the
`data voltage of the present frame interval received by the thin
`film transistor connected with the first gate line is set as a
`brightness keeping period.
`When the over exciting period begins, two gate lines in the
`liquid crystal display are turned on in a time of one synchro-
`nous control signal or by the control signals simultaneously
`produced by the gate drivers. The predetermined voltage is
`given to the thin film transistors connected with one of the
`gate lines which are simultaneously or synchronously turned
`on, the data voltage is given to the thin film transistors con-
`nected with the other of the gate lines which are simulta-
`neously or synchronously turned on, and scanning continues
`in turn.
`
`When the brightness keeping period begins, two gate lines
`in the liquid crystal display are orderly turned on in a time of
`one synchronous control signal or by the control signals
`simultaneously produced by the gate drivers. One of the gate
`lines is the next gate line of the last gate line given to the said
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`predetermined voltage. The predetermined voltage of over
`drive is given to the thin film transistors connected with the
`said gate line, and the data voltage of the present frame
`interval is given to the thin film transistors connected with the
`first gate line which is turned on orderly. Scarming continues
`in turn until the whole liquid crystal display is scarmed, and
`the next frame interval begins.
`If the ratio of the number of the gate lines scanned in the
`over excited period to the number of the total gate lines is P
`and the period of the frame interval of the liquid crystal
`display is T, then the duration of the over exciting is PT and
`the duration of the brightness keeping is (l -P)T. The ratio P
`can be adjusted according to the characteristic of the display
`panel.
`From the statement stated above, the present invention
`possesses the characteristic of dividing the space of the gate
`lines of the display panel into a plurality of regions and the
`time of the frame interval into a plurality of sub-region times.
`Each region is orderly scanned in a time of one synchronous
`control signal. Therefore, the state of “frame in frame” is
`formed in the space and the time. The method of the present
`invention can suit for various picture treatments of liquid
`crystal display, organic light emitting diode (OLED) display
`or plasma display panel (PDP).
`To make the present invention be able to be clearly under-
`stood,
`there are some preferred embodiments and their
`accompanying draws described in detail as below.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1A is a simple schematic view of the structure of the
`general liquid crystal display;
`FIG. 1B is an enlarged schematic sectional view taken from
`FIG. 1A, which shows the arrangement of the elements in the
`area enveloped in the data lines and the gate lines;
`FIG. 2 is a curve view showing the variation of the image
`brightness of the liquid crystal display with the time at dif-
`ferent driving voltages;
`FIG. 3A is a comparison view showing the variation of the
`expected brightness of a pixel with OD technique and without
`OD technique;
`FIG. 3B is a schematic view showing the control voltage
`pulse of the first gate line from the gate driver of the liquid
`crystal display in the frame interval of FIG. 3A;
`FIG. 3C is a schematic view showing the driving voltage of
`the first data line from the data drivers of the liquid crystal
`display in the frame interval of FIG. 3A;
`FIG. 4A is a schematic view showing the arrangement of
`the gate lines and the data lines ofthe display panel ofthe first
`embodiment according to the present invention;
`FIG. 4B is an enlarged schematic sectional view taken from
`FIG. 4A, which shows the arrangement of the gate lines and
`the data lines and the state of the gate and the source, which
`are connected to the gate lines and the data lines, of each thin
`film transistor;
`FIG. 4C is an enlarged schematic sectional view taken from
`FIG. 4A, which shows there is a space between the neighbor-
`ing data lines for preventing them from short circuit;
`FIG. 5A is a schematic view ofthe arrangement of the gate
`lines and the data lines ofthe display panel ofthe first embodi-
`ment according to the present invention, which shows the
`state of the data drivers respectively installed on the upper
`side and the lower side of the display panel;
`FIG. 5B is an enlarged schematic sectional view taken from
`FIG. 5A, which shows the arrangement of the gate lines and
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`the data lines and the state of the gate and the source, which
`are connected to the gate lines and the data lines, of each thin
`film transistor;
`FIG. 6A is a schematic View of the arrangement ofthe gate
`lines and the data lines ofthe display panel ofthe first embodi-
`ment according to the present invention, which shows the
`state of each pair of data lines connected to a data driver,
`which is connected to the electronic switch;
`FIG. 6B is an enlarged schematic sectional View taken from
`FIG. 6A, which shows the arrangement of the gate lines and
`the data lines and the state of the gate and the source, which
`are connected to the gate lines and the data lines, of each thin
`film transistor;
`FIG. 7 is a wave form View ofthe signal used in the driving
`method of the display device of the first embodiment accord-
`ing to the present invention, which shows the Variation of the
`wave form of the signal of the gate lines and the data lines
`from the gate driver and the data drive at different frame
`interval time;
`FIG. 8A is a schematic View of the arrangement ofthe gate
`lines and the data lines of the display panel of the second
`embodiment according to the present invention;
`FIG. 8B is an enlarged schematic sectional View taken from
`FIG. 8A, which shows the arrangement of the gate liens and
`the data lines and the state of the gate and the source, which
`are connected with the gate lines and the data lines, of each
`thin film transistor;
`FIG. 8C is an enlarged schematic sectional View taken from
`FIG. 8A, which shows there is a space between the neighbor-
`ing data lines for preventing them from short circuit;
`FIG. 9A is a schematic View of the arrangement ofthe gate
`lines and the data lines of the display panel of the second
`embodiment according to the present invention, which shows
`the state ofthe data drivers respectively installed on the upper
`side and the lower side of the display panel;
`FIG. 9B is an enlarged schematic sectional View taken from
`FIG. 9A, which shows the arrangement of the gate lines and
`the data lines and the state of the gate and the source, which
`are connected with the gate lines and the data lines, of each
`thin film transistor;
`FIG. 10A is a schematic View of the arrangement of the
`gate lines and the data lines of the display panel of the second
`embodiment according to the present invention, which shows
`the state of each pair of data lines connected to a data driver,
`which is connected to the electronic switch;
`FIG. 10B is an enlarged schematic sectional View taken
`from FIG. 10A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 11 is a wave form View ofthe signal used in the driving
`method of the display device of the second embodiment
`according to the present invention, which shows the Variation
`of the wave form of the signal of the gate lines and the data
`lines from the gate driver and the data driver ate different
`frame interval time;
`FIG. 12A is a schematic View showing the arrangement of
`the gate lines and the data lines ofthe display panel ofthe third
`embodiment according to the present invention;
`FIG. 12B is an enlarged schematic sectional View taken
`from FIG. 12A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 12C is an enlarged schematic sectional View taken
`from FIG. 12A, which shows there is a space between the
`neighboring gate liens to prevent them from short circuit;
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`FIG. 13A is a schematic View of the arrangement of the
`gate lines and the data lines of the display panel of the third
`embodiment according to the present invention, which shows
`the state of the gate drivers respectively installed on the left
`side and the right side of the display panel;
`FIG. 13B is an enlarged schematic sectional View taken
`from FIG. 13A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 14 is a wave form View ofthe signal used in the driving
`method ofthe display device ofthe third embodiment accord-
`ing to the present invention, which shows the Variation of the
`wave form of the signal of the gate lines and the data lines
`from the gate drivers and the data drivers at different frame
`interval time;
`FIG. 15A is a schematic View showing the arrangement of
`the gate lines and the data lines of the display panel of the
`fourth embodiment according to the present invention;
`FIG. 15B is an enlarged schematic sectional View taken
`from FIG. 15A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 15C is an enlarged schematic sectional View taken
`from FIG. 15A, which shows another arrangement ofthe gate
`lines and the data lines of the display panel of the fourth
`embodiment according to the present invention;
`FIG. 16A is a schematic View of the arrangement of the
`gate lines and the data line of the display panel of the fourth
`embodiment according to the present invention, which shows
`the state of the gate drivers respectively installed the left side
`and the right side of the display panel;
`FIG. 16B is an enlarged schematic sectional View taken
`from FIG. 16A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 17 is a wave form View ofthe signal used in the driving
`method of the display device of the fourth embodiment
`according to the present invention, which shows the Variation
`of the wave form of the signal of the gate lines and the data
`lines from the gate drivers and the data drivers at different
`frame interval time;
`FIG. 18 is a wave form View of the signal used in another
`driving method ofthe display device of the third embodiment
`according to the present invention, which shows the Variation
`of the wave form of the signal of the gate lines and the data
`lines from the gate drivers and the data drivers at different
`frame interval time;
`FIG. 19A is a schematic View showing the arrangement of
`the gate lines and the data lines ofthe display panel ofthe fifth
`embodiment according to the present invention;
`FIG. 19B is an enlarged schematic sectional View taken
`from FIG. 19A, which shows the arrangement of the gate
`lines and the data lines and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 19C is an enlarged schematic sectional View taken
`from FIG. 19A, which shows there is a space between the
`neighboring gate lines to prevent them from short circuit;
`FIG. 20A is a schematic View of the arrangement of the
`gate lines and the data lines of the display panel of the fifth
`embodiment according to the present invention, which shows
`the state of the gate drivers respectively installed on the left
`side and the right side of the display panel;
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`FIG. 20B is an enlarged schematic sectional View taken
`from FIG. 20A, which shows the arrangement of the gate
`lines and the data liens and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 21 is a wave form View ofthe signal used in the driving
`method of the display device of the fifth embodiment accord-
`ing to the present invention, which shows the variation of the
`wave form of the signal of the gate lines and the data lines
`from the gate drivers and the data drivers at different frame
`interval time;
`FIG. 22A is a schematic view showing the arrangement of
`the gate lines and the data lines of the display panel of the
`sixth embodiment according to the present invention;
`FIG. 22B is an enlarged schematic sectional view taken
`from FIG. 22A, which shows the arrangement of the gate
`lines and the data liens and the state ofthe gate and the source,
`which are connected to the gate lines and the data lines, of
`each thin film transistor;
`FIG. 22C is an enlarged schematic sectional view taken
`from FIG. 22A, which shows another arrangement ofthe gate
`lines and the data lines and the state ofthe gat