(12) United States Patent
`Ino et al.
`
`(10) Patent N0.:
`(45) Date of Patent:
`
`US 6,424,328 B1
`Jul. 23, 2002
`
`US006424328B1
`
`.............. .. 345/92
`8/1998 Tanaka et al.
`5,798,744 A *
`. . . . . .
`. . . .. 345/87
`6/2000 Shiba et al.
`6,075,505 A *
`6,160,535 A * 12/2000 Park .............. ..
`345/100
`6,175,351 B1 *
`1/2001 Matsuura et all.
`345/98
`6 268 841 B1 *
`7/2001 Cairns et al
`345/98
`
`
`
`(54) LIQUID-CRYSTAL DISPLAY APPARATUS
`_
`_
`1HV€Hr0rS1 Masrrmltsu 1r10;_T0Sh1k3_Z“ Mfrekawa;
`Y°5_h‘har“ NakaJ““a$ Hrmakl
`I°h'kaWa> all Of Kanagawa (JP)
`
`(75)
`
`(73) Assign‘,/C, Sony Corporation (JP)
`
`6,310,592 B1 * 10/2001 Moon et al.
`
`................ .. 345/87
`
`( * ) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`* cited by examiner
`
`(21) Appl. NOJ 09/271,211
`
`(22) Filed,
`
`Man 17, 1999
`_
`_
`_
`_
`_
`(30)
`Foreign Application Priority Data
`Mar. 19, 1998
`(JP)
`......................................... .. 10—069625
`Aug. 27, 1998
`(JP)
`......................................... .. 10—241393
`
`7
`
`................................................ .. G09G 3/30
`Int. Cl.
`(51)
`........................... .. 345/87; 345/92, 345/98,
`(52) U.s. Cl.
`345/100, 345/205, 345/88; 345/600; 345/603
`(58) Field of Search .......................... .. 345/87, 92, 204,
`345/206, 211, 213, 100, 98, 88, 205, 600,
`603
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`Primary Examiner—Richard Hjerpe
`Assistant Examiner—Ali Zamani
`
`(74) Attorney, Agent, or Firm—Rader, Fishman & Grauer
`LLP; Ronald P. Kananen, Esq.
`
`(57)
`
`ABSTRACT
`
`When time-division driving, which allows the number of
`Output pins of a driver IC to be reduced, is applied to an
`aCfiVe_mamX LCD a
`arms a fime_diViSi0n number is Set
`’
`PP
`‘O arr Odd rrrrrrrbr’r> Preferably ‘O the rrrh (rr rrarrrrar rrrrrrrber)
`power of three, and a time-sequential signal (dot inversion
`signal) output from the driver IC is time-divided by a
`time-division switch and sent to signal lines 12-1, 12-2,
`12-3, .
`.
`. to implement complete dot inversion driving.
`
`5,781,164 A *
`
`7/1998 Jacobsen et al.
`
`............ .. 345/87
`
`17 Claims: 14 Drawing Sheets
`
`:_''''''''''''''''''''''''''''''__I
`671n
`I
`SAMPLING
`SAMPLING _____j_5Z_1_f‘_frI
`I
`,
`CIFICUIT
`CIRCUIT
`I
`I
`I
`O(n+1)
`-672n
`-
`I
`572,,“ I
`I
`P(n‘I-1)
`IT‘-’
`I
`573I'I+‘I
`I
`I
`I
`-
`'
`
`MEMORY
`
`IMAGE DATA
`
`68
`
`SWITCH
`CONTROL
`CIRCUIT
`
`
`
`64
`
`COMMON-
`VOLTAGE
`GENERATION
`
`CIRCUIT
`
`VERTICAL
`
`DRIVING
`CIRCUIT
`
`
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 1 of 14
`
`US 6,424,328 B1
`
`FIG.
`
`1
`
`14
`
`16
`A}
`15-1 fa 15-3
`
`Im-
`
`OOOOOOOCUO
`
`«3
`
`
`
`12-1
`132
`
`12-5
`12-5
`
`12-3
`
`12-4
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 2 of 14
`
`US 6,424,328 B1
`
`12n+2
`
`VCOM
`
`VCOM
`
`VCOM
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 3 of 14
`
`US 6,424,328 B1
`
`FIG. 3
`
`HORIZONTAL SHIFT
`REGISTER CIRCUIT
`
`31
`
`:2.Q.m9::—O-«-0-monon[U
`
`I 3
`
`Ii-9
`III1.
`Ill-L
`
`ata1
`
`ata2
`
`ata3
`
`,,,4
`
`data5
`
` LEVEL SHIFTING CIRCUIT
`IIIIIIIIIIIIII -
`
`Vdd
`
`DATA LATCH CIRCUIT
`
`IIIIIIIIIIIIII 34
`
`Vss
`
`Vdd
`
`EEEER‘
`VOLTAGE
`LINES
`
`Vss
`
`DIGITAL-ANALOG
`CONVERSION CIRCUIT
`
`Vss
`
`Vdd
`
`35
`
`Odd even Odd even °dd even Odd even
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 4 of 14
`
`US 6,424,328 B1
`
`FIG. 4
`
`FIG. 5
`
`M
`
`.
`
`
`
`
`
`
`
`SEC v. Surpass Tech, |PR2015—OO887
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`
`EHEEIIIIIIEHEIIIIIIHEHIIIIII
`EIIIEHEIIIIIIHEHIIIIIIEHEIII
`EIIIIIIHDHIIIIIIEHEIIIIIIHDE
`EEHEIIIIIIHEHIIIIIIEHEIIIIII
`IIIIEDEIIIIIIEHEIIIIIIEEEIII
`EIIIIIIEHEIIIIIIHEHIIIIIIEHE
`EHEHIIIIIIEEEIIIIIIHDHIIIIII
`EIIIEHEIIIIIIEEEIIIIIIEHEIII
`EIIIIIIHEHIIIIIIEHEIIIIIIHIE
`flflHEIIIIIIHEHIIIIIIEHEIIIIII
`
`EIIIHEHIIIIIIEHEIIIIIIHEHIII
`
`
`EIIIIIIEHEIIIIIIHEHIIIIIIEHE
`
`
`
`
`
`
`
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 5 of 14
`
`US 6,424,328 B1
`
`FIG. 6
`
`R2
`
`G2
`
`B2
`
`|
`
`R3
`
`G3
`
`B3
`
`I
`
`SIGNALS OUTPUT FROM DRIVER IC
`
`Odd-I
`
`even1
`
`odd2
`
`}
`
`R1
`
`G1
`
`B1
`
`GATE SELECTION SIGNALS
`
`s3
`
`5
`
`I
`
`E
`
`SIGNALS OUTPUT FROM SWITCHES;
`R1
`5/
`
`
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 6 of 14
`
`US 6,424,328 B1
`
`FIG. 7A
`
`48
`
`
`\V.§“>‘.:-‘m\‘
`
`r/:<4.4i/<=\¢*;“a2r‘z/>2.» \§’4l.'&':a-{M
`
`
`A
`
`A.
`
`4
`
`46
`
`
`
`
`
`FIG. 7B
`
`58
`
`53
`
`54
`
`55
`
`59
`
`
`7
`
`
`
`
`
`
`
`
`SEC v. Surpass Tech, IPR2
`SAMSUNG EX.
`
`-0088?
`7 — 7/22
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 7 of 14
`
`US 6,424,328 B1
`
`FIG. 8
`
`odd
`
`even
`
`odd
`
`even
`
`odd
`
`even
`
`odd
`
`G9
`
`B5
`
`B6
`
`B7
`
`B8
`
`B9
`
`G5
`
`G6
`
`G7
`
`G8
`
`123123123123123
`
`R5
`
`R6
`
`R7
`
`R8
`
`R9
`
`
`
`FIG. 9
`
`A1
`
`B1A2
`
`B2A3
`
`B3
`
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`
`
`
`
`
`
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`
`IIIIIIIIIIIIIIIIII
`
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`
`
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 8 of 14
`
`US 6,424,328 B1
`
`FIG. 10
`
`SIGNALS OUTPUT FROM DRIVER IC
`
`0dd1
`
`even1
`
`Odd2
`
`I
`
`R1
`
`R2
`
`R3
`
`I
`
`G1
`
`G2
`
`G3
`
`I
`
`B1
`
`B2
`
`B3
`
`I
`
`GATE SELECTION SIGNALS
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 9 of 14
`
`US 6,424,328 B1
`
`FIG.
`
`11
`
`
`
`
`
`
`
`
`
`
`FIG. 12
`
`B1 A2
`
`B2
`
`M H
`
`
`
`
`
`
`
`
`HIIIIIIIIEIIIIIIIIHIIIIIIII
`EIEIIIIIIIIHIIIIIIIIEIIIIII-
`EIIHIIIIIIIIEIIIIIIIIHIIIIII
`EIII!IIIIIIIIHIIIIIIIIEIIIII
`EIIIIHIIIIIIIIEIIIIIIIIHIIII
`EIIIIIEIIIIIIIIHIIIIIIIIEIII
`flIIIIIIHIIIIIIIIEIIIIIIIIHII
`EIIIIIIIEIIIIIIIIHIIIIIIIIEI
`BIIIIIIIIHIIIIIIIIEIIIIIIIIE
`EEIIIIIIIIEIIIIIIIIEIIIIIIII
`
`
`
`
`
`
`EIIIHIIIIIIIIEIIIIIIIIHIIIII
`EIIIIEIIIIIIIIEIIIIIIIIEIIII
`HIIIIIEIIIIIIIIEIIIIIIIIHIII
`
`
`HIIIIIIEIIIIIIIIHIIIIIIIIEII
`
`
`EIIIIIIIHIIIIIIIIEIIIIIIIIHI
`
`
`EIIIIIIIIEIIIIIIIIHIIIIIIIIE
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 10 of 14
`
`US 6,424,328 B1
`
`odd
`
`even
`
`odd
`
`even
`
`odd
`
`1234512345123451234512345
`
`R1
`
`R2
`
`B2
`
`B3
`
`G4
`
`G5
`
`R6
`
`R7
`
`B7
`
`B8
`
`COLOR
`
`B1
`
`G1
`
`G2
`
`es
`
`R3
`
`B4
`
`B5
`
`B4
`
`B6
`
`G8
`
`B5
`
`G6
`
`G7
`
`R8
`
`F19
`
`I I
`
`
`
`
`
`A1
`
`B1A2
`
`B2
`
`
`
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIIII
`
`
`
`
`
`
`
`
`
`
`
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`IIIIIIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIIIIIII
`IIIIIIIIIIIIIIIIIIIII
`IIIIIIII-III--IIIIIII
`IIIIIIIIIIIIIIIIIIIIII
`
`
`
`
`
`SEC v. Surpass Tech, IPR2015-00887
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`

`
`U
`
`taP
`
`52e:
`
`
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`e_I...............................|-.|..
`m._}_+E.$F.6528m,_15$93Iozsm
`
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` mw2M_......-"|-l-|"-|-I-W-I-4-I-|MI-|-W...........1-1;.m%_W_MWWM_mgn,_1.5%__+__S_mm%_mam5%cmmoE5:85_awU8\J_F5%ammo
`
`oz_>_E_mm_m>4<o_Em>_ms
`
`
`
`72%Q0Qmu_
`
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`
`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 12 of 14
`
`US 6,424,328 B1
`
`FIG,
`
`‘I6
`
`ONE HORIZONTAL SCANNING PERIOD
`
`RED
`
`DATA
`
`GREEN
`
`DATA
`
`I
`
`BLUE DATA
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 13 of 14
`
`US 6,424,328 B1
`
`fWG.17
`
`odd
`
`even odd
`
`even odd
`
`even odd
`
`even odd even odd even
`
`73-1
`
`A1 B1A2 B2
`
`
`nmgmgmgw
`
` EEEEEE
`
`mam
`
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`

`
`U.S. Patent
`
`Jul. 23, 2002
`
`Sheet 14 of 14
`
`US 6,424,328 B1
`
`FIG. 19
`
`odd
`
`even
`
`odd
`
`even
`
`83-1
`
`
`
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`

`
`US 6,424,328 B1
`
`BACKGROUND OF THE INVENTION
`
`1
`LIQUID-CRYSTAL DISPLAY APPARATUS
`
`2
`As an example of divided-by-two time-division driving, a
`system shown in FIG. 17 is formed such that two adjacent
`signal lines 71-1 and 71-2, 71-3 and 71-4, .
`.
`. are handled
`as blocks irrespective of the corresponding colors, red (R),
`1. Field of the Invention
`5 green (G), and blue (B), and the time-division switches 72-1
`,
`,
`,
`,
`,
`and 72-2, 72-3 and 72-4, .
`.
`. connected to these signal lines
`The present Invention relates to, hqu1d'CrySta1 dlsialay
`divide in time time-sequential signals sent through output
`(LCD) apparatuses’ atld more partlcularbe K,’ an ?‘C,t1Ye'
`lines 73_1 73_2
`.
`.
`. from a n0t_Sh0Wn driver IC and
`matrix liquid-crystal display apparatus using time-division
`sequentially sendito the signal lines 71-1 and 71-2, 71-3 and
`driving‘
`in 71-4, ,
`,
`,
`2. Description of the Related Art
`In divided-by-two time-division driving in the system
`ActiVe—matriX liquid-crystal display (LCD) apparatuses
`configured as described above, since signal voltages
`have been mainly used in personal computers and Word
`inverted in polarity between odd-nurnbered and even-
`processing units. Active-matrix LCD apparatuses are supe-
`numbered output terminals of the driver IC are distributed to
`rior in terms of response speed and image quality, and are
`bCSt suited t0 III IIIlpI'OVI1'lg I'CCC1'lt COIOI
`III S1lCh a 15 0dd-nu[nbered and eVen-nu[nbered actual pixels and their
`display apparatus, a nonlinear device such as a transistor and
`polarities are inverted in alternate lines, it is clear from FIG.
`di0de is used in eaCh piXel Of the LCD panel. Specifically,
`18, which shows signal-voltage write conditions, that the
`thin film transist0rs (TFTs) are f0rrned On a transparent
`polarities of the voltages applied to adjacent pixels in one
`insulating substrate suCh as a glass substrate.
`line cannot be inverted in the entire pixel area, namely, dot
`For active-rnatrix LCD apparatuses,
`it
`is said that a 20 inversion cannot be achieved in the entire pixel area.
`so-called dot-inversion driving method, in which the polari-
`In FIG. 18, the horizontal direction indicates a scanning
`ties of voltages to be applied to adjacent dots (pixels) are
`order and the vertical direction indicates the order in which
`inverted, is good in improving image quality. This is because
`the time-division switches operate. A high-voltage write
`inverting the polarities of voltages to be applied to adjacent
`condition is indicated by H, and a low-voltage write condi-
`dots cancels potentials jumped from signal lines, which are 25 tion is indicated by L.
`caused by capacitors formed at the crossover points of signal
`AS another example of diVided_by_tWe tnne_diViSien
`iiiies and gate iiiiesa and thereby Stabie Pixei Peteiitiais are
`driving, a system shown in FIG. 19 is formed such that two
`input to reduce flickers in LCD display.
`adjacent signal lines 81-1 and 81-4, 81-2 and 81-5, 81-3 and
`On the other hand, if the dot-inversion driving method is
`81-6, .
`.
`. for each color of R, G, and B are handled as blocks,
`not employed, the ground level of gate lines fluctuates and 30 and the time-division switches 82-1 and 82-4, 82-2 and 82-5,
`thereby the gate switches of TFTs cannot hold off states.
`82-3 and 82-6, .
`.
`. connected to these signal lines divide in
`Consequently, held pixel potentials are discharged. The
`time time-sequential signals sent through output lines 83-1,
`transmission factors of pixels decrease and their contrast is
`83-2, .
`.
`. from a not-shown driver IC and sequentially send
`also reduced. In addition, since potentials having the same
`to the signal lines 81-1 and 81-4, 81-2 and 81-5, 81-3 and
`polarity are jumped from signal
`lines, pixel contrast 35 81-6, .
`.
`.
`becomes conspicuous between alternate lines. Even if an
`In diVided_by_tWe tnne_diViSien dnving in the System
`image i1aViiig the Same giadiiatieii is dispiayeda difieieiit
`configured as described above, since signal voltages
`giadiiatieiis aie Siiewii iii aiteiiiate iiiie5~
`inverted in polarity between odd-numbered and even-
`Since the dot-inversion driving method solves these 40 numbered output terminals of the driver IC are distributed to
`inconveniences, it is an effective driving method for LCD
`odd-numbered and even-numbered actual pixels and their
`apparatuses to improve image quality.
`polarities are inverted in alternate lines, it is clear from FIG.
`The outputs of an external driver IC for driving an LCD
`20, WhiCh Sh0WS signal-voltage write COI1diti0hS, that dot
`panel usually correspond to the signal lines of the LCD panel
`inVersien Cann0t be aChieVed at .b0undarie.s Of .diVisi0n
`in a one-to-one correspondence relationship, In other words, 45 blocks in one line. Since the definition of dot inversion does
`each output of the driver IC is sent to the corresponding
`not cover the case which happened at the boundaries of the
`signal
`line, On the other hand,
`to make the driver IC
`division blocks, pixel potentials fluctuate and vertical lines
`compact, there has been known a so-called time-division
`appear.
`driving method as an LCD-panel driving method which
`In FIG. 20, the horizontal direction indicates a scanning
`allows the number of the output pins (output terminals) of 50 order and the vertical direction indicates the order in which
`the driver IC to be reduced.
`the time-division switches operate. A high-voltage write
`In this tirne-division driving method, a plurality of signal
`condition is indicated by H, and a low-voltage write condi-
`lines are handled as one block, a driver IC outputs a signal
`ti0n is indieated by L.
`to a plurality of signal lines in one division block in a time
`In other words, when a time-division number is even, the
`sequential manner, time-division switches are provided for 55 polarity of the signal voltage A first written in a division
`an LCD panel in units of division blocks, and the time-
`block is opposite that of the signal voltage B last written in
`sequential signal output from the driver IC is time-divided
`FIGS. 18 and 20. Since signal voltages sent from the driver
`by the time-division switches and sequentially sent to a
`IC are inverted between odd-numbered dots and even-
`plurality of signal lines.
`numbered dots, signal voltages B1, B2,
`.
`.
`. written last in
`When tirne-division driving is applied to a general driver 50 division blocks have the same polarities as signal voltages
`IC used for dot-inversion driving, however, since the output
`A2, A3, .
`.
`. Written first in the following diVisi0n bl0Cl<s.
`signals of the driver IC used for dot-inversion driving
`Therefore, in the first example of divided-by-two time-
`change their polarities between odd-numbered lines and
`division driving, dot inversion cannot be achieved in the
`even-numbered lines, it may occur that dot-inversion driving
`entire pixel area, and in the second example of divided-by-
`cannot be used in time-division driving. With divided-by-
`65 two time-division driving, dot inversion cannot be achieved
`two time-division driving being taken as an example, this
`at the boundaries of division blocks. Hence, image quality is
`issue will be described below.
`reduced. Polarity inversion, however, can be achieved with
`
`SEC v. Surpass Tech, |PR2015—OO887
`SAMSUNG EX. 1027 — 16/22
`
`SEC v. Surpass Tech, IPR2015-00887
`SAMSUNG EX. 1027 - 16/22
`
`

`
`US 6,424,328 B1
`
`3
`chroma signals being rotated. As will be described later, this
`makes data re-arrangement processing complicated and
`increases the size of a processing circuit.
`
`4
`FIG. 10 is a timing chart of each signal in the second
`divided-by-three time-division driving.
`FIG. 11 is a configuration view showing the connections
`of time-division switches in divided-by-nine time-division
`5 driving according to the first embodiment.
`SUMMARY OF THE INVENTION
`FIG‘ 12.15 a Vlew ehewmg Silgnaihveltege Wnte eetldltlens
`The present invention has been made in consideration of
`on Inxele Hit the d1V1ded'ey'mt1e tlmeelivlelen dnVmg‘i
`the above inconveniences. Accordingly, it is an object of the
`FIG 13. I5 f‘ Cohfiguratloh Vlevti’ Showlhg theicohhectlehs
`present invention to provide an LCD apparatus which allows
`0ritIiIhe'dIVIsI0ih sWItehes Ih dIVIde‘I'hY'hVe tIrhe'dIVIsI0h
`time-division driving to be implemented without reducing
`10 driving according to the first embodiment.
`.
`i
`i
`image quality.
`FIG‘ 14.15 a Vletiv ehewmg Slgnehvettiagieiwnte eendltlene
`The foregoing object is achieved according to the present
`on Inxels Hit the d1V1ded'by'fiVe t1me'd1V1S10n drtvmg‘
`i
`invention through the provision of a liquid-crystal display
`i FIG 15 15 a reugh Cohfiguratloh Vlew or an aCt1Ve'Ihatr1X
`apparatus including: a display section formed of a plurality
`of row gate lines, a plurality of column signal lines, and a is hqhId'erYstaI dIspIaY apparaths iaeeerrhhg t0 a seeehd
`plurality of pixels two-dimensionally arranged at the inter-
`erhbedhheht Or the preseht IhVehtI0h~
`sections of the plurality of row gate lines and the plurality of
`FIG- I6 Is a tIrhIhg Chart Or 0peratI0hs Or the aetIVe'IhatrIX
`column signal lines; a transparent substrate on which the
`IIquId'erYstaI dIspIaY apparaths aeeerrhhg t0 the seeehd
`display section is formed; a second transparent substrate
`erhh0dIrheht-
`having an opposite electrode, connected to the transparent 20
`FIG. 17 is a configuration view showing the connections
`substrate with a predetermined gap placed therebetween;
`of time-division switches in first divided-by-two time-
`liquid crystal held in the gap; a driver circuit for outputting
`division driving.
`a time-sequential signal corresponding to a predetermined
`FIG. 18 is a view showing signal-voltage write conditions
`time-division number; and a time-division switch for time-
`on pixels in the first divided-by-two time-division driving.
`dIVIdIhg the tIrhe'seqIIehtIaI sIghaI Ohtpht rr0rh the drIVer 25
`FIG. 19 is a configuration view showing the connections
`eIreIIIt ahd r0r sehrhhg therh t0 the e0rresp0hdIhg sIghaI
`of time-division switches in second divided-by-two time-
`lines among the plurality of column signal lines, wherein the
`division driving.
`t1(IaI(1aC-d1V1S10I1 number used in the time-division switch is set
`l:lGi 20 is a View Showing Signal_V0ltage Write eenditiens
`0
`-
`on ixels in the second divided-b -two time-division driv-
`In the LCD apparatus having the above configuration, the 30 ing.p
`y
`driver circuit ‘outputs a time-sequentialisignal corresponding
`DESCRIPTION OF THE PREFERRED
`to the time division number to allow time-division driving.
`.
`.
`.
`.
`.
`.
`EMBODIMENTS
`The time-sequential signals, for example, in dot-inversion
`Embodiments of the present invention will be described in
`driving, are Signals having different polarities alternately
`(dot-inversion signals). Time-division switches apply time 35 detaII by rererrIhg t0 the draWIhgs~ FIG I Is a WIrIhg
`division to the time-sequential signals with an odd time-
`‘hagrarh Or a IIqIIId'erYstaI dIspIaY seetI0h Or ah aetIVe'
`division number and send them to the corresponding signal
`rhatrIX IIqIIId'erYstaI dIspIaY (I-CD) apparaths aeeerrhhg t0
`lines. With this operation, the voltages applied to adjacent
`a hrst erhhedhheht Or the preseht IhVehtI0h~
`pixels in one line do not have the same polarity, and dot
`In the active-matrix LCD apparatus according to the first
`inversion driving is achieved in the entire pixel area.
`40 eII1b0diII1eI1t, a plurality Of TOW gate hues 11-1, 11-2,
`11-3, .
`.
`. and a plurality of column signal lines 12-1, 12-2,
`12-3, .
`. are arranged in matrix on a transparent substrate
`
`.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`.1
`a
`a
`the
`eeetlen. In an aet1Ve'matrtX hqu.1d'eryeta1 dteptay apparatus 45 of the transparent substrate. Pixels are disposed at
`aeeerdmg to the present mventlen‘
`intersections of the gate lines 11-1, 11-2, 11-3, .
`.
`. made, for
`FIG~ 2 Is a eIreIIIt ‘hagrarh Or pIXeIs~
`example, from polycrystalline silicon, and the signal lines
`FIG. 3 is a block diagram of a configuration example of
`12-1, 12-2, 12-3, .
`.
`. made, for example, from Aluminum to
`a driver IC.
`form a LCD panel (display section) 10. The configuration of
`FIG. 4 is a configuration view showing the connections of 50 the pIXeIs WIII he deserIhed heI0W~
`time-division switches in first divided-by-three time-
`One ehd Of eaCh Of the PIufahtY OI TOW gate IIheS 11-1,
`division driving according to a first embodiment.
`11-2, 11-3,
`.
`.
`.
`iS COI1I1eCted t0 the Output end in the
`FIG. 5 is a view showing signal-voltage write conditions
`Corresponelhg roiw er a Yertlcal dnvmg Clrcult 13' The
`on pixels in the first diVided_by_three time_diViSi0n driving.
`vertical driving circuit 13 is disposed on the same. substrate
`F1G. 6 is a timing Chart of each Signai
`in the first 55 as the LCD panel 10, and sequentially sends selection pulses
`.
`.
`.
`.
`.
`.
`.
`.
`to the gate lines 11-1, 11-2, 11-3, .
`.
`. to select pixels in units
`divided-by-three time-division driving.
`of rows for Vertical Scanning
`FI.G‘ 7A te a Structural Cross Section of a thin elm
`A driver IC 14 is provided as an external circuit of the
`traneleter havmg a eettem gate Structure’ end FIG: 7B 1e a
`LCD panel 10 and sends signal potentials to the signal lines
`structural cross section ofa thin film transistor having a top 60 124’ 12_2’ 12_3’ .
`i
`. according to an image data. Digital
`gate Structure‘
`image data which allows display with eight or more gradu-
`FIG~ 8 Is a e0hhgIIratI0h VIeW sh0WIhg the e0hheetI0hs Or
`ations and 512 colors or more, for example, is input to the
`tIrhe'dIVIsI0h sWItehes Ih seeehd dIVIded'hY'three tIrhe'
`driver IC 14. A general dot-inversion driving IC is used as
`dIVIsI0h drIVIhg aeeerrhhg t0 the hrst erhh0dIrheht~
`the driver IC 14. The driver IC 14 outputs signal voltages in
`FIG. 9 is a view showing signal-voltage write conditions 65 which the potentials are inverted between odd-numbered
`on pixels in the second divided-by-three time-division driv-
`dots and even-numbered dots to implement dot-inversion
`ing.
`driving.
`
`SEC v. Surpass Tech, |PR2015—OO887
`SAMSUNG EX. 1027 — 17/22
`
`SEC v. Surpass Tech, IPR2015-00887
`SAMSUNG EX. 1027 - 17/22
`
`

`
`US 6,424,328 B1
`
`5
`
`5
`6
`terminals and the
`terminals and even-numbered output
`In addition, to implement time-division driving, the driver
`IC 14 time-sequentially outputs signals to pluralities of
`polarities are further inverted every one horizontal scanning
`signal lines with a plurality of signal lines being handled as
`period (1H) to implement the above-described dot-inversion
`one block. A time-division switch section 16 is provided
`driving. The driver IC 14 time-sequentially outputs signals
`between the output lines 15-1, 15-2, 15-3, .
`.
`. of the driver
`from the output terminals to the signal lines with a plurality
`t
`t
`of signal lines in the LCD panel 10 being handled as one
`IC 14 and the Slgnal
`lines 12'1> 12'2> 12'; - ~.-‘The
`biockto imp1emehttime_diVisi0h driving.
`configurations of the driver IC 14 and the time-division
`A first embodiment of the present invention to which
`Switch Section 16 will be described later’
`d _.
`.
`.
`.
`.
`.
`.
`.
`FIG. 2 is a circuit diagram of pixels. As clearly shown in
`ot inversion driving is applied will be described below.
`.
`.
`.
`.
`.
`.
`.
`.
`the figure, each pixel 20 is formed of a thin film transistor 10
`FIG‘ 4 15 ta Configurattlon V1.6?’ tshowutlg a firsttexample 9f
`21, an additional capacitor 22, and a liquid-crystal capacitor
`the connections of the time-division switch section 16. This
`23. The thih hhh transistors 21 are Connected to gate hhes
`view, for example, shows a first example applied to divided-
`iim_i, iim, iim+i,
`.
`t
`t at
`their gate eieotrodes and
`by-three time-division driving corresponding to R, G, and B.
`connected to signal
`lines (source lines) 12n_1, 12,1,
`In this example, the driver IC 14 time-sequentially outputs
`12n+1, .
`.
`. at their source electrodes,
`in this pixel strnotnre,
`the iiqnid_orystai oapaoitor 23 15 signals from the output terminals through the output lines
`indicates a capacitor generated between a pixel electrode
`15-1, 15-2, 15-3,
`.
`.
`. With One signal corresponding t0
`formed of the thin film transistor 21 and the opposite
`adjacent three pixels in the same color, R, G, or B, namely
`electrode formed correspondingly. An “H” potential or an
`three every third piXelS.
`“L” potential is written into and held at the pixel electrode,
`Specifically, as shown in a timing chart of FIG. 6, the
`where “H” indicates a high-voltage write condition and “L” 20 driver IC 14 outputs a signal for R1, R2, and R3 pixels from
`indicates a low-voltage write condition.
`an odd-numbered output terminal through the output line
`The potential (common potential Vcom) of the opposite
`15-1, a signal for G1, G2, and G3 pixels from an even-
`electrode is, for example, set to a DC potential of 6 V and
`numbered output terminal through the output line 15-2, a
`a signal voltage is periodically changed between a high 25 signal for B1, B2, and B3 pixels from an odd-numbered
`voltage “H” and a low voltage “L” at an interval of one field
`output terminal through the output line 15-3, .
`.
`.
`to implement alternate liquid-crystal driving. The alternate
`Tirne-division switches 16-1, 16-4, and 16.7 are provided
`driving reduces polarization of liquid-crystal molecules and
`between the output line 15-1 and three signal lines 12-1,
`prevents the liquid-crystal molecules or an insulating film
`12-4, and 12-7, tirne-division switches 16-2, 16-5, and 16-8
`made, for example, from organic macromolecules and dis- 30 are provided between the output line 15-2 and three signal
`posed at an electrode surface from being charged.
`lines 12-2, 12-5, and 12-8,
`time-division switches 16-3,
`In the pixel 20, when the thin film transistor 21 is turned
`16-6, and 16-9 are provided between the output line 15-3
`on, the optical transmission factor of the pixel changes and
`and three signal lines 12-3, 12-6, and 12-9, .
`.
`.
`the additional capacitor 22 is charged. With this charging,
`These tirne-division switches 16-1, 16-4, 16-7, 16-2, 16-5,
`even if the thin film transistor 21 is turned off, the optical 35 16-8, 16-3, 16-6, 16-9, .
`.
`. are formed in the LCD panel 10
`transmission factor of the pixel set by the charged Voltage of
`together with pixel switches (transistors) and transistors
`the additi0nal CapaCit0r 22 is maintained until the thin film
`constituting the vertical driving circuit 13, by polycrystalline
`transistor
`iS turned Oh next time.
`thiS method, the
`having, for example, a bottom gate structure shown in
`quality of an image displayed on the LCD panel 10 is
`FIG. 7A or a top gate structure shown in FIG. 7B.
`lmPr0Ved~
`In a TFT havin the bottom ate structure shown in FIG.
`FIG. 3 is a block diagram of a configuration example of 40 7A, a gate electride 42 rnadeg, for example, from M0 is
`the driVer lC 14. AS clearly Sh0Wn in FIG. 3, the driVer lC
`formed on a glass substrate 41, a polycrystalline silicon
`14 includes a horizontal shift register circuit 31, a sampling
`(poly-si) layer 44 is forrned thereon throngh a gate insniat_
`SWitCh set 32, a level shifting circuit 33, a data latch circuit
`ing film 43 made, for example, from SiO2, and an inter-layer
`34, and a digital-analog C0nVerSi0n CirC1lit 35.
`ln thiS 45 insulating film 45 made, for example, from SiO2 is further
`eXarnple, fiVe-bit digital image data, datal t0 data5, and
`formed thereon. On the gate insulating film 43 positioned at
`power Voltages Vdd and Vss, for example, are input to the
`the sides of the gate electrode 42, a source area 46 and a
`horizontal Shift register circuit
`ih b0th Shift directions.
`drain area
`formed of N‘'' diffusion layers are disposed. A
`In the driver IC 14 configured as described above, the
`source electrode 48 and a drain electrode 49 made, for
`horizontal shift register circuit 31 sequentially outputs a 5o example, from aluminum are connected to the areas 46 and
`horizontal scanning pulse to perform horizontal scanning
`47, respectively.
`(row scanning). Each sampling switch in the sampling
`In a TFT having the top gate structure shown in FIG. 7B,
`SWitCh set sequentially samples the ihpllt
`image
`a polycrystalline silicon layer
`is formed on a glass
`data datal to data5 according to the corresponding horizon-
`substrate 51, a gate electrode 54 is formed thereon through
`tal scanning pulse sent from the horizontal shift register 55 a gate insulating filrn 53 made, for example, from Sioz, and
`CirC1lit 31.
`an inter-layer insulating film 55 made, for example, from
`The level shifting circuit 33 increases in voltage the 5-V
`SiO2 is further formed thereon. At the sides of the polycrys-
`digital data, for example, sampled by the sampling switch
`talline silicon layer 52 on the glass substrate 51, a source
`set 32 to digital data having a liquid-crystal driving voltage.
`area 56 and a drain area 57 formed of N’' diffusion layers are
`The data latch circuit 34 is a memory that accumulates the 50 disposed. A source electrode 58 and a drain electrode 59
`digital data of which the voltage has been increased by the
`made, for example, from aluminum are connected to the
`level shifting circuit 33, for one horizontal scanning period.
`areas 56 and 57, respectively.
`The digital-analog conversion circuit 35 converts the digital
`These tirne-division switches 16-1, 16-4, 16-7, 16-2, 16-5,
`data for one horizontal scanning period output from the data
`16.8, 16-3, 16-6, 16-9,
`.
`.
`. are sequentially turned on
`latCh Cirellit 34 t0 an analog signal and Outputs it-
`65 according to gate selection signals s1, s2, and s3 (see the
`The driver IC 14 outputs dot-inversion signals in which
`timing chart of FIG. 6) sent from the outside to divide by
`the polarities are inverted between odd-numbered output
`three in one horizontal scanning period time-sequential
`
`SEC v. Surpass Tech, |PR2015—OO887
`SAMSUNG EX. 1027 — 18/22
`
`SEC v. Surpass Tech, IPR2015-00887
`SAMSUNG EX. 1027 - 18/22
`
`

`
`US 6,424,328 B1
`
`7
`8
`numbered output terminal through the output line 15-2, a
`signals output from the driver IC 14 through the output lines
`signal for R3, G3, and B3 pixels from an odd-numbered
`15-1, 15-2, 15-3, .
`.
`. and to send them to the corresponding
`output terminal through the output line 15-3.
`.
`.
`signal lines.
`Time-division switches 16-1, 16-2, and 16-3 are provided
`In this way, signal potentials which, for example, allow
`5 between the output line 15-1 and three signal lines 12-1,
`display with eight or more graduations and 512 colors or
`12-2, and 12-3, time-division switches 16-4, 16-5, and 16-6
`more are sent from the driver IC 14 to the signal lines 12-1,
`are provided between the output line 15-2 and three signal
`12-2, 12-3, .
`.
`. through the output lines 15-1, 15-2, 15-3, .
`.
`.
`lines 12-4, 12-5, and 12-6,
`time-division switches 16-7,
`and the time-division switches 16-1, 16-2, 16-3, .
`.
`. In this
`16-8, and 16-9 are provided between the output line 15-3
`case, the time-sequential signals output from the external
`driver IC 14 are sent to the time-division switches 16-1, 10 and three signal lines 12-7, 12-8, and 12-9, .
`.
`.
`16-2, 16-3, ~
`~
`~ ih the Order 0f R, G, ahd B
`These time-division switches 16-1, 16-2, 16-3, 16-4, 16-5,
`Atime-division number should be odd, and is preferably
`16-6, 16-7, 16-8, 16-9, .
`.
`. are formed in the same way as
`the n-th power of three (n: natural number) or a multiple of
`in the previous application example in the LCD panel 10 by
`three. This is because, since one pixel is formed of three R,
`polycrystalline TFTs having a gate structure shown in FIG.
`G, and B dots,
`the R1, R2, and R3 pixel outputs can 15 7A or FIG. 7B. These time-division switches are sequen-
`correspond to odd-numbered outputs and even-numbered
`tially turned on according to gate selection signals s1, s2,
`outputs inverted each other and sent from the external driver
`and s3 (see the timing chart of FIG. 10) sent from the outside
`IC 14. It is a matter of course that this also applies to G1, G2,
`to divide by three in one horizontal scanning period time-
`and G3, and B1, B2, and B3.
`sequential signals output from the driver IC 14 through the
`It is also clear from the above descriptions that the driver 20 Oiitpiit iihes i5'i> i5'2> i5'3> -
`-
`- ahd t0 Sehd theih t0 the
`IC 14 outputs R, G, and B signals in synchronization from
`eeiiespehdihg Sigiiai iiiie5~
`the corresponding output terminals to the output lines 15-1,
`Also in the divide-by-three time-division driving
`15-2, 15-3, .
`.
`. Therefore, the signal potentials output from
`described above, since a time-division number is odd, signal
`the external driver IC 14 do not need to be rotated. I