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`Page 1 of 2
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`Patent
`Docket No. 3079/255
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`1-(1') D:I'(cid:173)
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`TO THE DIRECTOR OF PATENT AND TRADEMARK SERVICES
`Box Applications
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`Sir:
`
`Transmitted h~rewith for filing is the patent application of under 37 CFR 1.53 (b) :
`INVENTOR(S) :
`Yuh-Ren SHEN, Cheng-Jung CHEN. Chun-Chi CHEN
`
`TITLE: LIQUID CRYSTAL DISPLAY DRIVING DEVICE OF MATRIX STRUCTURE TYPE AND ITS
`DRIVING METHOD
`
`This application"is being filed without the declaration of the
`inventor(s).
`Inventor information is as follows:
`
`This is a continuing application of prior Application No. __ 1 ________ __
`Continuation
`Divisional
`Continuation-in-part
`
`Enclosed are:
`~ Specification
`~ ~ Sheets of drawings
`~ Oath or Declaration signed by the inventor(s)
`__ X__ Newly Executed
`Copy of Oath or Declaration from a Prior Application
`PLEASE DELETE the following inventor(s) named in the prior
`nonprovisional application:
`
`Certified copy of
`
`Convention priority is claimed
`English Translation Document
`__ X__ An executed Assignment in favor of VAST VIEW TECHNOLOGY INC.
`__ X__ Small entity status is claimed
`Preliminary Amendment
`Information Disclosure Statement
`
`SHARP EXHIBIT 1006
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`Page 1 of 188
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`BASIC FEE
`Total Claims
`IndeQ. Claims
`
`56
`7
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`20 =36
`3 =4
`
`x ~ 9
`x ~ 43
`
`~324
`
`~172
`
`(Small Entity)
`~385
`
`(Large Entity)
`~770
`x ~ 18 =
`x ~ 86
`
`MultiQle DeQendent Claims Presented
`TOTAL
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`+ $145
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`+ $290
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`$881
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`~ Assignment Recordation Fee of $40.00
`
`in the amount of
`please charge Deposit Account
`(A duplicate copy of this sheet is enclosed)
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`__ X ___ A payment of $921.00 is made by credit card for the filing fee. A Credit
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`The Commissioner is hereby
`authorized to charge payment of any additional filing fees required under 37 CFR
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`04-0753
`A duplicate copy of this sheet is enclosed.
`
`Date: August 31, 2004
`
`Reg. No.
`
`DENNISON, SCHULTZ, DOUGHERTY & MACDONALD
`1727 King Street
`Suite 105
`Alexandria, Virginia 22314
`703-837-9600 Ext: 17
`703-837-0980 Fax
`
`23338
`
`Customer Number
`PATENT TRADEMARK OFFICE
`
`Page 2 of 188
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`TITLE: LIQUID CRYSTAL DISPLAY DRIVING DEVICE OF MATRIX
`
`STRUCTURE TYPE AND ITS DRIVING METHOD
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`The present invention relates to a liquid crystal display driving device of matrix
`structure type and its driving m.ethod, especially to a display driving device and its
`driving method, which can simultaneously or synchronously drive a plurality of thin
`film transistors to increase the response speed, wherein the source and the gate of each
`thin film transistor in the driving device are respectively connected with different gate
`lines and data lines to let the specific transistor be driven by the gate drivers and the
`data drivers, and the predetermined voltage for over drive or the data voltage for the
`present frame interval is applied to accomplish the object of increasing the response
`speed. The present invention can suit for the picture treatment of various liquid crystal
`displays, organic light emitting diode (OLED) display or plasma display panel (PDP).
`
`2. Description of the Prior Art
`Because the liquid crystal display possesses the advantages of low power
`consumption, light of weight, thin thickness, without radiation and flickering, it
`gradually replaces the traditional cathode ray tube (CRT) display in the display market.
`The liquid crystal display is chiefly used as the screen of the digital television, the
`computer or the notebook computer. In particular, the large sized liquid crystal display
`is widely used in the amusements of the life, especially in the field in which the view
`angle, the response speed, the color number, and the image of high quality are in great
`request.
`
`Referring to Fig.l A and 1 B, they are the simple schematic views showing the
`internal structure of the prior liquid crystal display. Mark lOis the display panel. The
`data driver 11 is installed above the display panel, which can change the data of the
`adjusted gray level signal into the corresponding data voltage. The image signal can
`be transferred to the display panel 10 through the plurality of data lines 111 connected
`with the data driver 11. The gate driver 12 is installed on one side of the display panel
`10, which can continuously provide scanning signal. The scanning signal can be
`transferred to the display panel 10 through the plurality of gate lines 121 connected
`with the gate driver 12. The data line 111 and the gate line 121 are orthogonally
`crossed and insulated with each other. The area enclosed in them is a pixel 13.After
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`the image signal is output from the data driver 11, it will get to the source of the thin
`film transistor QI in the pixel 13 through the data line DJ, and a control signal is
`correspondingly output from the gate driver 12, it will get to the gate of the thin film
`transistor QI through the gate line 0 1. The circuit in the pixel 13 will output the output
`voltage to drive the liquid crystal molecular corresponding to the pixel 13, and a
`parallel plate type of capacitor CLC (capacitor of liquid crystal) will be formed by the
`liquid crystal molecules between the two pieces of glass substrates in the display
`panel 10. Because the capacitor C LC cannot keep the voltage to the next time of
`renewing the frame data, so there is a storage capacitor Cs provided for the voltage of
`the capacitor being able to be kept to the next time of renewing the frame data.
`
`The image treatment of the display is affected by the properties of the liquid
`crystal molecular such as viscosity, dielectricity and elasticity etc. The brightness in
`the traditional CRT is displayed by the strike of the electron beam on the screen
`coated with phosphorescent material, but the brightness display in the liquid crystal
`display needs time for the liquid crystal molecular to react with the driving voltage,
`the time is called "response time". Taking the normally white (NW) mode as an
`example, the response time can be divided to two parts:
`(1) The ascending response time: it is the time for the liquid crystal molecular to
`rotate with the application of the voltage when the brightness of the liquid crystal
`box in the liquid crystal display changes from 90% to 10%, simply called "Tr";
`and
`
`(2) The descending response time: it is the time for the liquid crystal molecular to
`restore without the application of the voltage when the brightness of the liquid
`crystal box changes from 10% to 90%, simply called "Tr".
`
`When the display speed of the frame is above 25 frames per second, human will
`regard the quickly changing frames as the continuous picture. In general above 60
`frames per second is the display speed of the screen in the modern family amusements
`such as DVD films of high quality and electronic games of quick movement, in other
`words, the time of each frame interval is 1160 sec=16.67ms. If the response time of
`the liquid crystal display is longer than the frame interval time, the phenomena of
`residue image or skip lattice would happen in the screen so that the quality of the
`image is badly affected. At present the methods for decreasing the response time of
`the liquid crystal display have: lowering the viscousity, reducing the gap of the liquid
`crystal box, increasing the dielectricity and the driving voltage, wherein the methods
`of lowering the viscosity, reducing the gap of the liquid crystal box and increasing the
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`dielectricity can be executed from the material and the making process of the liquid
`crystal and the method of increasing the driving voltage can be executed from the
`driving method of liquid crystal panel. The latter can further improve the response
`speed of the gray level in no need of largely changing the structure of the display
`panel. It is called "overdrive" (OD) technique, wherein the increasing voltage can be
`transferred to the liquid crystal panel through the driver integrated circuit (diver IC) to
`increase the voltage for rotating the liquid crystal so that the expected brightness of
`the image data can be quickly obtained and the response time can be reduced due to
`the quick rotation and restoration of the liquid crystal.
`
`Referring to Fig.2, the liquid crystal display has different brightness at different
`driving voltage. If LI is the expected brightness of the image data and the liquid
`crystal molecular is driven by the present data voltage V 1 to display the brightness, the
`brightness variation displayed by the driven liquid crystal molecular is shown as curve
`21 and the time for obtaining the brightness is to. An increased driving voltage V 2 is
`provided to reduce the time for obtaining the brightness according to the brightness
`variation of the display gray level, which has been measured in advance. The
`brightness variation is shown as curve 22. Therefore, the time for obtaining the
`
`expected brightness can be reduced from to to to'; this is the so-called OD technique.
`
`Referring to Fig.3A to 3C, if the expected brightness of an image in the
`preceding frame interval 1-1 is code 32, and the expected brightness of the said image
`in the present frame interval I becomes code 120, the brightness variation of the liquid
`crystal display is shown as curve (a) without making use of OD technique. It is shown
`that the expected brightness cannot be obtained unless the 1+ 1 th frame interval is got.
`This would produce the problem of residue image. By use of OD technique, the
`driving voltage is increased to code 200 in the present frame interval I to be able to
`obtain the expected brightness at the end of the frame interval. Its brightness variation
`is shown as curve (b). In the driving process of the first gate line 0 1 and the first data
`line DJ, when the frame interval I begins, a control voltage pulse is given to the first
`gate line 0 1 by the gate driver and at the same time a driving voltage code 200 is
`given to the first data line DI by the data driver so that the first pixel (not shown)
`connected with the first gate line and the first data line can change its brightness. If
`the sequential frame interval still display the brightness of code 120 and the next
`frame interval 1+ 1 begins, a control voltage pulse is still given to the first gate line and
`the driving voltage given to the first data line is decreased to code 120 to keep the
`expected brightness. The present invention makes use of the "overdrive" concept and
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`discloses a novel liquid crystal display driving device of matrix structure type and its
`driving method to reduce the response time of the liquid crystal display.
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`SUMMARY OF THE INVENTION
`The chief object of the present invention is to provide a liquid crystal display
`driving device of matrix structure type to increase the response speed of the liquid
`crystal display and the aspect ratio of the panel and to decrease the number of the data
`drivers and the data lines.
`
`Another object of the present invention is to provide a driving method for the
`liquid crystal display of matrix structure type, which can simultaneously or
`synchronously start the plurality of thin film transistors in the display panel and drive
`the pixels controlled by the thin film transistors to reduce the response time of the
`liquid crystal display.
`
`To achieve the above-stated objects of the present invention, the basic structure
`of the driving device of the present invention includes a group of thin film transistors
`with matrix array, gate lines connected with the gate drivers and insulated with each
`other, wherein the gates and the sources of all the thin film transistors are respectively
`connected with the gate lines and the data lines. The response time of the liquid
`crystal display can be reduced by the different arrangement design of the gate lines
`and the data lines and by the different connection location between the gate lines and
`the gates of the thin film transistors and between the data liens and the sources of the
`thin film transistors. The gate drivers can be respectively installed on the left side and
`the right side of the liquid crystal panel and the data drivers can be respectively
`installed on the upper side and the lower side. The gate driver can be a chip installed
`on glass or an integrated gate driver circuit installed on glass.
`
`The driving method for the said driving device includes: the period of the
`predetermined voltage of the over drive received by the thin film transistors connected
`with the first gate line is set as a over exciting period and the period of the data
`voltage of the present frame interval received by the thin film transistor connected
`with the first gate line is set as a brightness keeping period.
`
`When the over exciting period begins, two gate lines in the liquid crystal display
`are turned on in a time of one synchronous control signal or by the control signals
`simultaneously produced by the gate drivers. The predetermined voltage is given to
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`the thin film transistors connected with one of the gate lines which are simultaneously
`or synchronously turned on, the data voltage is given to the thin film transistors
`connected with the other of the gate lines which are simultaneously or synchronously
`turned on, and scanning continues in turn.
`
`When the brightness keeping period begins, two gate lines in the liquid crystal
`display are orderly turned on in a time of one synchronous control signal or by the
`control signals simultaneously produced by the gate drivers. One of the gate lines is
`the next gate line of the last gate line given to the said predetermined voltage. The
`predetermined voltage of over drive is given to the thin film transistors connected
`with the said gate line, and the data voltage of the present frame interval is given to
`the thin film transistors connected with the first gate line which is turned on orderly.
`Scanning continues in turn until the whole liquid crystal display is scanned, and the
`next frame interval begins.
`
`If the ratio of the number of the gate lines scanned in the over excited period to
`the number of the total gate lines is P and the period of the frame interval of the liquid
`crystal display is T, then the duration of the over exciting is PT and the duration of the
`brightness keeping is (I-P)T. The ratio P can be adjusted according to the
`characteristic of the display panel.
`
`the
`invention possesses
`the present
`the statement stated above,
`From
`characteristic of dividing the space of the gate lines of the display panel into a
`plurality of regions and the time of the frame interval into a plurality of sub-region .
`times. Each region is orderly scanned in a time of one synchronous control signal.
`Therefore, the state of "frame in frame" is formed in the space and the time. The
`method of the present invention can suit for various picture treatments of liquid
`crystal display, organic light emitting diode (OLED) display or plasma display panel
`(PDP).
`
`To make the present invention be able to be clearly understood, there are some
`preferred embodiments and their accompanying draws described in detail as below.
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`BRIEF DESCRIPTION OF THE DRAWINGS
`Fig.lA is a simple schematic view of the structure of the general liquid crystal
`display;
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`Fig.l B is an enlarged schematic sectional view taken from Fig.l A, which shows the
`arrangement of the elements in the area enveloped in the data lines and the
`gate lines;
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`Fig.2 is a curve view showing the variation of the image brightness of the liquid
`crystal display with the time at different driving voltages;
`
`Fig.3A is a comparison view showing the variation of the expected brightness of a
`pixel with OD technique and without OD technique;
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`Fig.3B is a schematic view showing the control voltage pulse of the first gate line
`from the gate driver of the liquid crystal display in the frame interval of
`Fig.3A;
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`Fig.3C is a schematic view showing the driving voltage of the first data line from the
`data drivers of the liquid crystal display in the frame interval of Fig.3A;
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`Fig.4A is a schematic view showing the arrangement of the gate lines and the data
`lines of the display panel of the first embodiment according to the present
`invention;
`
`Fig.4B is an enlarged schematic sectional view taken from Fig.4A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.4C is an enlarged schematic sectional view taken from Fig.4A, which shows there
`is a space between the neighboring data lines for preventing them from short
`circuit;
`
`Fig.5A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the first embodiment according to the present invention,
`which shows the state of the data drivers respectively installed on the upper
`side and the lower side of the display panel;
`Fig.5B is an enlarged schematic sectional.view taken from Fig.5A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
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`Fig.6A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the first embodiment according to the present invention,
`which shows the state of each pair of data lines connected to a data driver,
`which is connected to the electronic switch;
`
`Fig.6B is an enlarged schematic sectional view taken from Fig.6A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.7 is a wave form view of the signal used in the driving method of the display
`device of the first embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate driver and the data drive at different frame interval
`time;
`
`Fig.8A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the second embodiment according to the present
`invention;
`
`Fig.8B is an enlarged schematic sectional view taken from Fig.8A, which shows the
`arrangement of the gate liens and the data lines and the state of the gate and
`the source, which are connected with the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.8C is an enlarged schematic sectional view taken from Fig.8A, which shows there
`is a space between the neighboring data lines for preventing them from short
`circuit;
`
`Fig.9A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the second embodiment according to the present invention,
`which shows the state of the data drivers respectively installed on the upper
`side and the lower side of the display panel;
`
`Fig.9B is an enlarged schematic sectional view taken from Fig.9A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected with the gate lines and the data lines, of each
`thin film transistor;
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`Fig. lOA is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the second embodiment according to the present inveQtion,
`which shows the state of each pair of data lines connected to a data driver,
`which is connected to the electronic switch;
`
`Fig. 1 OB is an enlarged schematic sectional view taken from Fig.l OA. which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.ll is a wave form view of the signal used in the driving method of the display
`device of the second embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate driver and the data driver ate different frame interval
`time;
`
`Fig.12A is a schematic view showing the arrangement of the gate lines and the data
`lines of the display panel of the third embodiment according to the present
`invention;
`
`Fig.12B is an enlarged schematic sectional view taken from Fig. 12A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.12C is an "enlarged schematic sectional view taken from Fig.12A, which shows
`there is a space between the neighboring gate liens to prevent them from short
`circuit;
`
`Fig.13A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the third embodiment according to the present invention,
`which shows the state of the gate drivers respectively installed on the left side
`and the right side of the display panel;
`
`Fig.13B is an enlarged schematic sectional view taken from Fig.13A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
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`thin film transistor;
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`Fig.14 is a wave form view of the signal used in the driving method of the display
`device of the third embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate drivers and the data drivers at different frame interval
`time;
`
`Fig.ISA is a schematic view showing the arrangement of the gate lines and the data
`lines of the display panel of the fourth embodiment according to the present
`invention;
`
`Fig.lSB is an enlarged schematic sectional view taken from Fig.I5A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.15C is an enlarged schematic sectional view taken from Fig.I5A, which shows
`another arrangement of the gate lines and the data lines of the display panel of
`the fourth embodiment according to the present invention;
`
`Fig.I6A is a schematic view of the arrangement of the gate lines and the data line of
`the display panel of the fourth embodiment according to the present invention,
`which shows the state of the gate drivers respectively installed the left side and
`the right side of the display panel;
`
`Fig.I6B is an enlarged schematic sectional view taken from Fig.16A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.I7 is a wave form view of the signal used in the driving method of the display
`device of the fourth embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate drivers and the data drivers at different frame interval
`time;
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`Fig.I8 is a wave form view of the signal used in another driving method of the display
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`device of the third embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate drivers and the data drivers at different frame interval
`time;
`
`Fig.19A is a schematic view showing the arrangement of the gate lines and the data
`lines of the display panel of the fifth embodiment according to the present
`invention;
`
`Fig.19B is an enlarged schematic sectional view taken from Fig.19A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.19C is an enlarged schematic sectional view taken from Fig.19A, which shows
`there is a space between the neighboring gate lines to prevent them from short
`circuit;
`
`Fig.20A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the fifth embodiment according to the present invention,
`which shows the state of the gate drivers respectively installed on the left side
`and the right side of the display panel;
`
`Fig.20B is an enlarged schematic sectional view taken from Fig.20A, which shows the
`arrangement of the gate lines and the data liens and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.21 is a wave form view of the signal used in the driving method of the display
`device of the fifth embodiment according to the present invention, which
`shows the variation of the wave form of the signal of the gate lines and the
`data lines from the gate drivers and the data drivers at different frame interval
`time;
`
`Fig.22A is a schematic view showing the arrangement of the gate lines and the data
`lines of the display panel of the sixth embodiment according to the present
`invention;
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`Fig.22B is an enlarged schematic sectional view taken from Fig.22A, which shows the
`arrangement of the gate lines and the data liens and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.22C is an enlarged schematic sectional view taken from Fig.22A, which shows
`another arrangement of the gate lines and the data lines and the state of the
`gate and the source, which are connected to the gate lines and the data lines, of
`each thin film transistor;
`
`Fig.22D is an enlarged schematic sectional view taken from Fig.22A, which shows
`there is a space between the neighboring data lines for preventing them from
`short circuit;
`
`Fig.23 A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the sixth embodiment according to the present invention,
`which shows the state of the data drivers respectively installed on the upper
`side and the lower side of the display panel;
`
`Fig.23B is an enlarged schematic sectional view taken from Fig.23A, which shows the
`arrangement of the gate lines and the data liens and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
`
`Fig.24A is a schematic view of the arrangement of the gate lines and the data lines of
`the display panel of the sixth embodiment according to the present invention,
`which shows the state of each pair of data lines connected to a data driver,
`which is connected to the electronic switch;
`
`Fig.24B is an enlarged schematic sectional view taken from Fig.24A, which shows the
`arrangement of the gate lines and the data lines and the state of the gate and
`the source, which are connected to the gate lines and the data lines, of each
`thin film transistor;
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`Fig.25 is a wave form view of the signal used in the driving method of the display
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`device of the sixth embodiment according to the present invention, which shows the
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`variation of the wave form of the signal of the gate lines and the data lines from the
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`gate driver and the data driver ate different frame interval time;
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`DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
`Referring to Fig.2, because each liquid crystal display panel has its characteristic
`and each of brightness of the liquid crystal display panel is produced by a preset
`driving voltage, it is necessary for the OD driving technique that the brightness
`variation of the panel at various driving voltages would be measured in advance. On
`the curve in the Fig.2, the brightness, which is marked 21, 22, 23, 24, and 25, is
`respectively produced by the voltage Vi' V2, V3 , V4 , and Vs' If need be, the number
`of the curves about the measured brightness can be increased. The variation data of
`the curve can be made into a lookup table, which can be stored in the electronic
`elements of the liquid crystal display and become the base on which the driver can
`select the voltage to produce the brightness of the panel. The means about this
`technique can be arbitrarily modified and varied by the persons skilled at this art.
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`The first embodiment
`Referring to Fig.4A to 4C, they show a preferred embodiment of the liquid
`crystal display driving device of matrix structure type according to the present
`invention. The driving device includes a group of thin film transistors Q with matrix
`array, which consists of N rows and M columns of thin film transistors, wherein, each
`thin film transistor Q can drive one pixel, so N x M pixels (shown by rectangle with
`dotted line) can be driven. The first gate line G 1 is connected with the gates of all the
`thin film transistors Q of the first row, the second gate line G 2 is connected with the
`gates of all the thin film transistors Q of the second row, and so are the others.
`Therefore, there are N gate lines connected to gate driver and they are insulated with
`each other.
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`The first and the second data lines D 1, D 1, of the first group of data lines are
`respectively connected with the sources of all the thin film transistors Q of the odd
`and the even rows of the first column. The first and the second data linesD2, D 2,ofthe
`second group of data lines are respectively connected with the sources of all the thin
`film transistors Q of the odd and the even rows of the second column and so are the
`others. Therefore, in total there are M groups of data lines connected to the data
`drivers and they are insulated with each other. To prevent the neighboring data lines
`from short circuit, for example, the second data line D
`of the first group of data lines
`"
`and the first data line D2 of the second group of data lines, a space is given between
`the neighboring data lines, of which arrangement is shown as Fig. 4C.
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`As shown in Fig. 4A, the data drivers connected with the data lines are installed
`on the same side of the display panel. If the scanning frequency is 60 Hz and there are
`two gate lines being turned on at the same time, the scanning time can be further
`decreased. Referring to Fig. 5A and 5B, the data drivers are respectively arranged on
`the upper and the lower sides of the liquid crystal display, and the first and the second
`data line of each group of data lines are respectively connected with the data drivers
`of the upper and the lower sides of the liquid crystal display, wherein, the scanning
`frequency of the data drivers is kept at 60 Hz. Referring to Fig. 6A and 6B, the first
`data line of each group of data lines and the neighboring second line of another group
`of data lines are connected with the same data drivers, and the data transfer is
`switched by an electronic switch S of which scanning frequency is a multiple of 60 Hz,
`such as 120 Hz, 180 Hz ... etc. The form of the gate driver can be a chip on glass or an
`integrated gate driver circuit on glass.
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`Referring to F