`
`_______________
`
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`
`_______________
`
`
`SHARP CORPORATION
`Petitioner
`
`v.
`
`SURPASS TECH INNOVATION LLC
`Patent Owner
`
`_______________
`
`Case IPR2015-00022
`U.S. Patent No. 7,420,550
`
`_______________
`
`
`PATENT OWNER SURPASS TECH INNOVATION LLC’S
`PRELIMINARY RESPONSE
`
`
`
`
`
`
`
`
`TABLE OF CONTENTS
`
`Introduction .......................................................................................................... 1
`I.
`II. Background .......................................................................................................... 2
`a. U.S. Patent No. 7,420,550 (the “‘550 patent” or “Shen”) ................................ 2
`b. The Independent Claims at Issue ...................................................................... 5
`c. Petitioner’s Grounds of Challenge ................................................................... 7
`III. Claim Construction ........................................................................................... 9
`IV. Argument ........................................................................................................ 10
`a. Discussion of Shimada (Ex. 1002) ................................................................. 10
`b. Shimada Fails to Disclose All Relied-Upon Features of the Challenged
`Claims ................................................................................................................... 12
`c. No Basis Exists to Modify Shimada’s Source and Gate Driving Circuits ..... 15
`d. Discussion of Janssen (Ex. 1003) ................................................................... 21
`e. Janssen Fails to Disclose All Relied-Upon Elements of the Challenged
`Claims ................................................................................................................... 23
`f. No Basis Exists to Modify Janssen in the Manner Alleged by Petitioner ..... 26
`g. Discussion of Takeuchi (Ex. 1005) ................................................................ 30
`V. Conclusion ......................................................................................................... 32
`
`
`
`
`
`
`
`ii
`
`
`
`
`TABLE OF AUTHORITIES
`
`
`Cases
`
`Continental Can Co. v. Monsanto Co., 948 F.2d 1264 (Fed. Cir. 1991) ................ 25
`Corning Incorporated v. DSM IP Assets B.V.,
` IPR 2013-00048 paper 94 (PTAB 5/9/2014) ........................................................ 18
`In re Bigio, 381 F.3d 1320 (Fed Cir. 2004) ............................................................... 9
`In re Oelrich, 666 F.2d 578 (CCPA 1981) .............................................................. 25
`In re Paulsen, 30 F.3d 1475 (Fed. Cir. 1994) ............................................................ 9
`In re Rijckaert, 9 F.3d 1531 (Fed. Cir. 1993) .......................................................... 25
`In re Translogic Tech., Inc., 504 F.3d 1249 (Fed. Cir. 2007) ................................... 9
`In re Van Geuns, 988 F.2d 1181 (Fed. Cir. 1993) ..................................................... 9
`KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007) ............................. 17, 20, 26, 31
`MEHL/Biophile Int’l Corp. v. Milgraum,
` 192 F.3d 1362 (Fed. Cir. 1999) ............................................................................ 25
`VMware, Inc. v. Electronics and Telecommunications Research Institute,
` IPR2014-00901, paper 7 (PTAB 7/14/2014) .......................................................... 2
`Statutes
`
`35 U.S.C. § 314(a) ........................................................................................ 1, 10, 32
`35 U.S.C. § 325(d) ................................................................................................... 32
`Other Authorities
`
`M.P.E.P. § 2112(IV) ................................................................................................ 24
`Office Patent Trial Practice Guide, 77 Fed. Reg. 48756, 48766 (Aug. 14, 2012) .... 9
`Rules
`
`37 C.F.R. § 42.8(b)(1) ................................................................................................ 2
`37 C.F.R. § 42.22(a)(2) .............................................................................................. 2
`37 C.F.R. § 42.65(a) ............................................................................................ 1, 18
`37 C.F.R. § 42.100(b) ................................................................................................ 9
`37 C.F.R. § 42.104(b)(4) ............................................................................................ 2
`37 C.F.R. § 42.104(b)(5) .................................................................................. passim
`
`
`iii
`
`
`
`
`
`
`Exhibit
`
`2001
`
`2002
`
`2003
`
`
`
`
`
`
`
`
`
`
`LIST OF PATENT OWNER’S EXHIBITS
`
`Description
`
`U.S. Patent No. 6,724,855 to Sugawara et al.
`
`U.S. Patent No. 6,774,884 to Shimoda et al.
`
`U.S. Patent No. 6,961,167 to Prins et al.
`
`
`iv
`
`
`
`
`I.
`
`Introduction
`
`
`
`The Petition for inter partes review of U.S. Patent No. 7,420,550 (“the ’550
`
`patent”) should be denied and no trial instituted because there is no “reasonable
`
`likelihood that the petitioner would prevail with respect to at least 1 of the claims
`
`challenged in the petition.” 35 U.S.C. § 314(a).
`
`The Petition (cited to herein as “Pet.”) presents grounds for challenge
`
`against claims 1-5 of the ‘550 patent based entirely on obviousness grounds. But
`
`Petitioner’s obviousness-based challenges not only fail to address every element of
`
`the challenged claims; they also lack sufficient rationale for why a person of
`
`ordinary skill in the art would have modified the prior art to reach the claimed
`
`invention. And Petitioner does not include any expert testimony in support of its
`
`Petition. This results in numerous instances where the attorney argument lacks any
`
`“underlying facts or data,” in violation of 37 C.F.R. § 42.65(a). Finally, the claim
`
`charts presented in the Petition are filled with single-spaced attorney argument and
`
`characterizations, once again in violation of the Board’s rules, and all such
`
`argument should be disregarded by the Board.1 See Pet. at 35-38; 51-55.
`
`1 “If there is any need to explain how a reference discloses or teaches a limitation,
`
`that explanation must be elsewhere in the petition—not in a claim chart.” VMware,
`
`Inc. v. Electronics and Telecommunications Research Institute, IPR2014-00901,
`
`
`
`1
`
`
`
`Further, the Petition is incomplete and in violation of the Board’s governing
`
`requirements set forth in 37 C.F.R. §§ 42.22(a)(2), 42.104(b)(4), and 42.104(b)(5).
`
`Patent Owner also reserves its right to challenge Petitioner’s proper naming of all
`
`the real parties in interest, as required by 37 C.F.R. § 42.8(b)(1), and to seek
`
`additional discovery in support of this challenge.
`
`For these reasons and more, the Petitioner fails to meet its burden in
`
`establishing a reasonable likelihood of success on any challenged claim, and the
`
`Petition for Inter Partes review should be denied in full.
`
`II.
`
`Background
`
`a. U.S. Patent No. 7,420,550 (the “‘550 patent” or “Shen”)
`
`
`
`
`
`The ‘550 patent was filed as U.S. Patent application no. 10/929,473 on
`
`August 31, 2004. The title of the ‘550 patent is “LIQUID CRYSTAL DISPLAY
`
`DRIVING DEVICE OF MATRIX STRUCTURE TYPE AND ITS DRIVING
`
`METHOD.” The ‘550 patent specifically discloses a matrix structure arrangement
`
`for a liquid crystal display (LCD) panel in which pixels are arranged in rows and
`
`
`paper 7 (PTAB 7/14/2014) (Order to Correct Non-Compliant Petition by APJ
`
`Quinn, for a panel consisting of APJs McNamara, Quinn, and Anderson).
`
`2
`
`
`
`
`columns. An example of this structure is shown below as Fig. 4A and Fig. 4B of
`
`the ‘550 patent:
`
`
`
`As shown in Fig. 4A and Fig. 4B, data lines D1, D1’, D2 … are connected to
`
`source drivers, and the data lines are grouped in pairs, such as D1 and D1’. A single
`
`pair of data lines provides driving signals for a column of pixels. The column of
`
`pixels are arranged such that the odd-numbered rows of pixels have thin film
`
`transistors (TFTs) with their sources connected to the first data line (e.g. D1)
`
`among the pair, and the even-numbered rows of pixels have TFTs with their
`
`sources connected to the second data line (e.g. D1’) among the pair. Gate lines G1,
`
`G2, and G3 are connected to gate drivers. One gate line provides the gate signals
`
`for each TFT of the pixels in a given row. For example, a first gate line G1 is
`
`3
`
`
`
`
`connected to the gates of each pixel TFT in the first row, while a second gate line
`
`G2 is connected to the gates of each pixel TFT in the second row, and so on.
`
`According to independent claims 1 and 2 of the ‘550 patent, the gate lines
`
`are connected to “gate drivers,” the data lines are connected to “source drivers,”
`
`and “the first data lines and the second data lines of each group of data lines are
`
`connected with the same source driver.” See, e.g., ‘550 patent at 19:63-65; 20:24-
`
`26. Claim 2, also an independent claim, includes those features and further requires
`
`that “each source driver is installed on the same side of the display panel.” Id. at
`
`20:26-27.
`
`As shown above in Fig. 4B, the single pair of data lines D1, D1’ providing the
`
`driving signals for the first column of pixels are arranged on opposite sides of the
`
`pixels in the first column. A similar arrangement is shown in Fig. 4C, where a
`
`pixel is arranged between the pair of data lines. This arrangement is described in
`
`the specification as providing “a space … between the neighboring data lines” to
`
`avoid the risk of short-circuiting, and does not appear in Petitioner’s prior art. See
`
`‘550 patent at 8:34-36. Claims 1 and 2 both require that the data lines are
`
`“insulated” from each other. Gate lines are also “insulated” from each other. Id. at
`
`19:44-45; 19:51-52; 20:5-6; 20:12-13.
`
`
`
`
`
`4
`
`
`
`
`b. The Independent Claims at Issue
`
`
`
`Petitioner challenges the validity of claims 1-5 of the ‘550 patent, of which
`
`claims 1-2 are independent. According to its preamble, claim 1 is directed to a
`
`“liquid crystal display driving device of matrix structure type.” Claim 1 is
`
`presented below:
`
`1. A liquid crystal display driving device of matrix structure
`type including:
`a group of thin film transistors with matrix array consisting of
`N rows and M columns of thin film transistors, wherein each thin film
`transistor can drive one pixel so that N×M of pixels can be driven;
`
`a group of N gate lines connected to the gate drivers and
`insulated with each other, wherein the first gate line is connected with
`the gates of all the thin film transistors of the first row, the second
`gate line is connected with the gates of all the thin film transistors of
`the second row . . . and the Nthgate line is connected with the gates of
`all the thin film transistors of the Nthrow; and
`
`M groups of data lines connected to the source drivers and
`insulated with each other, wherein the first and the second date lines
`of the first group of date lines are respectively connected with the
`sources of all the thin film transistors of the odd and the even rows of
`the first column, the first and the second data lines of the second
`group of data lines are respectively connected with the sources of all
`the thin film transistors of the odd and the even rows of the second
`column . . . and the first and the second data lines of the Mth group of
`
`5
`
`
`
`
`data lines are respectively connected with the sources of the all thin
`film transistors of the odd and the even rows of the Mth column, and
`the first data lines and the second data lines of each group of data lines
`are connected with the same source driver.
`
`
`Claim 2 differs slightly from claim 1. Below is the final element of claim 2
`
`(reciting “M groups of data lines ….”) with changes underlined and crossed out
`
`relative to claim 1:
`
`M groups of data lines connected to the source drivers and insulated
`with each other, wherein the first and the second date lines of the first
`group of date lines are respectively connected with the sources of all
`the thin film transistors of the odd and the even rows of the first
`column, the first and the second data lines of the second group of data
`lines are respectively connected with the sources of all the thin film
`transistors of the odd and the even rows of the second column . . . and
`the first and the second data lines of the Mth group of data lines are
`respectively connected with the sources of the all thin film transistors
`of the odd and the even rows of the Mth column, wherein and the first
`data lines and the second data lines of each group of data lines are
`connected with the same source driver, each source driver is installed
`on the same side of the display panel and the data transfer is switched
`by an electronic switch.
`
`
`
`
`6
`
`
`
`
`c. Petitioner’s Grounds of Challenge
`
`
`
`The asserted grounds identified in the Petition rely upon four prior art
`
`references and the background of the ‘550 patent (referred to by Petitioner as
`
`“Admitted Prior Art” or “APA”), and presents six combinations thereof. Petitioner
`
`did not submit and does not rely upon any expert declaration in support of the
`
`grounds of rejection presented in its Petition.
`
`The purported grounds of rejection are as follows:
`
`Ground
`
`Basis
`
`Reference
`
`1
`
`2
`
`3
`
`Obviousness
`
`U.S. Patent No. 6,081,250 to Shimada et al. (Ex.
`
`against claims 1-
`
`1002) (“Shimada”) + U.S. Patent No. 6,300,927 to
`
`5
`
`Kubota et al (Ex. 1004) (“Kubota”)
`
`Obviousness
`
`Shimada + Background of the ‘550 patent
`
`against claims 1-
`
`(referred to by Petitioner as “Admitted Prior Art”;
`
`3
`
`referred to herein as “APA”)
`
`Obviousness
`
`International Publication No. WO 02/075708 to
`
`against claims 1-
`
`Janssen et al. (Ex. 1003) (“Janssen”) + Kubota
`
`5
`
`7
`
`
`
`
`4
`
`5
`
`6
`
`Obviousness
`
`Janssen + APA
`
`against claims 1-
`
`3
`
`Obviousness
`
`Shimada + APA + U.S. Patent No. 6,157,056 to
`
`against claim 3
`
`Takeuchi et al. (Ex. 1005) (“Takeuchi”)
`
`Obviousness
`
`Janssen + APA + Takeuchi
`
`against claim 3
`
`
`
`Throughout this Preliminary Response, for ease of understanding, Patent
`
`Owner will refer to these prior art references by the names indicated above, rather
`
`than by exhibit number. These prior art references are described below at Section
`
`IV, in conjunction with the arguments presented in this Preliminary Response.2
`
`
`
`
`
`
`2 Patent Owner reserves its right to present further argument and evidence related to
`
`these prior art references and the content of the Petition and supporting Exhibits if
`
`Inter Partes review is instituted, consistent with the Board’s Rules and practice.
`
`No waiver is intended by any argument withheld by Patent Owner at this stage of
`
`the proceeding.
`
`8
`
`
`
`
`III. Claim Construction
`
`
`
`The standard for construing claim terms in this proceeding is not in dispute.
`
`Since the ‘550 patent is not expired, the Board will interpret claims using the
`
`broadest reasonable interpretation as understood by one of ordinary skill in the art
`
`and consistent with the disclosure. See Office Patent Trial Practice Guide, 77 Fed.
`
`Reg. 48756, 48766 (Aug. 14, 2012); 37 CFR § 42.100(b). Under the broadest
`
`reasonable construction standard, claim terms are given their ordinary and
`
`customary meaning, as would be understood by one of ordinary skill in the art at
`
`the time of the invention. In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed.
`
`Cir. 2007). “Absent claim language carrying a narrow meaning, the PTO should
`
`only limit the claim based on the specification . . . when [it] expressly disclaim[s]
`
`the broader definition.” In re Bigio, 381 F.3d 1320, 1325 (Fed Cir. 2004). Further,
`
`“[a]lthough an inventor is indeed free to define the specific terms used to describe
`
`his or her invention, this must be done with reasonable clarity, deliberateness, and
`
`precision.” In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994). The Board will not
`
`read a particular embodiment appearing in the written description into the claim, if
`
`the claim language is broader than the embodiment. In re Van Geuns, 988 F.2d
`
`1181, 1184 (Fed. Cir. 1993).
`
`To simplify this Preliminary Response only, and without waiving its right to
`
`identify terms for construction, or present constructions or further evidence in
`
`9
`
`
`
`
`support of its constructions in its Response (should one be necessary), at this time
`
`Patent Owner Surpass will apply Petitioner’s proposed constructions for the three
`
`terms identified in the Petition: “liquid crystal display driving device,” “the first
`
`and the second date lines of the first group of date lines,” and “insulated with each
`
`other.”3
`
`IV. Argument
`
`
`
`The institution of an inter partes review requires Petitioner to establish that
`
`there is a “reasonable likelihood that the petitioner would prevail with respect to at
`
`least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a). This requires
`
`an element-by-element analysis of the claims at issue, and proper support for any
`
`obviousness combinations presented by Petitioner. None of Petitioner’s challenges
`
`meet this threshold, and the Board should deny the Petition and decline to institute
`
`the inter partes review.
`
`a. Discussion of Shimada (Ex. 1002)
`
`
`
`Petitioner’s grounds of challenge 1, 2, and 5 are based on the same primary
`
`reference, Shimada, which fails to disclose all features relied upon by Petitioner.
`
`
`3 Patent Owner, like Petitioner, notes that the standards of construction applied in
`
`this proceeding are different from the standards applied in the related litigation.
`
`10
`
`
`
`
`Shimada discloses a pixel arrangement whereby a column of pixels is driven by
`
`two source bus lines 102a and 102b that are not insulated from each other but
`
`instead are commonly connected to a video data line 112. Shimada at Fig. 4; 4:41-
`
`46. The source bus lines for each column of pixels is connected to the same driving
`
`circuit 113. Id. Further, each gate line X1, X2, X3, and X4 is connected to a common
`
`gate driving circuit 109. Id. Fig. 4 is shown below:
`
`
`
`
`
`
`
`11
`
`
`
`
`b. Shimada Fails to Disclose All Relied‐Upon Features of the
`Challenged Claims
`
`
`
`Petitioner concedes that Shimada fails to disclose “gate drivers” and “source
`
`drivers” as recited in independent claims 1 and 2. Pet. at 30. However, Petitioner
`
`incorrectly relies upon Shimada to disclose certain other features. Specifically, in
`
`Petitioner’s combination of Shimada with APA, and separately in Petitioner’s
`
`combination of Shimada with Kubota, Petitioner argues that Shimada discloses that
`
`first and second data bus lines 102a and 102b are “insulated from each other” as
`
`required by both independent claims 1-2, and by dependent claims 3-5 through
`
`incorporation of the base claim features. See Pet. at 33, 35, 37. But elsewhere in
`
`the Petition, Petitioner’s own words and characterizations undermine its
`
`arguments.
`
`In describing Shimada, the Petitioner provides a diagram of Shimada’s Fig.
`
`4, with certain elements annotated for the Board’s easy understanding. This
`
`diagram is presented below:
`
`12
`
`
`
`
`
`
`As shown above, Petitioner characterizes the data bus lines 102a and 102b as
`
`the first and second data lines, including the portions of these lines beginning at
`
`their connection to video signal line 112 and extending all the way down to just
`
`before their respective connections to capacitors C1. Petitioner describes this
`
`arrangement as follows: “Figure 4 shows that the first and the second data bus lines
`
`102a and 102b (the red and green lines) in each group of data bus lines are
`
`connected with the same video signal line 112 in the source driving circuit 108, as
`
`required by all Claims of the ‘550 Patent.” Pet. at 29 (emphasis in original).
`
`13
`
`
`
`
`By Petitioner’s own words and argument, the first and second data bus lines
`
`102a and 102b are commonly connected to the same video line. Therefore, they are
`
`necessarily not insulated from each other. Any signal traveling on video signal line
`
`112 would be transmitted to red and green portions, respectively, constituting first
`
`and second data bus lines 102a and 102b. The independent claims at issue each
`
`recite “M groups of data lines connected to the source drivers and insulated with
`
`each other,” but by Petitioner’s own argument Shimada lacks these features. ‘550
`
`patent at 19:51-52; 20:12-13 (emphasis added).
`
`Moreover, Petitioner identifies what it believes to be the standard of a
`
`“Person of Ordinary Skill in the Art” (“POSITA”) at page 25 of the Petition.4 But
`
`Petitioner offers no expert testimony from a POSITA on why Shimada’s
`
`arrangement of “data lines” commonly connected to video signal line 112 could be
`
`interpreted as “insulated from each other” according to the ‘550 patent claims.
`
`As such, under Petitioner’s own characterizations of this reference,
`
`Shimada’s first and second data bus lines 102a and 102b are not “insulated from
`
`each other” as required by the challenged claims. Further, Petitioner does not rely
`
`upon any of the secondary references to remedy this defect of Shimada.
`
`
`4 Patent Owner reserves the right to challenge this standard presented by Petitioner
`
`in its Response, should one be necessary.
`
`14
`
`
`
`
`Accordingly, Petitioner shows no likelihood of success in its challenges based on
`
`Shimada, and all of these challenges necessarily fail.
`
`c. No Basis Exists to Modify Shimada’s Source and Gate Driving
`Circuits
`
`
`
`In addition to Shimada’s failure to disclose all relied-upon elements of
`
`claims 1-2, the Petitioner also provides no basis to modify Shimada in the manner
`
`proposed.
`
`The Petitioner acknowledges that Shimada fails to disclose “multiple,
`
`individual gate drivers and source drivers housed within” the “Gate Driving
`
`Circuit” 109 and “Driving Circuit” 108 and therefore cannot reach all the features
`
`of the ‘550 patent’s claims 1-5 on its own. Pet. at 30. Petitioner therefore seeks to
`
`modify Shimada’s “Gate Driving Circuit” 109 and “Driving Circuit” 108
`
`separately according to the teachings of Kubota (Ground 1) and APA (Ground 2).
`
`Id.
`
`
`
`Shimada plus Kubota
`
`Kubota discloses a structure in which “a single-crystal silicon driver circuit
`
`IC chip 303 is mounted by COG (chip-on-glass) techniques (FIG. 3(b)).” The
`
`arrangement of driver circuit IC chips 303 is shown in Kubota’s Fig. 3(b) below:
`
`15
`
`
`
`
`
`
`Notably, however, Kubota discourages this arrangement due to reliability
`
`problems. Kubota at 1:45. These reliability problems occur, according to Kubota,
`
`“because the scanning and signal line driver circuits are connected with the
`
`scanning lines and the signal lines, respectively, of the active matrix circuit by
`
`TAB or wire bonding.” Id. at 1:45-49. As a result, Kubota seeks to solve these
`
`problems by using a single signal line driver circuit 101. See Kubota at Fig. 1;
`
`4:17. Kubota’s Fig. 1 with the single signal line driver circuit 101 is shown below:
`
`16
`
`
`
`
`
`
`Petitioner makes no mention to the Board of Kubota’s teaching away from
`
`this arrangement of driver circuit IC chips 303 in favor of a single driver circuit
`
`101 structure that matches Shimada’s own single driving circuit 108 structure.
`
`Compare Shimada at Fig. 4 with Kubota at Fig. 1.
`
`Instead, relying on KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007),
`
`Petitioner argues that using “gate and source drivers in Kubota to deliver signals
`
`through the gate lines and data lines predictably (and unremarkably) enables the
`
`LCD panels taught in Shimada to process and display image data.” Pet. at 31. But
`
`the Petition fails to provide any factual basis to substantiate its allegation of
`
`predictable and unremarkable behavior. Moreover, the Petition argues that a
`
`“person of ordinary skill in the art would have understood that the use of multiple
`
`gate and source drivers in an LCD device was an available design option in view of
`
`17
`
`
`
`
`Kubota.” Id. Again, the Petition is not supported by expert testimony, and lacks
`
`any factual or evidentiary basis for the assertion that the arrangement and number
`
`of drivers is a “design choice.” Absent such evidence from a POSITA, Petitioner’s
`
`statements about “design choice” and predictable and unremarkable behavior
`
`amount to nothing more than attorney argument. Specifically, these statements fail
`
`to “disclose the underlying facts or data” on which they are based and should be
`
`given “little or no weight.” 37 C.F.R. § 42.65(a). Indeed, the Board has held in
`
`prior cases that conclusory statements, such as those presented by Petitioner here,
`
`warrant little weight even when presented by an expert. See Corning Incorporated
`
`v. DSM IP Assets B.V., IPR 2013-00048, paper 94 at 33 (PTAB 5/9/2014) (Final
`
`Written Decision by APJ Kamholz, for a panel consisting of APJs McKelvey,
`
`Obermann, Bisk, Kamholz, and Yang) (concluding that an expert’s verbatim
`
`repeating of attorney argument warrants “little weight in the absence of objective,
`
`evidentiary support.”). In the present case, the attorney argument does not even
`
`come with an expert’s endorsement. Petitioner’s unsupported attorney argument
`
`therefore runs afoul of 37 C.F.R. § 42.104(b)(5) (requiring petitioners to identify
`
`“[t]he exhibit number of the supporting evidence relied upon to support the
`
`challenge and the relevance of the evidence to the challenge raised, including
`
`identifying specific portions of the evidence that support the challenge.”). The
`
`remedy for such violation is that the “Board may exclude or give no weight to the
`
`18
`
`
`
`
`evidence where a party has failed to state its relevance or to identify specific
`
`portions of the evidence that support the challenge.” 37 C.F.R. § 42.104(b)(5).
`
`Finally, Petitioner’s unsupported attorney argument is matched against
`
`Kubota’s own teaching away from the driver circuit IC chips 303 shown in Fig.
`
`3(b). Specifically, Kubota teaches away from the arrangement of driver circuit IC
`
`chips 303 in favor of a driving circuit arrangement that aligns with Shimada’s
`
`arrangement. On this record, Petitioner has provided no explanation, reasoning, or
`
`evidence why a POSITA would have been motivated to substitute out Shimada’s
`
`“Gate Driving Circuit” 109 and “Driving Circuit” 108, which are already providing
`
`the functions of driving the gate lines and data lines, in favor of the driver circuit
`
`IC chips 303 that present, according to Kubota, reliability problems.
`
`Thus, Petitioner’s purported combination of Shimada and Kubota relies
`
`upon unsupported attorney argument and fails to consider Kubota’s own teaching
`
`away from such a combination. In view of these shortcomings and the specific
`
`shortcomings of Shimada alone, the Board should reject Petitioner’s challenge
`
`based on Shimada and Kubota.
`
`Shimada plus APA
`
`
`
`Petitioner’s attempt to modify Shimada with APA is equally deficient. Like
`
`the discussion of Shimada and Kubota, this new combination again lacks the
`
`19
`
`
`
`
`necessary evidentiary basis. Petitioner contends that substituting out Shimada’s
`
`“Gate Driving Circuit” 109 and “Driving Circuit” 108 with the multiple gate
`
`drivers and multiple source drivers of APA “does no more than yield predictable
`
`results.” Pet. at 40 (citing to KSR, 550 U.S. at 416). But once again Petitioner
`
`provides no evidence to substantiate its allegation of predictable results in violation
`
`of 37 C.F.R. § 42.104(b)(5). Also lacking is any evidence in support of Shimada’s
`
`compatibility with the driver arrangement of APA. Finally, the Petitioner alleges
`
`that a POSITA would have looked to Kubota, but this would have included a
`
`POSTIA’s consideration of all of Kubota’s teachings. As such, Kubota’s teaching
`
`away from individual driver circuits cannot be ignored in the evaluation of
`
`Petitioner’s attempt to combine Shimada and APA. Once again, Petitioner has
`
`provided no explanation, reasoning, or evidence why a POSITA would have been
`
`motivated to substitute out Shimada’s “Gate Driving Circuit” 109 and “Driving
`
`Circuit” 108, which are already providing the functions of driving the gate lines
`
`and data lines, and to use instead the APA individual drivers that present,
`
`according to Kubota, reliability problems.
`
`Thus, Petitioner’s purported combination of Shimada and APA also relies
`
`upon unsupported attorney argument and fails to consider Kubota’s teaching away
`
`from using individual driver circuits. In view of these shortcomings and the
`
`20
`
`
`
`
`specific shortcomings of Shimada alone, the Board should reject Petitioner’s
`
`challenge based on Shimada and APA.
`
`d. Discussion of Janssen (Ex. 1003)
`
`
`
`Following the pattern of challenges 1, 2, and 5, the Petitioner’s remaining
`
`grounds of challenge 3, 4, and 6 are based on a common primary reference,
`
`Janssen. Janssen discloses a “column driving circuit and method for driving pixels
`
`in a column row matrix.” Janssen, Abstract.
`
`In Janssen, digital signals 62, 64, and 66 are sent to digital-to-analog
`
`converters (DACs) 68, 70, and 72. The converted analog signals are then sent to
`
`multiplexing circuits 74, 76, and 78, which each send the signals to one of two
`
`column lines. See Janssen at Fig. 3; 6:4-16. In Janssen’s Fig. 3, the drawing relied
`
`upon by Petitioner, Janssen also shows that data lines 80A and 80B are not
`
`insulated from each other but rather commonly connected to the third row pixel at
`
`junction 94G. Further, Janssen does not expressly disclose or suggest a gate driver
`
`of any type, although Janssen discusses that row lines 86, 88, 90, and 92 would be
`
`“refreshed.” Id. at 6:12-15. Janssen’s Fig. 3 is shown below, along with an
`
`enlarged image of junction 94G:
`
`
`
`21
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`As Petitioner concedes, Janssen does not disclose its field of technology and
`
`fails to disclose whether it is intended for or even compatible with an LCD device.
`
`See, e.g., Pet. at 49. Further, a simple search by Patent Owner revealed other
`
`display structures similar to Janssen that are not active matrix LCD devices. Patent
`
`Owner’s Exhibit 2001 shows an “X-ray flat panel detector” that, like Janssen,
`
`includes a multiplexer 22 at top, and pixel elements. Compare Ex. 2001 at Fig. 1
`
`with Janssen at Fig. 3. Exhibit 2002 is an “electrophoretic device,” i.e. e-ink, and
`
`22
`
`
`
`
`also shares common pixel elements with Janssen’s unidentified display device.
`
`Compare Ex. 2002 at Figs. 1-4 with Janssen at Fig. 3. Thus, since Janssen may be
`
`directed to a technology other than active matrix LCD, there is no evidence to
`
`justify Petitioner’s combination of Janssen’s structure with the other prior art of
`
`record directed to active matrix LCDs.
`
`e. Janssen Fails to Disclose All Relied‐Upon Elements of the
`Challenged Claims
`
`
`
`In arguing obviousness based on Janssen plus one of Kubota and APA, the
`
`Petitioner concedes that Janssen fails to disclose “gate drivers.” Pet. at 44.
`
`Petitioner then incorrectly relies upon Janssen to disclose other features.
`
`Specifically, in each of these alleged grounds of rejection, Petitioner argues that
`
`Janssen discloses “data lines 80A-B, 82A-B, 84A-B are all spaced apart from and
`
`parallel to each other (i.e., insulated from each other).” Pet. at 42. Petitioner fails to
`
`note, however, that data lines 80A-B are not insulated from each, as required in
`
`claims 1 and 2. To the contrary, as shown in Janssen’s Fig. 3 (which is reproduced
`
`at p. 42 of the Petition), the line running from the data lines 80A and 80B to pixel
`
`94G’s transistor is connected to both data lines 80A and 80B in row three. This
`
`same arrangement is shown in Janssen’s Fig. 7, and Petitioner has not explained
`
`this deficiency. Thus, it is improper for Petitioner to characterize these data lines as
`
`“insulated from each other” since they are actually connected. As such, Janssen’s
`
`23
`
`
`
`
`first and second data lines 80A and 80B are not “insulated from each other” as
`
`required by the challenged claims. For