`
`iii")
`
`12
`
`Precessor
`
`16
`
`Device
`
`Contrafier
`
`N
`
`.
`
`1 <3
`
`flash
`
`
`(cg, rotating media ~—
`magnefic or optical)
`
`EVELC
`
`FREE 1
`
`
`
`GRTD60—34138
`
`2i5
`
`
`LOGICAL
`PHYSECAL
`
`
`
`ADDRESS RANGE
`ADDRESS RANGE
`
`
`
`
`
`
`MLC/Block O
`
`MLC/ Block 1
`
`
`
`Failed Data
`
`integrity Test
`
`
`
`
`MLC / Block N
`
`MLC/ Block 4
`
`LOGiCAL
`ADDRESS RANGE
`
`PHYSICAL
`ADDRESS RANGE
`
`MLC/Bfiiock 0
`
`MLC / Blcck 1
`
`Remapping ta SIC
`flash module
`
`I mmmmmmmmmmmm mmmmmmmmmmmmmm
`
`SLC/Block D E
`
`FIG. 2A
`
`FIG. 28
`
`
`
`GRTD60—34138
`
`3!?)
`
`100
`
`Read data quantum
`from DRAM into memory
`0f device eentreller
`
`
`/10§3
`
`controller
`
`Read legieai address
`range and NAND flash
`physical address range
`to which data quantum I
`is 120 be written into
`
`I
`
`memory of device
`
`
`
`
`
`Combine cements of
`NAND flash memory
`.
`
`with data quantum ”be be
`
`written
`
`Erase NAND flash
`
`
`
`physical address range
`
`
`
`
`Write eembined data to
`
`appropriate. NAND flash
`
`
`physical range
`
`
`
`Read NAND Flash
`
`physical address range
`inte device contraiier
`
`memory
`
`
`194
`
`105
`
`108
`
`110
`
`1 12
`
`ENG, 3A
`
`
`
`GRTD60—34138
`
`4i5
`
`
`
`114-
`
`Cempare Data. Written to
`NAND FLASH Physical
`Address Range to Data Read
`from NAND FLASH Physical
`Address Range
`
`129
`
`1 22
`
`.
`
`quantum of
`available SLC
`
`
`Identify next
`
`
`Available?
`
`
`
`
`
`
`
`Remap NAND flash
`physical range to
`next available SLC
`NAND flash
`
`126
`
`
`
`~ 116
`
`1 18
`
`
`
`System / 124
`Failure
`
`FEE}. SB}
`
`
`
`GRTD60—34138
`
`5i5
`
`5;?“
`
`‘
`603
`
`62a
`
`56
`
`54, /
`
`
`
`Interfacs
`
`PEG. 4
`
`60b
`
`62b
`
`58
`
`52;
`
`