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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 1 of 15
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`UNITED STATES DISTRICT COURT
`WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`
`
`Advanced Silicon Technologies LLC,
`
`
`Plaintiff,
`
`v.
`
`NXP Semiconductors N.V.,
`NXP B.V., and
`NXP USA, Inc.,
`
`
`Defendants.
`
`
`
`Case No. 6:22-cv-00466-ADA-DTG
`
`
`
`
`Jury Trial Demanded
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`AST's Sur-Reply Claim Construction Brief
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 2 of 15
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`Table of Contents
`
`Table of Authorities ........................................................................................................................ ii
`
`1.
`
`2.
`
`Introduction ......................................................................................................................... 1
`
`NXP's Reply Cites No Disavowals of Claim Scope or Compelling Evidence
`to Define the Disputed Terms Other than According
`to Their Plain and Ordinary Meaning ................................................................................. 1
`
`2.1.
`
`2.2.
`
`2.3.
`
`2.4.
`
`"A method for reducing power consumption for a video decoder comprising"
`('435 Patent, Claim 26) ........................................................................................... 1
`
`"graphics pipeline" ('945 Patent, Claims 1, 4, 12, 21) ........................................... 2
`
`"graphics pipelines operative to process data in a dedicated tile"
`('945 Patent, Claims 1, 21) ...................................................................................... 5
`
`"a memory controller . . . operative to transfer pixel data between each of
`a first pipeline and a second pipeline [the two graphics pipelines]
`and a memory shared among the at least two graphics pipelines"
`('945 Patent, Claims 1-4, 17-20) ............................................................................. 6
`
`2.5.
`
`"NxM number of pixels" ('945 Patent, Claim 21) ................................................... 8
`
`3.
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`Conclusion ........................................................................................................................ 10
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`
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`
`
`—i—
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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 3 of 15
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`Table of Authorities
`
`Cases
`Catalina Mktg. Int'l v. Coolsavings.com, Inc.,
`289 F.3d 801 (Fed. Cir. 2002) ..................................................................................................... 2
`Cochlear Bone Anchored Sols. AB v. Oticon Med.,
`958 F.3d 1348 (Fed. Cir. 2020) ................................................................................................... 1
`Cont'l Circuits LLC v. Intel Corp.,
`915 F.3d 788 (Fed. Cir. 2019) ..................................................................................................... 3
`Droplets, Inc. v. YAHOO! Inc.,
`No. 12-cv-03733-JST,
`2021 U.S. Dist. LEXIS 259660 (N.D. Cal. July 2, 2021) ........................................................... 9
`Genuine Enabling Tech. LLC v. Nintendo Co.,
`29 F.4th 1365 (Fed. Cir. 2022) .................................................................................................... 9
`Hill-Rom Servs. v. Stryker Corp.,
`755 F.3d 1367 (Fed. Cir. 2014) ................................................................................................... 4
`In re Lee,
`277 F.3d 1338 (Fed. Cir. 2002) ................................................................................................... 3
`Infinity Comput. Prods. v. Oki Data Ams., Inc.,
`987 F.3d 1053 (Fed. Cir. 2021) ................................................................................................... 8
`Micron Tech., Inc. v. North Star Innovations, Inc.,
`855 F. App'x 679 (Fed. Cir. 2021) .............................................................................................. 3
`Sipco LLC v. Toro Co.,
`No. 08-0505,
`2009 U.S. Dist. LEXIS 10312 (E.D. Pa. Feb. 10, 2009) ............................................................. 4
`
`
`
`
`
`
`
`
`
`—ii—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 4 of 15
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`1.
`
`Introduction
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`NXP's Reply (ECF No. 56) reads as if NXP need only identify a single embodiment or a
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`theoretical interpretation of the claim language to support its narrowing constructions. The Court,
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`of course, requires more, which NXP does not supply. Evidence to justify NXP's extremist
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`proposals simply does not exist, and it certainly does not exist in the record. For this reason, NXP's
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`Reply focuses instead on "gotcha" attempts that misinterpret or simply miss AST's reasons why
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`each disputed term has and should be afforded its plain meaning.
`
`2.
`
`
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`NXP's Reply Cites No Disavowals of Claim Scope or Compelling Evidence to Define
`the Disputed Terms Other than According to Their Plain and Ordinary Meaning
`
`2.1.
`
`"A method for reducing power consumption for a video decoder comprising"
`('435 Patent, Claim 26)
`
`Term
`
`Claim(s) AST's Proposal NXP's Proposal
`
`"A method for reducing power consumption
`for a video decoder comprising"
`
`NXP's Reply misinterprets yet mocks AST's brief (ECF No. 50) as "paradoxical" while
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`'435 Patent,
`Claim 26
`
`Non-limiting
`
`Limiting
`
`offering no reason for the Court to depart from the "general rule" that "preamble language is not
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`treated as limiting." E.g., Cochlear Bone Anchored Sols. AB v. Oticon Med., 958 F.3d 1348, 1354
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`(Fed. Cir. 2020) (internal cites omitted). NXP questions how AST could say the preamble
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`describes the benefit of the claim—"reducing power consumption for a video decoder"—while
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`arguing against NXP's narrowing construction that reads out any functionality that at any time
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`increases power consumption for a video decoder. AST gave the answer: the claim improves the
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`"reactive" prior art techniques for conserving power with a "proactive" method that dynamically
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`adjusts power consumption based on the detected input stream. '435 Patent at 1:45-48, 2:43-45.
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`This "proactive" approach "reduc[es] power consumption" overall by adjusting power
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`levels dynamically instead of only in response to significant discharge. Claim 26's method steps
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`—1—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 5 of 15
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`confirm this understanding. They describe "varying power consumption of at least one operational
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`portion of a video decoder" in response to "determining input stream encoding description data."
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`They also describe exactly what NXP's construction would read out: "if more than one input stream
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`is received . . . increasing the power consumption of at least one operational portion of a video
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`decoder." Claim 26 teaches this method to "select one of a plurality of different power consumption
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`states for a video decoder" to reduce overall power consumption, including "varying" and
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`"increasing" power as needed. NXP's argument that the plain meaning conflicts with the preamble
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`assumes what it sets out to prove—that the preamble means "reducing" power every time the
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`method is performed, not "reducing" overall power consumption by performing the method instead
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`of prior art techniques. The claim language confirms NXP's presumption is wrong.
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`The preamble to Claim 26 of the '435 Patent is not limiting because it does not "recite[]
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`essential structure or steps" and is not "necessary to give life, meaning, and vitality" to the claim.
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`E.g., Catalina Mktg. Int'l v. Coolsavings.com, Inc., 289 F.3d 801, 808 (Fed. Cir. 2002).
`
`2.2.
`
`"graphics pipeline"
`('945 Patent, Claims 1, 4, 12, 21)
`
`Term
`
`Claims
`
`AST's Proposal
`
`NXP's Proposal
`
`'945 Patent,
`Claims 1, 4, 12, 21
`
`"graphics
`pipeline"
`
`NXP presents no evidence that a POSITA would understand "graphics pipeline" to include
`
`Plain and ordinary
`meaning
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`"hardware, which may be one or more
`circuits, that processes graphics data"1
`
`only hardware. NXP instead interprets exemplary embodiments in the specification to include
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`hardware components. See ECF No. 49 at 6. NXP's briefs cite no disavowal of claim scope or
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`limiting language that would restrict the plain meaning of "graphics pipeline" to purely hardware
`
`
`1 NXP withdrew its "that processes graphics data" limitation, now asking the Court to construe
`"graphics pipeline" as "hardware, which may be one or more circuits." ECF No. 56 at 4 n.4.
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`—2—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 6 of 15
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`embodiments and thus exclude software. Instead, NXP's Reply confirms it argues only that
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`exemplary embodiments reference a "circuit" including "circuitry." ECF No. 56 at 4. Such a
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`reference does not amount to disavowal. See, e.g., Cont'l Circuits LLC v. Intel Corp., 915 F.3d
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`788, 797 (Fed. Cir. 2019) ("To disavow claim scope, the specification must contain expressions of
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`manifest exclusion or restriction, representing a clear disavowal of claim scope."). Nor does NXP
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`show that the patentee acted as its own lexicographer to exclude embodiments that include
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`software operating on hardware. See id. at 796 ("To act as its own lexicographer, a patentee must
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`clearly set forth a definition of the disputed claim term other than its plain and ordinary meaning.").
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`And NXP offers no evidence that the "very character of the invention requires" a graphics pipeline
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`to include only hardware. Micron Tech., Inc. v. North Star Innovations, Inc., 855 F. App'x 679,
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`684 (Fed. Cir. 2021). As AST has explained, the terms "circuit" and "circuitry" do not even exclude
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`processors that implement software instructions. See ECF No. 50-2, ¶¶ 17–22; see also ECF No.
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`49-3 at 5 (defining pipeline to include "processors"). NXP's Reply does not deny this.
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`NXP ostensibly disputes AST's argument and Professor Hart's expert opinion that a
`
`POSITA would understand this term to include hardware implementing software instructions, but
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`provides no contrary evidence. NXP acknowledges that both applicant and Examiner understood
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`the plain meaning of this term and the claim scope to include software. Unable to argue otherwise,
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`NXP wrongly claims this understanding does not matter. See In re Lee, 277 F.3d 1338, 1345 (Fed.
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`Cir. 2002) (noting patent examiners presumptively act from the viewpoint of a POSITA). NXP
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`also does not dispute that a memory controller—claimed as part of the "graphics pipeline"—is
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`known to include hardware and software. See ECF No. 50 at 8. Nor does NXP dispute AST's
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`explanation that the operations performed by a graphics pipeline reflect the operations a POSITA
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`—3—
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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 7 of 15
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`would expect software to perform. See id. All the Court has to support NXP's proposed narrowing
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`construction is NXP's disputed reading of an exemplary embodiment.
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`NXP focuses on Figure 2 of the '945 Patent and disputes AST's reference to it as one of
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`many examples in the intrinsic record of graphics pipelines including software. But AST pointed
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`to the specification's description surrounding Figure 2 that graphics pipelines "may" be integrated
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`with a host processor. '945 Patent at 3:59-64. The patentee added that the host processor "may" be
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`a graphics application. Id. at 3:65-67. AST never argued that Figure 2 explicitly shows such an
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`embodiment, as NXP's strawman suggests. The term "may" indicates an optional configuration,
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`and Figure 2 does not claim to (and could not) show every possible embodiment of the disclosed
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`system. See id. at 3:44-47 ("FIG. 2 is a schematic block diagram of an exemplary graphics
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`processing system 30 employing an example of a multi-pipeline graphics processing circuit 34
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`according to one embodiment of the present invention." (emphasis added)). The specification
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`contemplates integrating the graphics processing circuit into a host processor that may be software,
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`meaning—consistent with the claim's plain meaning and Dr. Hart's unrebutted opinion—the
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`graphics pipelines may also be software. Cf. Sipco LLC v. Toro Co., No. 08-0505, 2009 U.S. Dist.
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`LEXIS 10312, at *36–37 (E.D. Pa. Feb. 10, 2009) (explaining that "integrated" means "to form,
`
`unify or combine with another to form a whole"). Even crediting NXP's reading of Figure 2, this
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`does not compel a narrowing construction. See Hill-Rom Servs. v. Stryker Corp., 755 F.3d 1367,
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`1374 (Fed. Cir. 2014) ("The absence of an embodiment teaching a wireless receiver does not
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`prevent the claimed datalink from being given its plan and ordinary meaning at the relevant time.").
`
`NXP acknowledges as much when arguing the related "graphics pipelines operative to
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`process data in a dedicated tile" term, referencing "a particular pipeline/processor processing
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`pixels." ECF No. 56 at 5 (emphasis added). NXP's statement here accords with the plain and
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`—4—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 8 of 15
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`ordinary meaning of "graphics pipelines" as including both hardware and software instructions
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`executed by hardware. The Court should afford this term its plain and ordinary meaning.
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`2.3.
`
`"graphics pipelines operative to process data in a dedicated tile"
`('945 Patent, Claims 1, 21)
`
`Term
`
`Claims
`
`AST's Proposal
`
`NXP's Proposal
`
`"graphics pipeline
`operative to process
`data in a dedicated tile"
`
`NXP's Reply focuses on contriving a "gotcha" between the briefing here and a 2016
`
`"graphics pipeline operative such that
`data for a specific tile is processed by
`one and only one pipeline"
`
`'945 Patent,
`Claims 1, 21
`
`Plain and ordinary
`meaning
`
`preliminary filing in an un-instituted PTAB challenge. But the opening salvo of this effort—a
`
`claim that "AST argues, without citation to the specification"—is false. NXP also neglects to make
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`a cogent argument for its proposed "one and only one pipeline" narrowing construction. The fact
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`raised in AST's response brief remains true: this kind of extremist language in the claim
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`construction process usually serves ulterior motives and does not fairly reflect the claim scope.
`
`An unflinching limitation to "one and only one" here reads out certain exceptions to the
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`general data process flow described in the claim. While the claimed graphics pipeline is "operative
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`to process data in a dedicated tile," the patent discloses times when each graphics pipeline may use
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`data related to other tiles to generate pixels for their assigned tile. For instance, AST's Response
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`pointed to Figure 3 on the page NXP's Reply says contains no such reference. Figure 3 shows a
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`time when pixel data for a primitive—which the specification describes as one example of
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`"graphics data 31"— overlaps several tiles 72-75:
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`—5—
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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 9 of 15
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`'945 Patent at Fig. 3, 3:57-59. The specification thus confirms the plain and ordinary meaning and
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`dooms NXP's proposed narrowing construction.
`
`NXP then returns to attorney argument in a 2016 POPR but ignores the argument in AST's
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`Response that the POPR accords with the plain meaning because the argument there "properly
`
`focused on the pixels over the pipelines and allows some data to be used by different pipelines."
`
`ECF No. 50 at 11. NXP does not even argue the POPR effects a disclaimer. Again, NXP prioritizes
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`"gotcha" value over argument and evidence to its detriment. The Court is left with no evidence to
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`impose additional limitations, meaning the term should be afforded its plain and ordinary meaning.
`
`2.4.
`
`"a memory controller . . . operative to transfer pixel data between each of a
`first pipeline and a second pipeline [the two graphics pipelines] and a
`memory shared among the at least two graphics pipelines"
`('945 Patent, Claims 1-4, 17-20)
`
`Term
`
`Claims
`
`AST's
`Proposal
`
`NXP's Proposal
`
`"a memory controller . . .
`operative to transfer pixel data
`between each of a first pipeline '945 Patent,
`
`and a second pipeline [the two
`Claims 1-4,
`graphics pipelines] and a
`17-20
`memory shared among the at
`least two graphics pipelines"
`
`
`Plain and
`ordinary
`meaning
`
`"a memory controller . . . operative to
`transfer pixel data to, from, and
`between (1) the first graphics pipeline
`and the second graphics pipeline, and
`also (2) the two graphics pipelines
`and a memory shared among the two
`graphics pipelines"
`
`—6—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 10 of 15
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`NXP's reply brief curiously—and perhaps tellingly—first calls out a scrivener's error in
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`AST's responsive brief that used "or" instead of "and," all while ignoring the argument in that
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`sentence that the plain meaning of this term "means 'between both X and Z and Y and Z'" and that
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`"NXP's construction injects a third requirement—between X and Y—that neither the plain
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`language nor the specification supports." Compare ECF No. 56 at 5–6, with ECF No. 50 at 12.
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`This dispute does not hinge on "and" versus "or." It hinges on whether NXP can override this
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`known formulation of relationships between components to read in a textually missing
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`requirement.
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`Here too NXP ignores the logical argument and evidence AST presents, favoring the
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`panache of ostensible inconsistency between said logical argument and evidence versus an old
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`POPR. If the Court does not accord this term its plain meaning under the "each of pipeline 1 and
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`a memory and pipeline 2 and a memory" formulation NXP rejects, the patentee's use of "each of"
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`loses meaning. NXP ignores AST's discussion of how the prosecution history shows neither
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`patentee nor examiner interpreted the claim scope as requiring transfers between pipelines. See
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`ECF No. 50 at 15–16. NXP cites AST's infringement contentions, which merely recite the claim
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`language in the cited portions and thus do not bear one way or the other on this dispute. NXP's
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`only response to AST's argument about the claim's use of "between" rather than "among" appears
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`in a footnote and unconvincingly references the Chicago Manual of Style. But AST's point—again
`
`unrebutted—is that this diction in the context of the full claim set confirms the plain meaning
`
`because the patentee did use "among" instead of "between" elsewhere in claims 1 and 21, such as
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`"a memory shared among the at least two graphics pipelines." ECF No. 50 at 17–18. NXP's
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`narrowing construction would strip away this meaning and context from the claim.
`
`—7—
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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 11 of 15
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`NXP ignores the specification entirely. NXP ignores that the '945 Patent repeatedly
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`discloses examples of transferring data from the pipelines to the memory. It is not even clear
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`whether NXP claims the '945 Patent discloses transferring data from a first pipeline to a second
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`pipeline. NXP's briefs fell conspicuously silent on this issue. NXP says instead that it believes the
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`claims are invalid for lack of written description under its proposed construction.2
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`NXP's fixation with the 2016 POPR matters little because of the arguments it ignores. AST
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`did, indeed, say "the IPR statements do not matter." But not in a vacuum, as NXP suggests.
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`Compare ECF No. 50 at 17 ("There is no such lack of clarity here, so the IPR statements do not
`
`matter."), with ECF No. 56 at 7 ("AST ignores the IPRs entirely and argues that 'the IPR statements
`
`do not matter.'"). AST's underlying argument goes unrebutted: the ambiguity in the file history
`
`NXP aims to conjure from the sole POPR only suggests a narrowing construction if the claim
`
`language and specification also lack clarity. ECF No. 50 at 17 (citing Infinity Comput. Prods. v.
`
`Oki Data Ams., Inc., 987 F.3d 1053, 1059 (Fed. Cir. 2021)). Because the claim language follows
`
`a known formulation and has a well understood plain meaning based on the full claim and the
`
`prosecution history, the Court should not order a narrowing construction.
`
`2.5.
`
`"NxM number of pixels"
`('945 Patent, Claim 21)
`
`Term
`Claim(s)
`"NxM number of pixels" '945 Patent,
`Claim 21
`
`
`AST's Proposal
`
`NXP's Proposal
`
`Plain and ordinary meaning
`
`"rectangular block of
`pixels that is not square"
`
`
`2 In a footnote, NXP digresses to discuss indefiniteness instead of confronting its argument that
`the claims would be invalid for lack of written description under its construction. ECF No. 56 at
`7 n.3. Of course, NXP's written description position is fatal to its claim construction position. A
`narrowing construction that would render the claims invalid is improper. See ECF No. 50 at 15.
`
`—8—
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`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 12 of 15
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`AST's responsive brief described "NxM" as akin to "length times width"—two variables—
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`rather than variables requiring separate integers. See generally ECF No. 50 at 17–18. NXP does
`
`not grapple with this commonsense formulation. Nor does NXP contend with its admission that
`
`the plain and ordinary meaning "encompasses a two-dimensional array of pixels having a square
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`shape (NxN)." Id. (quoting ECF No. 49 at 13). The only question here is whether prosecution
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`history disclaimer applies from an argument made by the applicant but rejected by the examiner
`
`and never raised again. It cannot. "For a statement during prosecution to qualify as a disavowal of
`
`claim scope, it must be so clear as to show reasonable clarity and deliberateness and so
`
`unmistakable as to be unambiguous evidence of disclaimer." E.g., Genuine Enabling Tech. LLC v.
`
`Nintendo Co., 29 F.4th 1365, 1374 (Fed. Cir. 2022), quoted in ECF No. 50 at 18. AST's responsive
`
`brief pointed out that NXP cites no case finding prosecution history disclaimer based on a single
`
`unsuccessful argument by an applicant. That remains the case with briefing now complete
`
`notwithstanding NXP's deep reach to nitpick some details at the margins of the Ecolab case cited
`
`in AST's responsive brief. The Examiner made a clear statement in response to the applicant's
`
`single argument that "N can be equal to M." ECF No. 49-8 at 3. And NXP does not address AST's
`
`cited caselaw that "rejected arguments do not implicate the policies served by prosecution
`
`disclaimer: they pose no risk that claims will be construed one way to obtain allowance and another
`
`for purposes of infringement, and the PTO's rejection defeats any reasonable reliance on the
`
`statements by competitors." Droplets, Inc. v. YAHOO! Inc., No. 12-cv-03733-JST, 2021 U.S. Dist.
`
`LEXIS 259660, at *24 (N.D. Cal. July 2, 2021), quoted in ECF No. 50 at 20.
`
`To conclude, NXP incorrectly claims that a claim construction brief filed by AST in a
`
`previous International Trade Commission proceeding supported NXP's position here. ECF No. 56
`
`at 9 ("AST's filings in the later ITC Action confirm its continued understanding that 'NxM number
`
`—9—
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`

`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 13 of 15
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`of pixels' refers to a non-square arrangement"). Not so. NXP conflates AST's position with the ITC
`
`Staff's position. AST proposed plain and ordinary meaning at the ITC. The Staff did too, which
`
`AST supported. But the Staff added an example AST did not adopt, which interpreted N and M as
`
`separate integers contrary to the Examiner's statement during prosecution:
`
`
`
`See ECF No. 56-4 at 49–50. NXP does not dispute that the Staff's given example strays from the
`
`plain and ordinary meaning. ECF No. 49 at 13 (acknowledging that the plain and ordinary meaning
`
`"encompasses a two-dimensional array of pixels having a square shape (NxN)"). NXP also does
`
`not dispute AST's argument that ITC briefing does not comprise part of the file history and cannot
`
`support disclaimer, which is NXP's sole supporting evidence. ECF No. 50 at 20.
`
`3.
`
`Conclusion
`
`AST asks that the Court construe each term according to its plain and ordinary meaning.
`
`
`
`
`
`—10—
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`

`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 14 of 15
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`
`
`Dated: January 23, 2023
`
`
`
`
`
`
`
`Respectfully submitted,
`
`By: /s/ Patrick A. Fitch
`
`
`
`
`Brian A. Carpenter (State Bar No. 3840600)
`
`
`carpenter@caglaw.com
`
`Carstens, Allen & Gourley, LLP
`
`1105 Wooded Acres, Suite 415
` Waco, Texas 76701
`
`(254) 294-1854 (Telephone)
`
`
`
`Robert R. Brunelli (admitted pro hac vice)
`
`
`rbrunelli@sheridanross.com
`
`Patrick A. Fitch (admitted pro hac vice)
`
` pfitch@sheridanross.com
`
`Alex W. Ruge (admitted pro hac vice)
`
`
`aruge@sheridanross.com
`
`Brian Boerman (admitted pro hac vice)
`
` bboerman@sheridanross.com
`
`Sheridan Ross P.C.
`
`1560 Broadway, Suite 1200
`
`Denver, Colorado 80202
`
`(303) 863-9700 (Telephone)
`
`(303) 863-0223 (Facsimile)
`
`litigation@sheridanross.com
`
`Attorneys for Plaintiff
`Advanced Silicon Technologies LLC
`
`—11—
`
`

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`Case 6:22-cv-00466-ADA-DTG Document 58 Filed 01/23/23 Page 15 of 15
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`CERTIFICATE OF SERVICE
`
`I hereby certify that on January 23, 2023, I electronically filed the foregoing with the Clerk
`
`of Court using the CM/ECF system which will send notification of such filing to all counsel of
`
`record in the above-referenced matter.
`
`
`
`
`
`
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`
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`/s/ Thomas J. Armento
` Thomas J. Armento
` Paralegal
`
`tarmento@sheridanross.com
` Sheridan Ross P.C.
` 1560 Broadway, Suite 1200
` Denver, Colorado 80202
` Telephone: (303) 863-9700
` Facsimile:
`(303) 863-0223
` Email: litigation@sheridanross.com
`
`
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`—12—
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