Case 6:22-cv-00466-ADA-DTG Document 50-7 Filed 12/19/22 Page 1 of 3
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
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`Case. No. 6:22-CV-0466-ADA-DTG
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`ADVANCED SILICON
`TECHNOLOGIES LLC,
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`Plaintiff,
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`v.
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`NXP SEMICONDUCTORS N.V.,
`NXP B.V., and
`NXP USA, INC.,
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`Defendants.
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`DEFENDANT NXP USA, INC’S PRELIMINARY INVALIDITY CONTENTIONS
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`Ex. 7, p. 1
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`Case 6:22-cv-00466-ADA-DTG Document 50-7 Filed 12/19/22 Page 2 of 3
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`TABLE OF CONTENTS
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`I.
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`II.
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`A.
`B.
`C.
`D.
`E.
`F.
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`A.
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`B.
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`C.
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`III.
`IV.
`V.
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`A.
`B.
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`1.
`2.
`3.
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`INTRODUCTION .............................................................................................................. 1
`Asserted Claims ............................................................................................................ 1
`Ongoing Discovery and Disclosures ............................................................................. 1
`Claim Construction ....................................................................................................... 3
`Effective Date ............................................................................................................... 4
`Prior Art Identification and Citation ............................................................................. 4
`Additional Reservation of Rights.................................................................................. 7
`PRIOR ART DISCLOSURES AND CONTENTIONS ..................................................... 7
`Identification of Items of Prior Art That Anticipate or Render Obvious Asserted
`Claims ........................................................................................................................... 8
`Prior Art Patents and Published Patent Applications .................................................... 8
`Prior Art Non-Patent Publications .............................................................................. 15
`Prior Art Devices ........................................................................................................ 17
`Obviousness Combinations and Motivations.............................................................. 23
`Technical incentives and market forces drove similar solutions in the prior art. ....... 25
`1.
`2. Motivations to Combine ............................................................................................. 30
`3.
`Additional References ................................................................................................. 47
`Charts Identifying Where in Each Item of Prior Art Each Element of the Asserted
`Claim Is Found ............................................................................................................ 47
`INVALIDITY UNDER 35 U.S.C. § 112 .......................................................................... 47
`PATENT INELIGIBLE SUBJECT MATTER UNDER 35 U.S.C. § 101 ....................... 53
`PRODUCTIONS............................................................................................................... 54
`Prior Art Production .................................................................................................... 54
`Technical Document Production................................................................................. 54
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`- ii -
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`Ex. 7, p. 2
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`Case 6:22-cv-00466-ADA-DTG Document 50-7 Filed 12/19/22 Page 3 of 3
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`“invention” as set forth in the specifications of the Asserted Patents (and any specification
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`allegedly incorporated by reference).
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`Additionally, the Asserted Claims fail the enablement, written description, and/or
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`definiteness requirements in view of at least the following claim terms and phrases:
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`Asserted Claim(s)
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`Claim Term/Phrase
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`’945 Patent, Claims 1,
`21
`
`’945 Patent, Claim 4
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`“a memory controller on the chip in
`communication with the at least two
`graphics pipelines, operative
`to
`transfer pixel data between each of a
`first pipeline and a second pipeline
`and a memory shared among the at
`least two graphics pipelines”
`
`“a memory controller on the chip,
`coupled to the at least two graphics
`pipelines on the chip and operative to
`transfer pixel data between each of
`the two graphics pipelines and a
`memory shared among the at least
`two graphics pipelines”
`“front end circuitry”
`
`’945 Patent, Claim 4
`
`“back end circuitry”
`
`’435 Patent, Claim 1
`
`“a power management controller
`operatively couplable to a video
`decoder that decodes at least one
`encoded digital input stream and in
`response
`to a determination of
`encoding description data
`that
`describes a scheme used to encode
`the
`input stream, varies power
`consumption of
`at
`least one
`operational portion of the video
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`- 51 -
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`Invalidity Under 35 U.S.C.
`§ 112
`The claims are invalid under 35
`U.S.C. § 112, ¶ 2 because the claim
`limitation fails to inform, with
`reasonable certainty, those skilled
`in the art about the scope of the
`invention.
`
`The claims are invalid under pre-
`AIA 35 U.S.C. § 112, ¶ 1 because
`the specification fails to describe or
`enable the full breadth of the claims.
`
`The claim limitation invokes 35
`U.S.C. § 112 ¶ 6 and is invalid for
`failure to disclose adequate
`corresponding structure linked to
`the recited claim functionality
`The claim limitation invokes 35
`U.S.C. § 112 ¶ 6 and is invalid for
`failure to disclose adequate
`corresponding structure linked to
`the recited claim functionality
`The claims are invalid under 35
`U.S.C. § 112, ¶ 2 because the claim
`limitation fails to inform, with
`reasonable certainty, those skilled
`in the art about the scope of the
`invention.
`
`The claims are invalid under pre-
`AIA 35 U.S.C. § 112, ¶ 1 because
`the specification fails to describe or
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`Ex. 7, p. 3
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