`
`
`
`
`Exhibit 11
`
`
`
`
`
`
`
`
`
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 2 of 14
`
`(12) United States Patent
`Hirose
`
`USOO64.856O2B2
`(10) Patent No.:
`US 6,485,602 B2
`(45) Date of Patent:
`Nov. 26, 2002
`
`(54) PLASMA PROCESSINGAPPARATUS
`(75) Inventor: Eiji Hirose, Nirasaki (JP)
`(73) Assignee: Tokyo Electron Limited, Tokyo (JP)
`(*) Notice:
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(21) Appl. No.: 09/906,731
`(22) Filed:
`Jul. 18, 2001
`(65)
`Prior Publication Data
`US 2002/0007915 A1 Jan. 24, 2002
`Foreign Application Priority Data
`(30)
`Jul. 19, 2000
`(JP) ....................................... 2000-219783
`(51) Int. Cl. ................................................ H01L 21/00
`(52) U.S. Cl. ............................ 156/345.44; 156/345.47;
`118/723 E
`(58) Field of Search ....................... 156/345.44, 345.43,
`156/345.47; 118/723 E; 204/298.08, 298.34
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`5,900,103 A * 5/1999 Tomoyasu et al. ....... 118/723 E
`
`
`
`FOREIGN PATENT DOCUMENTS
`
`JP
`
`2001-7086
`
`1/2001
`
`* cited by examiner
`
`Primary Examiner. Thi Dang
`(74) Attorney, Agent, or Firm-Oblon, Spivak, McClelland,
`Maier & Neustadt, P.C.
`(57)
`ABSTRACT
`The present invention concerns a plasma processing appa
`ratus for processing a processing object by applying two
`types of high-frequency power with different frequencies to
`generate plasma. A first high-frequency line is provided with
`a first filter circuit for attenuating a high-frequency current
`from a Second high-frequency power Supply. A Second
`high-frequency line is provided with a Second filter circuit
`for attenuating a high-frequency current from a first high
`frequency power Supply. The first filter circuit is provided
`with a variable capacitor for changing a circuit constant. For
`changing the circuit constant, the variable capacitor is varied
`So that a resonance point becomes greater than an optimum
`resonance point most attenuating a high frequency in the
`Second high-frequency power Supply. Doing So decreases a
`Sputter rate of the generated plasma affected on a wall
`Surface of the processing chamber.
`
`7 Claims, 7 Drawing Sheets
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 1 of 7
`
`US 6,485,602 B2
`
`20b
`
`20a
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 3 of 14
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 2 of 7
`
`US 6,485,602 B2
`
`Voltage
`
`Voltage
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 4 of 14
`
`F. G. 2
`
`Time
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 3 of 7
`
`US 6,485,602 B2
`
`Maximum Average
`C4F8/Ari02. 773
`722
`Ar/02
`: 520
`501
`200
`1000
`800
`600
`
`-0-CAF8/Ar/02
`-o-Ar/02
`
`O
`
`10
`
`20
`
`30
`
`Maximum AVerace
`C4F8/Ar/O2 782
`.
`: 378
`360
`1200A02
`1000
`
`
`
`40
`
`50
`Distance
`-0-CAF8/Ar/02
`-o-Ar/02
`
`O
`
`10
`
`20
`
`30
`
`40
`
`50
`Distance
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 5 of 14
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 4 of 7
`
`US 6,485,602 B2
`
`
`
`Z
`
`Optimum
`resonance;
`point
`
`ReSOnance
`point
`
`O 34
`
`40
`
`\ First matching
`CUrCUlt
`
`37
`
`36
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 6 of 14
`
`38
`Second matching-39
`CUrCUlt
`
`F. G.7
`
`35
`O
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 5 of 7
`
`US 6,485,602 B2
`
`50
`
`O-14
`First matching - 17
`CUrCUlt
`
`16
`
`51b
`
`51a
`
`
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 7 of 14
`
`18
`Second matching - 19
`CUPCUlt
`
`O-15
`
`F. G. 8
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 6 of 7
`
`US 6,485,602 B2
`
`60
`
`3
`
`40
`
`First matchin
`\ CUrCuit
`9 N-37
`
`O
`
`W
`
`42
`
`42a
`
`41
`
`fire4 36
`E.
`
`31
`
`-H 33
`
`38
`
`SeCOnd matchin
`CUrcuit
`9 N-39
`
`5signer
`
`3
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 8 of 14
`
`F. G. 9
`
`
`
`U.S. Patent
`
`Nov. 26, 2002
`
`Sheet 7 of 7
`
`US 6,485,602 B2
`
`6a
`First filter
`CUrCuit
`
`6b
`Second filter
`CUrCUlt
`
`O-3a
`
`First matching
`CUrCUlt
`
`5a
`
`4a
`
`2a
`
`W CC
`2b
`
`40
`
`SeCOnd matchin
`
`5b
`
`O-3b
`
`F. G. 10 PRIOR ART
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 9 of 14
`
`
`
`1
`PLASMA PROCESSINGAPPARATUS
`
`US 6,485,602 B2
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`This application is based upon and claims the benefit of
`priority from the prior Japanese Patent Application No.
`2000-219783, filed Jul. 19, 2000, the entire contents of
`which are incorporated herein by reference.
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`The present invention relates to a plasma processing
`apparatus capable of Suppressing a damage due to Sputtering
`to a wall Surface of a processing chamber during plasma
`OCCCCC.
`2. Description of the Related Art
`Conventionally, there are two types of plasma processing
`apparatuses. One type generates plasma by applying high
`frequency power with a single type of frequency. The other
`type generates plasma by applying high-frequency power
`with two types of frequency. Especially, the latter type of
`plasma processing apparatus is configured to generate high
`density plasma using high-frequency power with a high
`frequency, and generate a bias potential using high
`frequency power with a low frequency. In recent years, there
`is often used a plasma processing apparatus which alternates
`the two types of frequencies according to necessity.
`AS shown in FIG. 10, this plasma processing apparatus
`comprises upper and lower electrodes 2a and 2b, and first
`and Second high-frequency power Supplies 3a and 3b. The
`upper and lower electrodes 2a and 2b are arranged parallel
`facing each other in a processing chamber 1. The first and
`Second high-frequency power Supplies 3a and 3b Supply
`these upper and lower electrodes 2a and 2b with first and
`Second high-frequency powers having different frequencies.
`A matching circuit 5a is provided in the middle of a first
`power Supply line 4a connecting the first high-frequency
`power 3a and the upper electrode 2a. A matching circuit 5b
`is provided on a Second power Supply line 4b connecting the
`Second high-frequency power 3b and the lower electrode 2b.
`Further, the first power Supply line 4a connects with a first
`filter circuit 6a as a return circuit. This filter circuit 6a has
`a fixed circuit constant and attenuates a Second high
`frequency component. The Second power Supply line 4b
`connects with a Second filter circuit 6b as a return circuit.
`This filter circuit 6b has a fixed circuit constant and attenu
`ates a first high-frequency component. In the first and Second
`filter circuits 6a and 6b, each circuit constant is Set to a value
`resonating with a high frequency to be filtered.
`When plasma processing is applied to a processing object
`Such as a Semiconductor wafer, the processing object is
`mounted on the lower electrode 2b, for example. The first
`and Second high-frequency power Supplies 3a and 3b Supply
`corresponding high-frequency powers to the upper and
`lower electrodes 2a and 2b, respectively, to generate plasma
`P therebetween. Further, a bias voltage is applied to the
`lower electrode 2b to perform Specified plasma processing
`for the semiconductor wafer on the lower electrode 2b.
`The plasma processing apparatus attenuates high
`frequency power with a different frequency on the first and
`Second power Supply lines 4a and 4b. The first and Second
`high-frequency power Supplies 3a and 3b Supply respective
`high-frequency powers to the upper and lower electrodes 2a
`and 2b under an optimum condition.
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 10 of 14
`
`2
`In this technology, however, a potential difference occurs
`between the plasma potential and the wall Surface of the
`processing chamber 1. Sputtering due to an ion component
`in the plasma erodes the wall Surface. Simultaneously apply
`ing two types of high-frequency power decreases an effec
`tive ground area for one electrode compared to the case
`where a Single frequency is applied. A Sputter rate increases
`for the decreased ground area, causing more damages of the
`wall Surface. This has been a cause of the Shortening of the
`processing chamber life (usable period).
`The problem of shortening the processing chamber life
`becomes more Serious when the processing object Such as a
`Semiconductor wafer has an increased area, throughput is
`increased, or the high-frequency power is increased to
`further increase the Sputter rate, and the like.
`Conventionally, countermeasures have been taken to Sup
`preSS damages to the wall Surface. For example, the pro
`cessing chamber is enlarged to increase the ground area and
`decrease the Sputter rate. Alternatively, a resin coating is
`applied to the wall Surface to prevent wear to the wall
`Surface. In any case, Substantial countermeasures is
`unavailable, causing a problem of increasing costs for addi
`tional processing.
`BRIEF SUMMARY OF THE INVENTION
`It is an object of the present invention to provide a plasma
`processing apparatus capable of decreasing a Sputter rate
`damaging a processing chamber wall Surface during plasma
`generation and extending the uSable life of the processing
`chamber.
`In order to achieve the above-mentioned objects, a plasma
`processing apparatus according to the present invention for
`applying a Specified plasma processing to a processing
`object comprises first and Second electrodes arranged in
`parallel in a processing chamber So that they face to each
`other; a first high-frequency power Supply for applying a
`first high-frequency power to the first and Second electrodes
`via a first power Supply line; a Second high-frequency power
`Supply for applying a Second high-frequency power to the
`Second electrode Via a Second power Supply line; a first filter
`circuit for attenuating the Second high-frequency power
`flowing through the first power Supply line; and a Second
`filter circuit for attenuating the first high-frequency power
`flowing through the Second power Supply line, wherein the
`first filter circuit includes a variable capacitor for varying a
`circuit constant in order to increase a resonance point from
`an optimum resonance point most attenuating the Second
`high-frequency power and for decreasing a Sputter rate for a
`wall Surface of the processing chamber during plasma
`OCCCCC.
`Additional objects and advantages of the invention will be
`set forth in the description which follows, and in part will be
`obvious from the description, or may be learned by practice
`of the invention. The objects and advantages of the invention
`may be realized and obtained by means of the instrumen
`talities and combinations particularly pointed out hereinaf
`ter.
`
`1O
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`BRIEF DESCRIPTION OF THE SEVERAL
`VIEWS OF THE DRAWING
`The accompanying drawings, which are incorporated in
`and constitute a part of the Specification, illustrate presently
`embodiments of the invention, and together with the general
`description given above and the detailed description of the
`embodiments given below, Serve to explain the principles of
`the invention.
`
`
`
`3
`FIG. 1 is a configuration chart showing a first embodiment
`of a plasma processing apparatus according to the present
`invention;
`FIG. 2 shows a Voltage characteristic from a Second
`high-frequency power Supply on a power Supply line a when
`a first filter circuit shown in FIG. 1 is omitted;
`FIG. 3 shows a voltage characteristic from the second
`high-frequency power Supply on the power Supply line a
`when a capacitor capacity of the first filter circuit in FIG. 1
`is set to 2,500 pF;
`FIG. 4 shows a voltage characteristic from the second
`high-frequency power Supply on the power Supply line a
`when a capacitor capacity of the first filter circuit in FIG. 1
`is set to 2,000 pF;
`FIG. 5A shows the relationship between a sputter rate for
`the processing chamber wall Surface and a capacitor capac
`ity for the filter circuit when the capacitor capacity is 2,500
`pF;
`FIG. 5B shows the relationship between a sputter rate for
`the processing chamber wall Surface and a capacitor capac
`ity for the filter circuit when the capacitor capacity is 2,200
`pF;
`FIG. 6 shows a decrease in the Sputter rate;
`FIG. 7 is a configuration chart showing a Second embodi
`ment of the plasma processing apparatus according to the
`present invention;
`FIG. 8 is a configuration chart showing a third embodi
`ment of the plasma processing apparatus according to the
`present invention;
`FIG. 9 is a configuration chart showing a fourth embodi
`ment of the plasma processing apparatus according to the
`present invention; and
`FIG. 10 is a configuration chart exemplifying a conven
`tional plasma processing apparatus.
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`Embodiments of the present invention will be described in
`further detail with reference to the accompanying drawings.
`The following describes the first embodiment of the
`present invention with reference to FIGS. 1 to 6.
`FIG. 1 Schematically shows a plasma processing appara
`tus 10 for etching as the first embodiment. This plasma
`processing apparatus 10 includes a processing chamber
`(processing area) 11 formed of a conductive material Such as
`aluminum. In this processing chamber 11, an upper electrode
`12 and a lower electrode 13 are arranged in parallel with a
`Specified interval So that they face each other. The upper
`electrode 12 is connected to a first high-frequency power
`Supply 14 via a first power Supply line 16 and a first
`matching circuit 17. The lower electrode 13 is connected to
`a Second high-frequency power Supply 15 via a Second
`matching circuit 19. This lower electrode 13 also functions
`as a chuck top for mounting a processing object Such as a
`Semiconductor wafer, for example.
`The first high-frequency power Supply 14 applies, Say,
`60-MHz high-frequency power to the upper electrode 12.
`Plasma P is generated in an atmosphere of proceSS gas
`Supplied between the upper electrode 12 and the lower
`electrode 13.
`The Second high-frequency power Supply 15 applies
`2-MHz high-frequency power to the lower electrode 13 to
`generate a bias potential corresponding to the plasma poten
`tial. An ion component in the plasma is introduced to the
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 11 of 14
`
`US 6,485,602 B2
`
`4
`Surface of a Semiconductor wafer W for performing, say,
`reactive ion etching (RIE).
`Since the first matching circuit 17 is provided, it is
`possible to Supply the maximum power to the upper elec
`trode 12 from the first high-frequency power Supply 14.
`Since the second matching circuit 19 is provided, it is
`possible to Supply the maximum power to the lower elec
`trode 13 from the second high-frequency power Supply 15.
`The first power supply line 16 is provided with a first filter
`circuit 20. The second power Supply line 18 is provided with
`a second filter circuit 21. The first filter circuit 20 includes
`an LC Series resonant circuit with varying the circuit con
`Stant. The LC Series resonant circuit Selectively filters a
`high-frequency current output from the Second high
`frequency power Supply 15 for preventing the current from
`reaching the first high-frequency power Supply 14. The
`Second filter circuit 21 includes an LC Series resonant circuit
`with a fixed circuit constant. This LC Series resonant circuit
`prevents a high-frequency current from the first high
`frequency power Supply 14 from reaching the Second high
`frequency power Supply 15.
`The circuit constant for the first filter circuit 20 is changed
`by using a variable capacitor 20a and changing the capaci
`tance. The Sputter rate according to the plasma P is
`decreased by changing the capacity of the variable capacitor
`20a.
`In the plasma processing apparatus according to the
`present invention, the first filter circuit 20 is not limited to
`the function as a return circuit. Since the circuit constant is
`variable, the first filter circuit also allows the capacitor
`capacitance to be varied in accordance with the Sputter rate,
`varying with the plasma potential and decreasing the Sputter
`rate to Such a degree that the product throughput is only
`Slightly affected. Since the Sputter rate can be decreased, it
`is possible to Suppress damage to the wall Surface of the
`processing chamber 11 and extend the processing chamber
`life (usable period).
`The following describes how to set the circuit constant of
`the first filter circuit 20. First, the optimum resonance point
`is to be found.
`The first high-frequency power supply 14 (60 MHz) and
`the second high-frequency power supply 15 (2 MHz) apply
`high-frequency power to the upper electrode 12 and the
`lower electrode 13, respectively. The capacitor capacity of
`the first filter circuit 20 is varied by measuring a voltage
`waveform, Say, at point A on the first power Supply line 16.
`When a coil 20b of the first filter circuit 20 is set to an
`inductance of 2.5 uH, for example, the capacitor capacity
`resonant with the 2-MHZ high frequency is up to approxi
`mately 2,500 pF. When two frequencies (60 MHz and 2
`MHz) are applied, the capacitor capacitance is divided into
`three types, namely, no filter circuit provided, the capacitor
`capacity Set to 2,500 pF, and the capacitor capacity Set to
`2,000 pF. The voltage waveform in each case is measured at
`point A on the first power Supply line 16. AS measurement
`results, FIG. 2 shows a voltage characteristic with no filter
`circuit provided. FIG. 3 shows a voltage characteristic with
`the capacitor capacity set to 2,500 pF. FIG. 4 shows a
`Voltage characteristic with the capacitor capacity Set to 2,000
`pF.
`AS clearly Seen in these figures, when the coil inductance
`L is fixed to 2.5 liH, the capacitor capacity is 2,500 pF,
`allowing the Voltage waveform to most optimally resonate
`with the Sine wave. When the capacitor capacity is Set to
`2,000 pF, the sine wave is slightly deformed in comparison
`with that of 2,500 pF.
`
`5
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`
`
`S
`Accordingly, when the first filter circuit 20 is used only as
`a return circuit, Setting the capacitor capacity to 2,500 pF
`provides an optimum resonance point. According to this
`embodiment, however, the first filter circuit 20 is requested
`to have the function of decreasing the Sputter rate in addition
`to the function as a return circuit.
`For this purpose, the above-mentioned optimum reso
`nance point just needs to be shifted So that frequency f=%7t
`V(LC) becomes large, where C is capacitance and L is
`inductance (coil).
`Specifically, the relationship between the Sputter rate and
`the capacitor capacity is examined. For this purpose, the
`plasma processing apparatus is operated under the following
`conditions. Given that the coil inductance is fixed to 2.5 uH
`and the capacitor capacity is set to 2,500 pF in the first filter
`circuit 20, the Sputter rate is measured under the following
`proceSS conditions 1 and 2. The measurement results in the
`relation shown in FIG. 5A. Likewise, when the capacitor
`capacity is Set to 2,000 pF, measuring the Sputter rate results
`in the relationship shown in FIG. 5B.
`1. Process condition for CF/Ar/O gas
`Wafer: 300 mm
`Film to be etched: Silicon oxide film
`Processing: Contact
`Power applied to the upper electrode: Frequency=60
`MHz, Power=3,300 W
`Power applied to the lower electrode: High frequency=2
`MHz, Power=3,800 W
`Gap between electrodes: 35 mm
`Process pressure: 20 mTorr
`Process gas: CF=20 sccm
`Ar=400 Scom
`O=15 sccm
`2. ProceSS condition for Ar/O gas
`Film to be etched: Silicon oxide film
`Processing: Contact
`Power applied to the upper electrode: Frequency=60
`MHz, Power=3,300 W
`Power applied to the lower electrode: High frequency=2
`MHz, Power=3,800 W
`Gap between electrodes: 35 mm
`Process pressure: 20 mTorr
`Process gas: Ar=400 sccm
`O=400 sccm
`According to the results in FIGS. 5A and 5B, it is clear
`that the filter circuit set at 2.5 uH and 2,000 pF greatly
`decreases the Sputter rate for the Ar/O gas compared to the
`filter circuit set at 2.5 uH and 2,500 pF. Further, it is clear
`that the CF/Ar/O gas causes little change in the Sputter
`rate for both filter circuits. Basically, the CF/Ar/O gas is
`a chemical Sputter involving a chemical reaction. The Ar/O
`gas is physical Sputter. This means that the plasma potential
`varies with the circuit constants.
`Accordingly, it is found that the filter circuit with 2.5 uH
`and 2,000 pF is Superior to the optimally resonant filter
`circuit with 2.5 uH and 2,500 pF, which decreases the Sputter
`rate. Actually, however, the former is slightly inferior to the
`latter with respect to the resonance phenomenon.
`According to this embodiment as mentioned above, the
`first high-frequency line 16 is provided with the first filter
`circuit 20 for attenuating a high-frequency current from the
`Second high-frequency power Supply 15. The Second high
`frequency line 18 is provided with the second filter circuit 21
`
`5
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`US 6,485,602 B2
`
`6
`for attenuating a high-frequency current from the first high
`frequency power Supply 14. The variable capacitor 20a is
`provided as means for changing the circuit constant of the
`first filter circuit 20.
`When the first filter circuit 20 optimally resonates with a
`high frequency of the first high-frequency power Supply 14,
`the filter circuit may not provide a circuit constant for
`increasing the Sputter rate on the wall Surface of the pro
`cessing chamber 11. In this case, the variable capacitor 20a
`of the first filter circuit 20 is adjusted to have a capacitor
`capacity So that the resonance point becomes lower than the
`optimum resonance point. This can decrease the Sputter rate
`on the wall Surface of the processing chamber 11, Suppress
`damage thereto, and extend the uSable life of the processing
`chamber 11.
`The first embodiment has been explained as an example
`of the plasma processing apparatus capable of varying the
`circuit constant by providing the variable capacitor 20a in
`the first filter circuit 20 installed on the power supply line 16
`for generating high-density plasma. It is also possible to
`provide a similar effect by replacing the capacitor in the first
`filter circuit 20 with a fixed capacitor and replacing the
`capacitor in the Second filter circuit 21 provided on the
`power Supply line 18 with a variable capacitor.
`FIG. 7 shows a Schematic configuration of a plasma
`processing apparatus according to the Second embodiment.
`A plasma processing apparatus 30 includes a processing
`chamber 31 formed of a conductive material Such as alu
`minum. In this processing chamber 31, an upper electrode
`32 and a lower electrode 33 are arranged in parallel with a
`Specified interval So that they face each other. The upper
`electrode 32 is connected to a first high-frequency power
`supply 34 via a first power supply line 36 and a first
`matching circuit 37. The lower electrode 33 is connected to
`a Second high-frequency power Supply 35 via a Second
`matching circuit 39. This lower electrode 33 also functions
`as a chuck top for mounting a processing object Such as a
`Semiconductor wafer, for example.
`The first high-frequency power Supply 34 applies, Say,
`60-MHz high-frequency power to the upper electrode 32.
`Plasma P is generated in an atmosphere of proceSS gas
`supplied between the upper electrode 32 and the lower
`electrode 33.
`The Second high-frequency power Supply 35 applies
`2-MHz high-frequency power to the lower electrode 33 to
`generate a bias potential corresponding to the plasma poten
`tial. An ion component in the plasma is introduced to the
`Surface of a Semiconductor wafer W for performing, say,
`reactive ion etching (RIE).
`The first power supply line 36 is provided with a third
`filter circuit 40 for attenuating the Second frequency power
`from the Second high-frequency power Supply 35. A first
`filter circuit 42 capable of varying the circuit constants is
`provided between the third filter circuit 40 on the first power
`supply line 36 and the processing chamber 31. The second
`power supply line 38 is provided with a second filter circuit
`41 for attenuating the first high-frequency power. The LC
`Series resonant circuits with fixed circuit constants, respec
`tively.
`The first filter circuit 42 includes a variable capacitor 42a.
`This variable capacitor 42a is used to decrease the Sputter
`rate by slightly adjusting the circuit constants of 2.5 uH and
`2,500 pF for optimum resonance down to the circuit con
`stants of 2.5 uH and 2,000 pF for less effective resonance.
`On the first power supply line 36, the third filter circuit 40
`is exclusively used for attenuating high frequency from the
`second high-frequency power Supply 35. The first filter
`circuit 42 is exclusively used for decreasing the Sputter rate.
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 12 of 14
`
`
`
`7
`Accordingly, this Second embodiment can provide effects
`similar to those for the above-mentioned first embodiment.
`The Second embodiment has been explained as an
`example of the plasma processing apparatus capable of
`varying the circuit constant by providing the variable capaci
`tor 42a in the first filter circuit 42 installed on the power
`Supply line 36 for generating high-density plasma. It is also
`possible to provide a similar effect by Substituting a variable
`capacitor for the capacitor in the Second filter circuit 41
`installed on the power Supply line 38, for generating a bias
`potential.
`FIG. 8 shows a Schematic configuration of a plasma
`processing apparatus according to the third embodiment.
`The mutually corresponding parts in FIGS. 8 and 1 for the
`first embodiment are designated by the same reference
`numerals and a detailed description is omitted for Simplicity.
`This plasma processing apparatus 50 Substitutes a fixed
`capacitor for a variable capacitor (C) in a first filter circuit
`51 connected to the first power supply line 16. The fixed coil
`is replaced by a variable coil for configuring variable
`inductance.
`This is because the Similar effects are available by making
`frequency f greater than the optimum resonance point and
`shifting the resonance point to the negative Side. Instead of
`the capacitor capacity, the inductance is varied So that the
`resonance point becomes greater. Accordingly, it is possible
`to increase the Sputter rate of the plasma P by varying the
`inductance of the variable coil 51b.
`FIG. 9 shows a Schematic configuration of a plasma
`processing apparatus according to the fourth embodiment.
`The mutually corresponding parts in FIGS. 9 and 7 for the
`Second embodiment are designated by the Same reference
`numerals and a detailed description is omitted for Simplicity.
`A plasma processing apparatus 60 according to this
`embodiment is configured to provide a Selection Switch 43
`between the first filter circuit 40 and the third filter circuit 42
`according to the above-mentioned Second embodiment.
`This configuration example makes processing chamber
`protection and throughput Selectable So as to comply with
`the proceSS conditions for various processing objects.
`Namely, a process may have little effect on the processing
`chamber in Such a case that the high-frequency power
`Supply generates little high-frequency power or the proceSS
`ing object is processed in a short time. In this case, the
`plasma processing apparatus Selects the conventional third
`filter circuit 40 with the fixed circuit constant to give
`preference to the productivity for improved throughput. By
`contrast, a process may have a large effect on the processing
`chamber in Such a case that the high-frequency power
`Supply generates a large high-frequency power or the pro
`cessing object is processed in a long time. In this case, the
`plasma processing apparatus Selects the first filter circuit 42
`to give preference to processing chamber protection.
`Always protecting the processing chambers inner wall
`degrades throughput in Some degree. Since the Selection
`Switch is provided, it is possible to determine whether to
`prioritize protection of the processing chambers inner wall
`or improvement of the throughput.
`AS in the third embodiment, the fourth embodiment can
`also provide Similar effects by using the variable coil instead
`of the variable capacitor.
`Each of the above-mentioned embodiments can decrease
`the Sputter rate on the wall Surface of the processing
`chamber, Suppress damage thereto, and extend the uSable
`life of the processing chamber.
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`US 6,485,602 B2
`
`8
`Additional advantages and modifications will readily
`occur to those skilled in the art. Therefore, the invention in
`its broader aspects is not limited to the Specific details and
`representative embodiments shown and described herein.
`Accordingly, various modifications may be made without
`departing from the Spirit or Scope of the general inventive
`concept as defined by the appended claims and their equiva
`lents.
`What is claimed is:
`1. A plasma processing apparatus for applying Specified
`plasma processing to a processing object, comprising:
`first and Second electrodes arranged in parallel in a
`processing chamber,
`a first high-frequency power Supply for applying first
`high-frequency power to Said first electrode Via a first
`power Supply line;
`a Second high-frequency power Supply for applying Sec
`ond high-frequency power to Said Second electrode Via
`a Second power Supply line;
`a first filter circuit for attenuating Said Second high
`frequency power flowing through Said first power Sup
`ply line; and
`a Second filter circuit for attenuating Said first high
`frequency power flowing through Said Second power
`Supply line,
`wherein Said first filter circuit includes a variable capaci
`tor for varying a circuit constant in order to increase a
`resonance point from an optimum resonance point most
`attenuating Said Second high-frequency power and for
`decreasing a Sputter rate for a wall Surface of Said
`processing chamber during plasma occurrence.
`2. The first filter circuit according to claim 1, wherein a
`resonance point most attenuating high-frequency power
`depends on frequency f=%TV(LC) according to a capacitor
`(capacitor capacity C) and a coil (inductance L) constituting
`a filter circuit.
`3. The second filter circuit instead of said first filter circuit
`according to claim 1, wherein there is provided a variable
`capacitor for varying a circuit constant and decreasing a
`Sputter rate for a wall Surface of Said processing chamber
`during plasma occurrence So that a resonance point becomes
`greater than an optimum resonance point most attenuating
`Said first high-frequency power.
`4. Means for varying Said circuit constant according to
`claim 1, wherein a variable coil is provided instead of Said
`variable capacitor to change Said circuit constant by varying
`an inductance.
`5. A plasma processing apparatus for applying Specified
`plasma processing to a processing object, comprising:
`first and Second electrodes arranged in parallel in a
`processing chamber So that they face each other;
`a first high-frequency power Supply for applying first
`high-frequency power to Said first electrode Via a first
`power Supply line;
`a Second high-frequency power Supply for applying Sec
`ond high-frequency power to Said Second electrode Via
`a Second power Supply line;
`a first filter circuit for decreasing a Sputter rate for a wall
`Surface of Said processing chamber during plasma
`occurrence by having a variable capacitor for varying a
`circuit constant So that a resonance point becomes
`greater than an optimum resonance point most attenu
`ating Said Second high-frequency power flowing
`through the first power Supply line;
`
`Case 6:20-cv-00636-ADA Document 48-14 Filed 02/16/21 Page 13 of 14
`
`
`
`US 6,485,602 B2
`
`9
`a Second filter circuit for attenuating Said first high-
`frequency power flowing through Said Second power
`Supply line, and
`a third filter circuit for attenuating a Second high-
`frequency power flowing through said first power Sup- 5
`ply line, wherein said third filter circuit is provided
`adjacent to Said first filter circuit.
`6. The second filter circuit instead of said first filter circuit
`according to claim 5, wherein there is provided a variable
`capacitor for varying a circuit constant and decreasing a 10
`Sputter rate for a wall Surface of Said processing chamber
`during plasma occurrence So that a resonance point becomes
`greater than an optimum resonance