CONTAINS ADVANCED MICRO DEVICES INC CONFIDENTIAL BUSINESS
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`CX1950C
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`UNITED STATES
`
`INTERNATIONAL
`TRADE COMMISSION
`WASHINGTON DC
`Before the Honorable Thomas B Pender
`Administrative Law Judge
`
`In the Matter o
`
`CERTAIN CONSUMER ELECTRONICS
`
`AND DISPLAY DEVICES WITH
`
`Investigation
`No 337 TA 932
`
`GRAPHICS PROCESSING AND GRAPHICS
`
`PROCESSING UNITS THEREIN
`
`CONTAINS ADVANCED MICRO DEVICES INC
`
`CONFIDENTIAL BUSINESS INFORMATION SUBJECT TO
`
`PROTECTIVE ORDER
`VIDEOTAPED DEPOSITION OF
`ANDREW E GRUBER on behalf of Advanced Micro
`Inc and Individually
`Devices
`Tuesday March 17r 20151 914 a
`Robins Kaplan Miller Ciresi LL
`800 Boylston Street
`
`Boston Massachusetts
`
`Reported by
`MICHAEL OCONNOR RPR CRR CBC CCP
`Job No 91486
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`TSC Repotting Worldwide
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`117770290
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`CX1950C
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`UNITED STATES
`
`INTERNATIONAL
`TRADE COMMISSION
`WASHINGTON DC
`Before the Honorable Thomas B Pender
`Administrative Law Judge
`
`In the Matter o
`
`CERTAIN CONSUMER ELECTRONICS
`
`AND DISPLAY DEVICES WITH
`
`Investigation
`No 337 TA 932
`
`GRAPHICS PROCESSING AND GRAPHICS
`
`PROCESSING UNITS THEREIN
`
`CONTAINS ADVANCED MICRO DEVICES INC
`
`CONFIDENTIAL BUSINESS INFORMATION SUBJECT TO
`
`PROTECTIVE ORDER
`VIDEOTAPED DEPOSITION OF
`ANDREW E GRUBER on behalf of Advanced Micro
`Inc and Individually
`Devices
`Tuesday March 17r 20151 914 a
`Robins Kaplan Miller Ciresi LL
`800 Boylston Street
`
`Boston Massachusetts
`
`Reported by
`MICHAEL OCONNOR RPR CRR CBC CCP
`Job No 91486
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`TSC Repotting Worldwide
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`117770290
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`CONTAINS ADVANCED MICRO DEVICES INC CONFIDENTIAL BUSINESS
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`INFOILUATION
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`Tuesday March 17 2015
`914
`
`a
`
`GRUBER
`
`Videotaped Deposition of ANDREW E
`individually and as Corporate Designee
`Inc
`
`on behalf of Advanced Micro Devices
`before Michael D OConnor
`Reporter and Certified Realtime Reporter and
`
`a Registered Professional
`
`Notary Public in the Commonwealth of Massachus
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`APPEARANCES
`
`Page
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`ROBINS KAPLAN MILLER
`CIRESI
`Attorney for Advanced Micro Devices
`800 LaSalle Avenue
`
`Minneapolis Minnesota 55402
`BY AARON FAHRENKROG
`ESQ
`
`AND
`
`STERNE KESSLER GOLDSTEIN
`
`FOX
`
`Attorney for Advanced Micro Devices
`1100 New York Avenue NW
`Washington DC 20005
`BY JONATHAN TUMINARO ESQ
`
`ORRICK HERRINGTON
`
`6 SUTCLIFFE
`
`Attorney for NVIDIA Corporation
`1152 15th Street NW
`Washington DC 20005
`BY CHRISTOPHER HIGGINS ESQ
`I NEEL CHATTERJEE
`ESQ
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`TSGReporting Worldwide W7770295150
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`APPEARANCES
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`on
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`td
`
`KEKER
`
`VAN NEST
`
`Attorney for Qualcomm Incorporated
`
`633 Battery Street
`
`San Francisco California 94111
`EUGENE PAIGE ESQ
`
`BY
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`Also Present
`
`Leann McKeon Videographer
`
`Present via speakerphone
`Daniel Leventhal Esq
`Norton Rose Fulbright US LLP
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`s
`
`ROCEEDINGS
`Gruber Exhibit 1 Document entitled
`Complainant NVIDIA Corporations Notice of
`
`Deposition of Andrew Gruber marked for
`
`identification
`Gruber Exhibit 2 Document entitled
`Application For Issuance of Subpoena Duces
`Tecum
`
`and Subpoena Ad Test ificandum to Advanced Micro
`Inc marked for identification
`
`Devices
`
`VIDEOGRAPHER
`
`This is the start of
`
`tape labeled number one of the videotaped
`
`deposition of Andrew Gruber
`
`in the Matter of
`
`Certain Consumer Electronics and Display Devices
`
`With Graphics Processing and Graphics Processing
`Units Therein Investigation No 337 TA932 in
`
`the United States International Trade Commission
`
`Washington DC before the honorable Thomas B
`ender
`
`This deposition is being held at 800
`
`Boylston Street Boston Massachusetts
`on March
`17 2015 at approximately 914 am My name is
`Im the legal video specialist
`Leann McKeon
`Inc headquartered at 747
`
`from TSG Reporting
`
`Third Avenue
`
`New York New York
`
`The court
`
`TSGReporting Worldwide W7770295150
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`reporter is Michael OConnor
`
`in association with
`
`TSG Reporting Will counsel please introduce
`
`yourselves
`
`MR HIGGINS Chris Higgins from
`
`Orrick Herrington
`
`Sutcliffe on Letlalf of
`
`Complainant NVIDIA Corporation
`
`And with me is
`
`Neel Chatterjee also from Orrick
`MR FAHRENKROG
`
`Aaron Fahrenkrog
`
`from Robins Kaplan LLP on behalf of nonparty
`Inc
`
`Advanced Micro Devices
`MR TUMINARO
`
`Jonathan Tuminaro from
`
`Fox on behalf of
`
`Sterne Kessler Goldstein
`nonparty AND
`MR PAIGE
`
`Eugene Paige of Keker
`
`Van Nest on behalf of Respondent Qualcomm and the
`
`witness in his personal capacity
`ANDREW
`E GRUBE Ri
`called as a witness having been duly
`
`sworn by a Notary Public was examined and
`
`testified as follows
`
`EXAMINATION BY
`
`BY MR HIGGINS
`Q Good morning Mr Gruber
`A Good morning
`You have been handed whats been
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`CONTAINS ADVANCED MICRO DEVICES INC CONFIDENTIAL EU SIN L
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`marked as Exhibits 1 and 2 Exhibi
`Complainant NVIDIA Corporations Notice of
`Deposition of Andrew Gruber Exhibit
`
`1
`
`is
`
`2 is
`
`Application For Issuance of Subpoena Duces
`
`Tecum
`
`Devices
`
`and Subpoena Ad Testificandum to Advanced Micro
`Inc
`Do you see those
`A Yes
`Q Are you here to testify on behalf of
`both the deposition notice and the subpoena
`to
`AMD
`
`A Yes
`Q When was the R400 built
`A The R400 project was remained the
`into the
`and eventually involved
`R500 project
`
`R600 project which was the chip that
`
`finally
`
`made it
`
`to market
`
`The same database also
`
`evolved into the internal code name Xenos chip
`
`which was in the Microsoft Xbox 360 project
`
`That Xbox project shipped in late
`The R600 shipped after that
`
`I believe it
`
`2005
`
`was
`
`in 2007
`Q Was a chip ever built
`solely on the R400 project
`A No
`
`By the time that
`
`that was based
`
`the Xboz
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`shipped there were certain evolution of
`
`the
`
`database
`
`So there were changes
`
`But
`
`the
`
`internals were largely based on the R400
`
`unchanged
`Q was a chip ever built
`solely on the R500 project
`A No
`the R600 project
`from the R500 to the R600
`
`The R500 project evolved into
`
`There were substantial
`
`changes
`
`But still
`
`a lot of
`
`that was based
`
`the engineering in the R400 showed up in the
`
`R600
`
`Q What were the substantial
`from the R500 to the R600
`A The R600 still
`idea as the R500
`
`changes
`
`had the same unified
`
`shader
`
`In the R600 the
`
`Instruction set changed from a pure vector model
`
`what was called a Vec
`
`4 model
`
`into four parallel
`
`scaler instructions
`
`The data flow in the R500 to R600 was
`
`very similar The main change was In the as I
`
`say the instruction set and the approach to
`
`instruction execution
`Q Did the R600 use the same sequencer
`as the R500
`MR PAIGE
`
`Vague and ambiguous
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`A The sequencer between
`the R600 had substantial changes
`
`the R500 and
`
`The R500 team
`
`was primarily from the Marlboro office and that
`
`was the same team that had just continued on as
`
`the R400 changed
`
`into the R500
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`The R600 was more of a combined
`
`effort
`
`in between
`
`the East Coast office and the
`
`West Coast office
`
`So the sequencer aspects
`
`changed substantially between the R500 and the
`
`R600
`
`change
`
`Q Why did the sequencer
`the R500 and the R600
`substantially between
`A
`There were just different people
`working on it
`R600 as in the R500
`
`1 was not
`
`involved as much in the
`
`So 1 cant
`
`talk about
`
`a lot
`
`of
`
`the specific changes
`
`in the sequencer but
`
`1
`
`from the R500 to
`
`do believe there were changes
`the R600
`Q When was the RC0 project started
`A The R400 project started taking shape
`in late 2000
`Thats when the initial
`
`concepts
`
`were kind of
`
`first
`
`come up with and discussions
`
`it within ATI
`started about
`Q Why was the R400 project started
`A Well we needed a followon chip
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`The way that All worked at
`
`that
`
`time we had a
`
`leapfrogging design system So it was a group on
`
`the East Coast
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`that was doing the odd sequence
`
`sorry
`
`the even sequence of chips
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`So the East
`
`Coast
`
`team did the R200 and then the West Coast
`
`team would do the R300 and the East Coast
`
`team
`
`would do the R400
`
`This is because the market needs were
`
`such that
`
`the need for a new chip was shorter
`
`than the design time needed for a new chip
`
`So
`
`we had these leapfrogging teams to be able to
`
`meet
`
`the market windows
`
`So the R400 was intended as our new
`
`chip after the
`
`well after the West Coast
`
`R300 But
`from the East Coast point of view
`after the R200
`
`We needed both increased
`
`performance as well as we were looking at
`supporting next generation APIs
`Q Did the West Coast
`next odd numbered R500
`A That was originally the goal
`and the R400 took longer
`schedules changed
`
`team work on the
`
`As
`
`than
`
`anticipated to meet
`
`the development effort what
`
`happened was that
`
`the
`
`we met that marketing
`
`window rather
`
`than with the R400 with a revision
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`the R300 which we called the R42
`
`The R400 was renamed the R500 and
`
`aimed at
`
`the next market window
`
`it
`
`turned
`
`out
`
`the R500 slipped as well
`
`And so the West
`
`Coast
`
`team did wind up producing a chip that went
`
`into the R500 marketing window and that was
`
`idea of
`
`the
`
`called the R580
`Q When was the 420 chip released
`A I am not sure Id have to go back
`into records and get back to you on that
`Q Do you have a general
`time frame when it may have been released
`A The R420
`It was probably released
`I couldnt
`time frame
`in the 2004
`Q Do you know when the 580 was
`released
`A It probably would have been released
`later maybe 18 months later
`a year
`Q why did the R400 take longer than
`the development effort
`anticipated to meet
`A The R400 was a very aggressive chip
`in a number of ways
`The unified shader
`idea was
`
`about
`
`certainly new and there was a lot of engineering
`
`associated with that
`
`But
`
`there were a lot of
`
`other changes
`
`involved in the R400 as well
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`There were compression changes
`
`in how
`
`we dealt with memory that
`
`took a
`
`lot
`
`longer
`
`than
`
`we thought
`
`There was negotiations with
`
`Microsoft over how the API would shape up
`So there were back and forth
`
`discussions about
`
`that
`
`So sometimes engineering
`
`in what
`
`than you anticipate
`just takes longer
`Q Where was the work on the R400 done
`location
`A The primary work on the R400 was done
`in the Marlboro office of ATI
`There was some
`in the Orlando office of ATI
`
`work done as well
`
`The Orlando team came on board with the R400 a
`
`little later than the Marlboro team did because
`
`the Orlando office was also Involved in the R300
`
`series of products
`
`So while we had a leapfrogging
`
`effort
`
`the Orlando team was actually on both of
`
`those efforts
`Q Which parts of
`Marlboro office work on
`A As I said the Marlboro office worked
`on virtually all of it
`It worked on the
`
`the R400 did the
`
`on the shader pipe on what we called
`sequencer
`the render back end which NVIDIA called the ROP
`
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`unit
`
`the texture system on the command
`
`processor although some of
`
`the command processor
`
`was done in Orlando
`
`Most of
`
`the vertex processing after
`
`shading was done in the Orlando office that
`
`its
`
`transform
`a clipping and viewport
`Q What aspects of the engineering
`associated with the unified shader contributed to
`
`the delay in the 1R400 project
`MR FAHRENKROG
`
`Object
`
`to the form
`
`of
`
`the question
`MR PAIGE
`A A lot of
`challenging
`How do you get
`
`Join in the objection
`
`the data flow was
`
`the data from the
`
`vertex shader back
`
`into the pixel shader
`
`Dealing with SOMA of
`
`the shared resources for
`
`both vertices and pixels in a manner such that
`you didnt get deadlock
`and that you got adequate
`perfrmanco that one didnt overwhelm the other
`
`was also challenging
`Q In the R400 what were the shared
`resources between vertices and pixels
`A The shader itself
`execution unit and the sequencer
`
`that
`
`is the
`
`logic were
`
`shared
`
`The general purpose registers were
`
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`s
`
`shared also on a slowly moving dynamic basis
`
`where there were two different pools but
`
`the
`
`pool sizes could change
`Q What were the issues with the general
`purpose register in the unified shader design
`MR PAIGE Object
`
`to the form of the
`
`question
`
`MR FAHRENKROG Objection
`A Allowing the shader that had the most
`the resources than the
`work to do to get more of
`
`other shader while at
`
`the same time having a
`
`reasonable allocation mechanism for those
`
`We
`
`like to allocate in kind of a FIFO order because
`
`thats easy to control but
`
`its difficult
`
`to do
`
`that when you have two different
`
`shader programs
`
`that
`
`take radically different amounts of
`
`time
`
`that
`
`take unpredictable amounts of time
`Q Were these issues with the general
`purpose registers ever resolved in the R400
`
`project
`
`mR PAIGE
`A Yes
`allocation scheme that was functional and that
`
`The R400 had a register
`
`Vague and ambiguous
`
`worked well and that was actually carried
`I dont
`
`forward into the Xbox chip
`
`think there
`
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`were
`
`I cant
`
`think of a difference between the
`
`R400 design and what was produced in the Xbox in
`
`that area
`Q When was the design of
`purpose registers in the R400 finalized
`A The general purpose registers were
`finalized fairly early on
`I would say prior to
`
`the general
`
`the end of 2001 the overall
`
`scheme was
`
`established and really didnt change much after
`that
`
`Q What was your role in the R400
`project
`A 1 was the head architect of
`Marlboro site Steve Ryan was under me and he
`
`the
`
`was nominally specifically in charge of
`
`the R400
`
`As the project evolved I
`
`took over more of
`
`that
`
`role from Steve
`Q Who else worked on the R400 project
`A Well
`there was a very large team
`mean by the end it was certainly over
`
`100
`
`people
`
`Q Who was on the initial
`started work on the R400 project
`A Initially there were just a small
`Steve Morein
`group of architects working
`
`team that
`
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`Laurent Lefebvre Andy Skende were people who
`
`worked on it
`Q When were additional people added to
`the R400 team
`A Throughout 2001 as people came off
`of the final work on the R200 there were more
`
`and more people involved
`
`I would say during the
`
`first half of 2001 it was a fairly small
`
`architectural
`te
`Q When did the R400 project end
`A I believe it
`it didnt
`well
`ended
`into the R500
`We evolved it
`
`end
`
`Page
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`That
`
`is we
`
`realized we wouldnt make that market cycle in
`
`early 2003
`Q When did work on the R500 project
`
`begin
`
`A Immediately after
`It was just kind of a redirection We
`stoppage
`
`There was no work
`
`were late on the R400 and we didnIt want
`
`to be
`
`late on the R500 as well
`
`So the nature of
`
`the
`
`work did not change at all between R400 and R500
`
`The API
`
`it was aimed at was the same
`
`API
`
`begin
`
`Q When did work on the Xenos chip
`
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`That also began in early 2003
`
`think that
`
`the Xenos work began shortly after the
`transition to R500
`Q Did the same teamwork on the Xenos
`Did the same teamwork on the Xenos
`chip and the R500 project
`A There was a lot of overlap but
`were also separate people working on the Xenos
`chip that were working on the R500 Most of the
`
`there
`
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`Xenos work wound up being focused in the Orlando
`
`site while most of the Marlboro site continued
`
`work on the R500
`
`But
`
`the databases were so similarf
`
`that
`
`there was a lot of back and forth between
`
`the two
`Q Which project did you work on
`A 1 was primarily on the R500
`Q Why was a different
`team assigned to
`work on the Xenos
`A There wore aspects of
`were unique to Xenos that werent going to be
`
`the Xonos that
`
`part of
`
`the anticipated R500 chip
`
`Xenos had a
`
`very different memory interface for instance
`
`there was a dedicated memory chip as opposed to a
`standard off the shelf memory chips in the Xenos
`
`There were also interfaces to the
`
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`host processor in the Xenos oink that were not
`
`anticipated to be part of
`
`the R500
`
`And there
`
`were also just the general Microsoft
`
`interaction
`
`as Microsoft was the project owner
`
`that werent
`
`in the R500
`a factor
`Q Was Microsoft
`the Xenos chip
`A They were the overall project owner
`
`the project owner of
`
`yeah
`
`Q What did they do as the overall
`the Xenos chip
`project owner of
`MR FAHRENKROG
`Ill
`
`insert an
`
`objection here 1 caution you not
`information Weve
`
`Microsoft confidential
`
`to reveal any
`
`objected to that
`in response to your subpoena
`and hes not here to talk about anything
`
`confidential
`
`to Microsoft here today Youre
`
`welcome to ask your questions about Xenos
`
`and so
`
`forth
`
`Q What did Microsoft do as the overall
`project owner of the Xenos
`A They specified some of
`that we had to support
`and some of
`the scenarios
`Q Which interfaces did they specify
`A There was an interface in between
`
`the interfaces
`
`the
`
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`host and the Xenos chip that was Microsoft
`
`specific that would allow the host
`
`to directly
`
`write into Xenos memory
`Q What were the specific scenarios that
`for Microsoft
`you had to support
`MR FAHRENKROG
`
`to the form
`
`Object
`
`of the question
`A Well
`mentioned this dedicated memory associated with
`
`for instance there was
`
`1
`
`the part and that had a certain size associated
`with it
`
`Microsoft was
`
`involved in specifying
`
`the size of
`
`that memory and the size of
`
`that
`
`memory defined what screen resolutions would be
`
`supported in one pass versus multipass
`
`So you know whether given say 1280
`
`or whatever
`
`standard high definition is whether
`
`that would be a multipass
`
`And that was
`
`primarily a cost
`
`issue So thats why
`
`it
`
`foil
`
`to
`
`Microsoft
`
`The engineering of the chip was ATI
`
`but a number of
`
`the specifications of
`
`the chip
`
`were Microsoft
`O So did Microsoft specify certain
`the chip design for the Xenos
`aspects of
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`A They specified certain capabilities
`I wouldnt say Microsoft specified
`the chip
`
`of
`
`design aspects
`Q What capabilities of
`Microsoft specify
`A Well as I mentioned the ability for
`to directly write into the chip
`the host
`The
`
`the chip did
`
`size of
`
`They might have
`the external memory
`as 1 said I wasnt on the Xenos project but
`
`1
`
`that
`
`well
`
`they had certain performance goals as
`expect
`that had to be met
`Q Who
`Microsoft
`that were involved with the Xenos
`
`is the person or people at
`
`project
`
`MR FAHRENKROG
`
`Object
`
`to the
`
`question as asking for confidential Microsoft
`
`recall offhand
`
`information
`A I dont
`Q Was
`the Xenos chip a single chip GPU
`implementation
`MR FAHRENKRO
`
`Object
`
`to the form
`
`of
`
`the question
`
`e GPU was a single chip
`
`There was
`
`an additional dedicated memory part
`
`that held a
`
`tile buffer that was on the same
`
`was in the
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`AMOLGO214859
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`ame package but
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`was not part of
`
`the same
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`die
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`Q Were any rendering functions
`performed on a separate chip that had a tile
`
`buffer
`
`A I believe it was purely a eDRAM part
`an embedded DRM part
`I would have to go back
`
`to actual notes to check
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`to see that
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`there wasnt
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`any logic functionality on that part
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`I
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`remember very early on there was
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`some discussion about
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`that but
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`I do not believe
`
`in the part
`that was
`Q What notes would you have to go back
`and check
`A Oh Id have to go through ATI
`proprietary information
`It wouldnt be my
`personal notes but Id have to get proprietary
`information from AT about Xenos like the Xenos
`
`overall specification
`Q Was the render back end module on a
`separate chip
`A Again certainly the entire render
`back end module would not have been on a separate
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`chip
`
`on that
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`There may have been some aspect
`I cant
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`separate chip but
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`testify one way or the
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`other
`
`Q Why would certain aspects of
`the
`render back end module be placed on a separate
`
`chip
`
`MR FAHNENKROG
`
`0o2ect
`
`to the form
`
`of the question
`Vague
`A The reason why you would do that was
`read modifywrite operations into pure
`to convert
`
`write operations to preserve bandwidth
`Q In general what
`type of operations
`does the render back end module perform
`MR FAHRENKROG
`to the form
`
`Object
`
`Vague
`
`MR PAIGE Object
`to the form
`A it generally performs blending
`operations and logic operations like andor
`Q What
`be moved to a separate chip
`A For the same reason to preserve
`memory bandwidth
`you were doing
`readmodify write operations could be converted
`
`reason would blending operations
`
`If
`
`to just a write only operation
`Q Did Microsoft
`separate chip in the Xenos design
`A I dont
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`recall whether
`
`that aspect of
`
`request
`
`the use of a
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`the design was originated with Microsoft or was
`
`suggested by ATI
`Q Why didnt Microsoft use the R400
`
`design
`
`Foundation
`
`MR FAHRENKROG
`
`Object
`
`to form
`
`MR PAIGE
`Join in the objection
`A We used the R400 as the basis for the
`As we understood more about
`Microsoft proposal
`
`what Microsoft was looking for there was you
`
`know design changes proposed to meet
`
`Microsoft specific needs
`
`I dont
`
`know whether
`
`the specific
`
`change of
`
`the use of an embedded DRAM separate
`
`to the form
`
`chip came from Microsoft or ATI
`Q What parts of the R400 design did not
`meet Microsoft specific needs
`MR PAIGE Object
`A Well
`the graphics
`
`want
`
`for one thing Microsoft didnt
`it
`is as
`
`DRAM aspect of
`
`that
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`a separate memory pool Microsoft wanted things
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`to work out of a single system pool
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`Once we lost the separate memory pool
`for graphics thats when the eDRAM showed up as
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`a way of at
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`least providing some additional
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`AMDLGO214862
`AMD13180157977
`CX1950C0023
`
`Realtek Ex. 1017
`Case No. IPR2023-00922
`Page 23 of 213
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`memory bandwidth to meet GPU needs
`
`The actual shader system from R400 to
`
`Xenos was pretty much identical
`Q How did the R400 design use the
`graphics DRAM
`A The R400 generally rendered into
`graphics DRAM as a separate memory pool and it
`
`had a highspeed bus into the graphics DRAM
`
`It
`
`used it purely as a memory
`
`There was a memory hub as well
`
`that
`
`could direct
`
`rendering into a system memory at a
`
`slower rate
`Q Did the R400 have memory in addition
`10 graphics DRAM
`A Again the graphics DRAM was not part
`of the R400
`It was a separate chip external
`
`It had internal memories and as well
`
`it had
`
`access to system memory
`O What
`
`internal memory did the R400
`
`use
`
`A The R400 had various caches
`as FIFOs and buffers that would join different
`
`as well
`
`blocks
`
`There were fairly small pieces of
`
`memory
`
`Q Were general purpose registers within
`
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`AMDLGO214863
`AMD13180157978
`CX1950C0024
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`Realtek Ex. 1017
`Case No. IPR2023-00922
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`s
`
`the R400 desi
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