Change 96318 on 2003/04/17 by rramsey@rramseycrayola_linux_orl
`
`change Openning to Opening
`
`Change 96278
`
`on 2003/04/17 by scamlin@scamlincrayolaunixorl
`
`Change 96252
`
`on 2003/04/17 by rramsey@rramseycrayolalinuxorl
`
`Add new signal between sqvtx_ ctl and sq_input_arb to mark gpr_ldbusy
`
`which fixes a deadlock condition where gpr_ld state machine is waiting
`
`on an ack from the arb, which is waiting on vsr_ld machine not busy, which
`
`is waiting on the gprld machine to finish.
`
`Add a reset for spsel in sqvtx_ctl when the vsrld machine goes from ld
`to idle. This is needed if there is valid data sitting in the vgt fifo since
`
`a vsr load will happen on the following clock.
`
`Connect pred_kill _valid bits in tbh_sqsp.
`
`Fix typo in visrwr tracker.
`
`Change 95859
`
`on 2003/04/16 by rramsey@rramseycrayola_linux_orl
`
`fix width
`
`Change 95847
`
`on 2003/04/16 by rramsey@rramseycrayolalinuxorl
`
`script to build the verdi kdb for tb_sqsp
`
`Change 95839 on 2003/04/16 by rramsey@rramseycrayola_linuxorl
`
`the SQ to get tb_sqsp working, and to fix bugs
`Multiple changes throughout
`uncovered by the new testbench
`
`sq_gpr_alloc - wrap was broken for vertex side if ptr wrapped exactly at max
`sq_rbbminterface - context/new_ld sent to constant mems was being pulled from wrong
`side of skid buffer
`
`sqpixthread_buff - change to send contextdone event back to CP on the pixel side
`buildtb,
`tb_sqsp,
`tbtrk_* - changes for new sp/spi configuration and new dump file
`fields
`
`Change 95810
`
`on 2003/04/16 by dougd@dougd1400 linuxmarlboro
`
`fixed bug in
`to increment
`
`the pix cntx counter increment signal where both event and pix were trying
`during the same cycle
`
`Change 95623
`
`on 2003/04/15 by mzini@mzini_crayola_linuxorl
`
`New SQ trackers
`
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`Change 95621 on 2003/04/15 by mzini@mzini_crayola_linux_orl
`
`Using an unregistered data-ready signal now to trigger compare
`
`Change 95490 on 2003/04/14 by vromaker@vromaker1400linuxmarlboro
`
`fix for CFSM end-of-clause detection
`
`Change 95457 on 2003/04/14 by danh@danh_crayolalinuxorl
`
`Initial Release.
`
`Change 95404 on 2003/04/14 by rramsey@rramseycrayola_linuxorl
`
`Temporary fix to let flush events flow through the SC if they are not
`
`preceded by a draw_init.
`Note flushes are still broken if you want to use them for syncing state changes,
`
`for example changing badpipe.
`
`Change 95391 on 2003/04/14 by rramsey@rramseycrayolalinuxorl
`
`
`Change SQDEBUSSY option to control only SQ dumping
`
`Add SP_DEBUSSY option to control dumping of SPs
`Add some internal trackers
`
`Fix width on tp_sqspthread_id
`
`Change 95174 on 2003/04/11 by hartogs@fl_hartogs
`
`Added hooked up new “thread_type" signal
`
`from 8Q@ module. Enhanced timeout detection.
`
`Change 94999 on 2003/04/10 by ygiang@ygiang_1400pv2_marlboro
`
`fixed: sq perf counter "sqvertexvectors sub"
`
`Change 94873 on 2003/04/10 by askende@askende1400linuxmarlboro
`
`releasing the following changes:
`1. creation of the new SPI block
`
`2.
`
`3.
`
`top level changes to support
`
`8 SP instances
`
`tracker changes to support a few IO name changes
`
`Change 94834 on 2003/04/09 by mmantor@mmantorcrayola_linuxorl
`
`<fixed a problem in ptrbuff where he hangs on an event that is not a pixel event>
`
`Change 94830 on 2003/04/09 by mmantor@mmantorcrayolalinuxorl
`
`<SQ/SX/SP out of order thread completion and remove redundant storage in sp for sq/sx
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`communitcations some sq cfs bug fixed and texture kill mask generation and other misc
`
`things>
`
`Change 94724 on 2003/04/09 by mzini@mzinicrayolalinuxorl
`
`New SQ trackers
`
`Change 94718 on 2003/04/09 by viviana@viviana_crayola_linuxorl
`
`SQ trackers for the sequencer control flow instructions.
`
`Change 94518 on 2003/04/08 by vromaker@vromakerr400linuxmarlboro
`
`fix for bug caused by resource change between EXEC control flow
`instructions
`
`Change 94505 on 2003/04/08 by rramsey@rramseycrayola_linuxorl
`
`don't inc vtx thread counter if thread is an event
`
`Change 94211 on 2003/04/07 by hartogs@fl_hartogs
`
`Template Debussy waveform file.
`
`Change 93959 on 2003/04/04 by vromaker@vromaker1400linuxmarlboro
`
`temporarily disabled PVPS sre select swizzle because it was causing SP tests
`
`from Andi's mini_regress to fail
`
`Change 93788 on 2003/04/03 by dougd@dougd+400 linuxmarlboro
`
`added event_context register to correctly capture context when sending a vtx event to
`the thread buffer.
`
`Change 93640 on 2003/04/03 by hartogs@fl_hartogs
`
`Added include file “vgt_reg.v" to prevent compiler errors during Modelsim compile.
`Fixed wire definition to match output port definition.
`
`Change 93585 on 2003/04/03 by dougd@dougd1400 linuxmarlboro
`
`move event filters to inputs of 8Q in ptrbuff and vtx_ctl and remove from
`
`thread_buffcntl, modify cntx0-17 busy counters in ptr_buff to use new event logic, add
`
`RST_VTX_CNT functionality to sq_vtx_ctl, add 8QCPevent and SQRB event functionality
`
`to pixthreadbuff and vtxthreadbuf,
`
`remove obsolete S@CPevent functionality from
`
`threadbuffcntl.
`
`Change 93489 on 2003/04/02 by vromaker@vromakerr400linuxmarlboro
`
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`added end of clause detection for serialization and resource change to CFSM;
`
`fix for firstinclause related to PVPS detection;
`added SQSPthread_type and SQTPthreadtype outputs to sq.v;
`added predicate to Tex IQ - now predicate goes from TCFS,
`thru TIF,
`TIS;
`
`removed ql pipeline stage for SP predicate data in AIS Output;
`
`thru TIQ,
`
`to the
`
`Change 93099 on 2003/04/01 by hartogs@fl_hartogs
`
`Fixed logic that holds off SC injector.
`
`Fixed bug in threaded empty signal for tp_sqsp_dmp_not_empty.
`Hacked logic that frees state contexts so that it sorta works.
`
`Change 93054 on 2003/04/01 by rramsey@rramseycrayolalinuxorl
`
`PV/PS determinations need to be made on post-swizzled component selects
`
`Change 93053 on 2003/04/01 by dougd@dougd_r400_linux_marlboro
`
`added context_id or state to event info stored in the status_reg to correct a bug in
`the state logic supporting cntx0 and cntx17 busy
`
`Change 93026 on 2003/03/31 by grayc@grayccrayolalinuxorl
`
`minor changes for ge testbench
`
`Change 92970 on 2003/03/31 by dougd@dougd_r400_linux_marlboro
`
`added pix event _id to qualify events to increment
`
`the cntx17 busy counter. Also added
`
`“include "vgt_reg.v" and removed hard coded parameters.
`
`Change 92904 on 2003/03/31 by hartogs@fl_hartogs
`
`Added TP_SP latency controls requested by Mantor.
`
`Change 92884 on 2003/03/31 by hartogs@fl_hartogs
`
`Cleaned-up some "TODO"
`
`items.
`
`Change 92679 on 2003/03/28 by hartogs@fl_hartogs
`
`Hooked-up new thread-id ports on SQ. Testbench should now handle most tests.
`
`Change 92451 on 2003/03/27 by hartogs@fl_hartogs
`
`Added several missing input ports to sub-modules.
`
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`Change 92428 on 2003/03/27 by hartogs@fl_hartogs
`
`Deleted reduntant wire declaration that was causing an error in modelsim.
`
`Added explicit declarations for a bunch of implicitly used wires. The lack of the
`
`explicit declarations was causing warnings in Modelsim.
`
`Change 92324 on 2003/03/27 by dougd@dougd_r400_ linuxmarlboro
`
`fixed bug with address wrapping in the gprwraddr generation for pix and vtx
`
`Change 92303 on 2003/03/27 by mmantor@mmantorcrayola_linuxorl
`
`<export_id expanded from one to four bit, end_ofclause added to CFS-TIF interface and
`
`last_in_clause flag passed down with instruction to eventually trigger a freedone.
`
`threadid outputs added to the SQSP and SQTP interfaces for testbench, and added
`
`sqsx control signals for exptable read >
`
`Change 92262 on 2003/03/26 by hartogs@fl_hartogs
`
`Added untested code for random backpressure on the SQTP interface.
`
`Added untested code for random starve pressure on the TPSP interface.
`
`Change 92142 on 2003/03/25 by hartogs@fl_hartogs
`
`This version passes milestonetri. Trackers and injectors are ready for multi-threading
`when those signals become available.
`
`Change 92139 on 2003/03/25 by hartogs@fl_hartogs
`
`This version passes the "milestonetri™ test completely. First working version for
`texture fetch.
`
`Change 91978 on 2003/03/25 by hartogs@fl_hartogs
`
`Incremental check-in. This version will run "milestonetri” to completion (including
`injecting the texture fetch data); however the simulation mismatches on the SPSX
`tracker.
`
`Change 91977 on 2003/03/25 by hartogs@fl_hartogs
`
`Changed “check flags" on one of the SQ memories to minimize garbage output during
`simulation.
`
`Change 91976 on 2003/03/25 by hartogs@fl_hartogs
`
`Changed dump file name from tp_sq.dmp to tp_sqsp.dmp.
`
`Change 91763 on 2003/03/24 by hartogs@fl_hartogs
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`Qualified use of "qskid_rbbm_a"™ with "!qskid_empty". This was done to avoid X's on
`
`"sel gfxvgt_draw_initiator" which corrupted a counter “mapcopy_cntr". The corruption
`of "mapcopycntr"™ could only be corrected by reset.
`
`Change 91754 on 2003/03/24 by rramsey@rramseycrayola_linuxorl
`
`Fix for gpr write tracker
`
`Change 91569 on 2003/03/21 by dougd@dougd+400 linuxmarlboro
`
`added Real Time input to each of the constant store to enable the correct addressing of
`RT constants from the SQ
`
`Change 91422 on 2003/03/20 by dougd@dougd1400 linuxmarlboro
`
`fixed bugs in the rbi_rdstate machine
`
`Change 91219 on 2003/03/20 by dougd@dougd_r400_linux_marlboro
`
`fix bug in real time write address logic
`
`Change 91126 on 2003/03/19 by dougd@dougd_r400_linux_marlboro
`
`fixed bug in incrementing pixcntxl7 cnt with back to back events
`
`Change 90960 on 2003/03/19 by smoss@smoss_crayola_linux_orl
`
`added new sq trackers
`
`Change 90915 on 2003/03/19 by dougd@dougd_r400_linux_marlboro
`
`
`added I/O TEST PORTS for bist and scan
`
`Change 90861 on 2003/03/19 by rramsey@rramseycrayolalinuxorl
`
`Changes to sp_ sel and valid logic to get bad_pipe working
`
`Change 90773 on 2003/03/18 by dougd@dougd_r400_linux_marlboro
`
`added logic to drive SQCNTXO BUSY,
`functionality.
`
`SQCNTX17 BUSY. This change should complete this
`
`Change 90733 on 2003/03/18 by dougd@dougd_r400_linux_marlboro
`
`added counters and control for pix cntx0, cntxl17 busy
`
`Change 90622 on 2003/03/17 by hartogs@fl_hartogs linux
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`First crack at VCS build script for tbh_sqsp
`
`Change 90551 on 2003/03/17 by dougd@dougd1400 linuxmarlboro
`
`added code in sqstatus_reg to decement the thread counters in sqvtx_cntl used for
`
`SQCNTXO_busy, SQCNTX17 busy
`
`Change 90313 on 2003/03/14 by hartogs@fl_hartogs
`
`(Thread id and type are hard-coded to 0 and
`Added multi-threaded code to tbhtrk_sqtp.v.
`1, respectively, until these signals are available from the sq.)
`
`Fixed port name typos in tbtrk_spsx.v.
`
`Change 90002 on 2003/03/13 by viviana@vivianacrayolalinuxorl
`
`Corrected some signal paths to work at the gc level testench.
`
`Change 89954 on 2003/03/13 by viviana@viviana_crayola_linuxorl
`
`Tracker to test the interface between the Vertex Input Control of the sq and the
`
`VSR's of the SP, during a write.
`
`Change 89810 on 2003/03/12 by hartogs@fl_hartogs
`
`Minor corrections to tbtrk_sqtp.
`Modularized the SP/SX tracker.
`
`Change 89746 on 2003/03/12 by hartogs@fl_hartogs
`
`Modularized the SOTP tracker (per Chris Gray's request).
`
`Change 89740 on 2003/03/12 by hartogs@fl_hartogs
`
`Somehow this one slipped through the cracks. This one should have been changed when the
`
`"pefreecnt_q" signal width
`was increased from 7 to 8 bits.
`
`Change 89588 on 2003/03/11 by hartogs@fl_hartogs
`
`Added tp_sq.dmp to list.
`
`Change 89538 on 2003/03/11 by hartogs@fl_hartogs
`
`Interim Check-in
`
`Change 89518 on 2003/03/11 by hartogs@fl_hartogs
`
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`Dummy files currently uses by tb_sqsp testbench.
`
`Change 89516 on 2003/03/11 by hartogs@fl_hartogs
`
`Interim check-in.
`
`Change 89515 on 2003/03/11 by hartogs@fl_hartogs
`
`Changed “pefreecnt_q" to 8 bits so that it could represent the maximum free count of
`128. Propagated this change to
`
`ss/sq_status_reg.v and to ss/sqvtx_thread_buff.v. Added ifdef SIM code to check for
`overflow and underflow of this
`counter.
`
`Added condition for simultaneous occurrance of pealloc and pbdeallocvld.
`
`Change 89474 on 2003/03/11 by vromaker@vromaker_r400linuxmarlboro
`
`change to make texture requests wait on alu_instrpending
`
`Change 89448 on 2003/03/10 by mmantor@mmantorcrayolalinuxorl
`
`2.
`<1. Added timestamp to dum_mem read and write from same location error message.
`Moved flat/gouroud shading and provoking vertex to sq-pce from the sx and worked on ptr
`instead of data 3.Added control for the texture cylinderical wrapsubcycling.
`4. Add rt
`
`5.Clamped and wrapped peptrs in sq
`parameter cache ptr selection in sq
`support for points and lines in the parameter cache ptr determination.
`
`7.
`
`6. Added
`prep
`
`seperate write address for export to memory 8.
`
`tmp fix for deallocation of export
`
`memory deallocation.
`
`9.
`
`remove some old comment out code and redundant logic >
`
`Change 89039 on 2003/03/07 by dougd@dougd+400 linuxmarlboro
`
`added “include "registeraddr.v"
`
`Change 88929 on 2003/03/06 by vromaker@vromakerr400linuxmarlboro
`
`fix to CFS that prevents a new thread from entering when the thread ID
`
`in the input pipe stage is different than the thread ID in the output pipe stage;
`
`also changed triangle size to 150 for sq_tests test case pred_eqvec
`
`Change 88816 on 2003/03/06 by dougd@dougd1400 linuxmarlboro
`
`added ports to support cntx0busy, cntxl17 busy
`
`Change 88639 on 2003/03/05 by vromaker@vromakerr400linuxmarlboro
`
`a few minor updates, mostly comment related; added q2 verison of
`
`stateheadptr for use in state read addr calcualtion in vtx thread buff
`
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`Change 88552 on 2003/03/05 by dougd@dougd_r400_ linuxmarlboro
`
`needed to subtract RT base address (°SQ_FETCH_RT_0)
`and reads.
`
`from incoming address for RT writes
`
`Change 88512 on 2003/03/05 by rramsey@rramseycrayola_linuxorl
`
`Fix a bug with the valid bit inits that was causing tril28 pix4 to fail
`
`Change the vsrld machine to alternate between buf0 and bufl so pattern
`is deterministic and can be compared vs emulator
`
`Change 88400 on 2003/03/04 by vromaker@vromakerr400linuxmarlboro
`
`fix for deallocspace width; status register and thread buffer updates for
`
`status register writes; status register fix for clearing the eventvalid (and all
`
`other bits) on a pop; newthread flag now generated in the instr fetch module and
`
`send dowm thru the AIQ; fix for the setting of thread_valid status
`
`Change 88117 on 2003/03/03 by hartogs@fl_hartogs
`
`
`Added dum_memp2 model back into the code with USEBEHAVEMEM compiler directive.
`
`Change 87997 on 2003/03/03 by dougd@dougd_r400_linux_marlboro
`
`missing term in eqn for skidrehold for texrt_rd caused tex_rt_ rdreg to assert for
`only 1 cycle and not wait for the data ack
`
`Change 87726 on 2003/02/28 by vromaker@vromakerr400linuxmarlboro
`
`another merge fix
`
`Change 87675 on 2003/02/28 by rramsey@rramseycrayola_linuxorl
`
`Change cf machine to use program_base derived off of isr, and then
`
`register that value on load_osr for sending to the tip
`
`Change 87632 on 2003/02/28 by vromaker@vromakerr400linuxmarlboro
`
`another merge fix
`
`Change 87622 on 2003/02/28 by vromaker@vromakerr400linuxmarlboro
`
`bad merge - retry...
`
`Change 87620 on 2003/02/28 by vromaker@vromaker1400linuxmarlboro
`
`MOVA related change - due to the extra cycle required by SP for timing,
`
`had to conditionally mux the interface register on the last phase of the address
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`load into the constant waterfalling logic (to be used instead of last quarter
`
`of the address register since the start of the CWF logic now overlaps the
`
`address register load by one cycle)
`
`Change 87440 on 2003/02/27 by mmang@mmangcrayolalinuxorl
`
`Predicated parameter cache writes.
`
`Change 87408 on 2003/02/27 by vromaker@vromaker1400linuxmarlboro
`
`Change 87398 on 2003/02/27 by donaldl@donaldl_crayola_linuxorl
`
`Created early version of pixwinnerq going from sqaluthread_arb to
`
`sqpixthreadbuff in order to create a registered version of aluwinnerfinal.
`
`Done to reduce critical path of the allocation_available signals in
`
`sq_exp_alloc_ctrl.v
`
`Change 87269 on 2003/02/27 by donaldl@donaldl_crayola_linuxorl
`
`Removed allocation of 48 locations for vtx pass thru
`
`Change 87207 on 2003/02/26 by hartogs@fl_hartogs
`
`Added comments that question a few lines of code.
`
`Added ifdef SIM check for overflow and underflow on the the pefree_cnt_q signal.
`
`Change 87206 on 2003/02/26 by hartogs@fl_hartogs
`
`Changed dealloccnt signal going into the event fifo so that it is masked-out
`
`(zeroed)
`
`for two_clockxfer that is not end_ofbuiffer. This change was made because I observed
`the logic push the new signal into the event fifo with the dealloc count, and then
`
`pushing the dealloc count in again with the pixvectorvalid signal later.
`
`Changed efpop signal so that it will not pop a non-zero dealloc unless the new bit
`is not set. This change was made because the absence of the change above allowed a new
`
`signal to go in with a non-zero dealloc_cnt which was then permaturely popped instead
`of waiting for the vertex vector to be done.
`
`Added some TODO comments for some hardcoded parameters that should come from autoreg
`include files.
`
`Added some ifdef SIM code that checks for under flow of vtx_ synecnt_q (which was an
`observable result of the problems above).
`
`Change 87184 on 2003/02/26 by dougd@dougd_r400_ linuxmarlboro
`
`when vgt_endofvector occurs on the lst and only data,
`
`the data sent
`
`to the SP is
`
`delayed by 1 cycle but
`
`the vsrwrtaddr was not. Fixed
`
`Change 86670 on 2003/02/25 by vromaker@vromakerr400linuxmarlboro
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`fixed gpr address calculation for CONST scalar opcodes
`
`Change 86509 on 2003/02/24 by dougd@dougdr400 linuxmarlboro
`
`corrected error introduced in the last version
`
`Change 86412 on 2003/02/24 by dougd@dougd_r400_linux_marlboro
`
`fixed bit width mismatch in the wrt addr assignment when doing RT
`
`Change 86136 on 2003/02/21 by dougd@dougd_r400_linux_marlboro
`
`fixed bug in ovectorvalid - it counted a single vert as two when there was only one
`
`vert in the vector and end_ofvector was also asserted.
`
`Change 86121 on 2003/02/21 by vromaker@vromakerr400linuxmarlboro
`
`changed contextid (state) used for CFC reads to be that from the input
`pipeline register
`
`Change 86092 on 2003/02/21 by vromaker@vromaker_r400linuxmarlboro
`
`added code to disable PVPS detection on 2nd thru last iterations of a
`
`const waterfall loop; added lastinshader output
`
`from CFS that is separate
`
`from the cfs lastinstr status bit that is sent back to the thread buffer
`
`Change 85975 on 2003/02/21 by hartogs@fl_hartogs
`
`The version has code in the testench to track the SX buffer availability and to free
`buffers after
`
`the SP has exported the data to the SX. It also has the SQ/SP instruction interface
`time de-multiplexed
`
`and split out by field.
`
`Change 85737 on 2003/02/20 by donaldl@donaldl_crayola_linux_orl
`
`Fixed alu_reg equation for handling last_instr_q and firstthread_q.
`
`Changed nxtpixlastalloc counter to nxt_pixlast counter.
`
`Change 85660 on 2003/02/20 by vromaker@vromakerr400linuxmarlboro
`
`updated fifo ctl to output a registered count, and changed the ctl
`
`logic to use the counter for full, empty, etc.
`
`Change 85659 on 2003/02/20 by vromaker@vromakerr400linuxmarlboro
`
`now enable PVPS detection only on 2nd to last consective instructions
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`of a thread; also added more support for MULCONST (force sre_c_sel.x to GPR)
`
`Change 85653 on 2003/02/20 by vromaker@vromakerr400linuxmarlboro
`
`fixed so that only vertex valid bits are swapped (pixel valid bits are
`
`swapped on input from SC)
`
`Change 85650 on 2003/02/20 by vromaker@vromakerr400linuxmarlboro
`
`fixed thread changed detection logic - the firstingroup and last_ingroup
`outputs now mark the start and end of an uninterrupted stream of target instructions
`from the same thread
`
`Change 85640 on 2003/02/20 by vromaker@vromaker1400linuxmarlboro
`
`reorderd LOD correction bits to match valid_bits
`
`Change 85595 on 2003/02/20 by scamlin@scamlin_crayola_unixorl
`
`added testreg
`
`Change 85525 on 2003/02/20 by scamlin@scamlin_crayola_unixorl
`
`change test port name
`
`Change 85487 on 2003/02/20 by dougd@dougd_r400_linux_marlboro
`
`fixed bug in "double mode" vsr address generation. Also added logic to choose correct
`
`SP from the IDLE state when some SP's have been disabled by the BADSP bits.
`
`Change 85405 on 2003/02/19 by dougd@dougd_r400_linux_marlboro
`
`modified system_sq.vcpp and ves.ini to find the new virage hs memories. Backed out
`new hs ram in texconst because it doesn't work.
`
`the
`
`Change 85398 on 2003/02/19 by pmitchel@pmitchel1400laptop
`
`recovering deleted file
`
`Change 85337 on 2003/02/19 by scamlin@scamlincrayolaunixorl
`
`delete these files and use the rtl.v versions
`
`Change 85336 on 2003/02/19 by scamlin@scamlincrayola_unixorl
`
`new virage hs memories
`
`modified default parameter values to work around a synthesis hang
`
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`Change 85215 on 2003/02/19 by donaldl@donaldl_crayola_linuxorl
`
`Added nxt_pixalloc and nxtpixlastalloc counters.
`
`Change 85031 on 2003/02/18 by vromaker@vromakerr400linuxmarlboro
`
`
`‘last' optimization within EXECEND added; also fixed last so that without
`
`optimization, it will be set on the last target instruction in the EXEC_END (was
`
`
`setting it on the first instruction of an EXECEND, which for the majority of
`
`
`
`
`
`our tests is the same as the last instruction of an EXECEND)
`
`Change 84707 on 2003/02/16 by vromaker@vromakerr400linuxmarlboro
`
`
`the EXSM was draining valid instructions from the exec ppb on a thread buffer update —
`
`fixed by
`
`adding the thread id to the ppb,
`
`then checking it to see if it is the same as
`
`the thread that's being updated before removing it (if the thread id is
`
`different then it is not
`
`removed and the drain is complete)
`
`Change 84689 on 2003/02/16 by vromaker@vromaker1400linuxmarlboro
`
`another CFS fix - this time for subroutine calls, but in general it should affect all
`flow control instructions
`
`Change 84625 on 2003/02/15 by vromaker@vromaker1400linuxmarlboro
`
`fix for loops - was using nestlevel from the register that was changed to the output
`pipe stage
`
`Change 84577 on 2003/02/14 by ygiang@ygiang+400pv2 marlboro
`
`added: more sq performance counters
`
`Change 84449 on 2003/02/14 by mmang@mmangcrayola_linuxorl
`
`Made initpred dependent upon newthread instead of first_ingroup.
`
`Change 84438 on 2003/02/14 by dougd@dougd_r400_linux_marlboro
`
`changed logic for expbufempty to used only the buffer counts and not their control
`(update) signals. This signal is used to turn off the clocks for the SP,SX and TP.
`
`Change 84436 on 2003/02/14 by dougd@dougd_r400_ linuxmarlboro
`
`added logic and wires up to sq to provide events to trigger the perfmon counters
`
`Change 84405 on 2003/02/14 by vromaker@vromaker_r400linuxmarlboro
`
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`minor updates:
`reg
`
`some comments added/removed; also removed winner_ack input
`
`from status
`
`Change 84304 on 2003/02/13 by vromaker@vromaker1400linuxmarlboro
`
`removed some commented out code from ais output; added a pipeline stage to the
`
`ctl_flow_seq and decoupled the CFS and EXEC state machines - the arbiters now issue a
`thread every four cycles
`
`Change 84229 on 2003/02/13 by ygiang@ygiang+400pv2_ marlboro
`
`added: more sq perf counters
`
`Change 84111 on 2003/02/13 by dougd@dougdr400 linuxmarlboro
`
`fixed a bug in the VGTSQ interface to allow both _indxvalid and _end_ofvector on the
`first and only data transfer of a vector. Also added a simulation only protocol monitor
`
`to detect _end_ofvector when no data at all had been sent for the vector.
`
`Change 83696 on 2003/02/11 by ygiang@ygiang+400pv2 marlboro
`
`added: more performance counters for sq
`
`Change 83645 on 2003/02/11 by hartogs@fl_hartogs
`
`Update. Testbench can run non-fetch tests.
`
`Change 83482 on 2003/02/11 by dougd@dougd_r400_linux_marlboro
`
`changed sqvtxthreadbuffer to use the status reg at stateheadptrq for events
`
`instead of always using status data_0
`
`Change 83434 on 2003/02/10 by donaldl@donaldl_crayola_linuxorl
`
`Updated nxt pos allocincr and nxt_peallocincr equations to use threadvalidgq
`
`instead of alu_req to validate them.
`
`Change 83323 on 2003/02/10 by hartogs@fl_hartogs
`
`Updated... still in progress.
`
`Change 83322 on 2003/02/10 by hartogs@fl_hartogs
`
`Added unconnected port to modules with new perfmon signals.
`
`Change 83315 on 2003/02/10 by vromaker@vromakerr400linuxmarlboro
`
`minor updates
`
`(a few comment changes,
`
`insignificant code change)
`
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`Change 83246 on 2003/02/10 by vromaker@vromakerr400linuxmarlboro
`
`fix for bug 1255 - src c z swizzle set to src c x swizzle for dot2add
`
`Change 83159 on 2003/02/09 by dougd@dougd_r400_ linuxmarlboro
`
`perfmon signals
`
`Change 83028 on 2003/02/08 by vromaker@vromakerr400linuxmarlboro
`
`fixed pos and pe alloc terms by using winnersel instead of winner_ack
`
`Change 83012 on 2003/02/07 by donaldl@donaldlcrayolalinuxorl
`
`Added next parameter cache allocation counter.
`
`Change 83008 on 2003/02/07 by vromaker@vromakerr400linuxmarlboro
`
`some kill/pred fixes
`
`Change 83001 on 2003/02/07 by dougd@dougd_r400_ linuxmarlboro
`
`rbi_addr in was shifted down by two bits incorrectly.
`
`Change 82694 on 2003/02/06 by dougd@dougd_r400_linux_marlboro
`
`brought signals up to sq for perfmon
`
`Change 82630 on 2003/02/06 by donaldl@donaldlcrayolalinuxorl
`
`Created expbufempty signal to indicate the export buffers are empty.
`This replaces the old SX-SQ export buffer interface signals with the new ones.
`
`Change 82515 on 2003/02/06 by vromaker@vromaker1400linuxmarlboro
`
`ALU IQ gpr address wrapping; MUL_CONST support; DOT2ADD fix
`
`Change 82428 on 2003/02/06 by donaldl@donaldl_crayola_linuxorl
`
`Created next position allocation counter to determine if all positions have
`
`been allocated for the previous threads.
`
`Change 82207 on 2003/02/05 by vromaker@vromakerr400linuxmarlboro
`
`tex IQ gpr address wrapping;
`
`removal of poppending logic
`
`Change 82200 on 2003/02/05 by scamlin@scamlincrayola_unixorl
`
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`forgot these fuseboxes
`
`Change 82192 on 2003/02/05 by hartogs@fl_hartogs
`
`Changed wire declaration to match associated port declaration.
`
`Change 82190 on 2003/02/05 by hartogs@fl_hartogs
`
`Changed to reflect changes in unit under test.
`
`Change 82186 on 2003/02/05 by hartogs@fl_hartogs
`
`Deleted extra comma at the end of the argument list. THis comma was creating a port
`
`mis-match during sim load.
`
`Change 82113 on 2003/02/05 by dougd@dougd_r400_ linuxmarlboro
`
`internal module signals brought up to sq level for perfmon
`
`Change 81944 on 2003/02/04 by donaldl@donaldl_crayola_linuxorl
`
`Changes for new SX-SQ export buffer availability interface.
`
`Change 81943 on 2003/02/04 by donaldl@donaldlcrayolalinuxorl
`
`Changes for new SX-SQ export buffer availability interface.
`
`Change 81893 on 2003/02/04 by dougd@dougd_r400_linux_marlboro
`
`fix bug in rt wrt logic
`
`Change 81633 on 2003/02/03 by vromaker@vromakerr400linuxmarlboro
`
`fixed alu phase for ldpred
`
`Change 81624 on 2003/02/03 by vromaker@vromaker_r400linuxmarlboro
`
`new one-clk ldpred signal
`
`Change 81559 on 2003/02/03 by vromaker@vromakerr400linuxmarlboro
`
`misc updates
`
`Change 81558 on 2003/02/03 by dougd@dougd1400 linuxmarlboro
`
`corrected a typo to the last submit
`
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`Change 81528 on 2003/02/03 by dougd@dougd_r400_ linuxmarlboro
`
`added input regs to TPSQthread_id and TPSQstall
`
`Change 81249 on 2003/02/01 by vromaker@vromaker1400linuxmarlboro
`
`misc updates - need latest merged versions of files...
`
`Change 81227 on 2003/01/31 by vromaker@vromaker1400linuxmarlboro
`
`inverted kill mask data from SP
`
`Change 81099 on 2003/01/31 by rramsey@rramseycrayola_linuxorl
`
`change arbitration policy for sq instruction store so each client has
`
`its own phase in the 8 clock cycle, with CP accesses happening
`
`opportunistically
`
`Change 80876 on 2003/01/30 by vromaker@vromakerr400linuxmarlboro
`
`pred_override update (for waterfall); instr store read requests output from CFS and TIF
`
`Change 80801 on 2003/01/30 by dougd@dougd_r400_linux_marlboro
`
`fixed typos that caused warnings in synopsys
`
`Change 80742 on 2003/01/30 by dougd@dougd_r400_ linuxmarlboro
`
`removed reset from the register for VGTsend and VGT_event to comply with convention of
`block input going only to input of one register and no gates
`
`Change 80731 on 2003/01/30 by dougd@dougd_r400_ linuxmarlboro
`
`added ati_dff_in to ROM_SPxdisablevtx, TPSQdata_rdy, TPSQtype
`
`Change 80540 on 2003/01/29 by hartogs@fl_hartogs
`
`Added S3C tracker (tbhtrk_sc)
`
`to the tbh_sqsp testbench.
`
`Change 80494 on 2003/01/29 by donaldl@donaldlcrayolalinuxorl
`
`Initial
`
`Change 80177 on 2003/01/28 by mmantor@FLmmantorLT_r400_ win
`
`got basic sc stimulas to work for sq/sp test bench and reset multipass counter during
`reset
`
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`Change 80168 on 2003/01/28 by vromaker@vromakerr400linuxmarlboro
`
`fix for 48:16 priority mux
`
`Change 80102 on 2003/01/28 by hartogs@fl_hartogs
`
`Added sc_iterator module wrapped specifically for sqsp testbench.
`
`Change 80057 on 2003/01/28 by vromaker@vromaker1400linuxmarlboro
`
`updates for mova, kill mask, absolute constants
`
`Change 79927 on 2003/01/28 by dougd@dougd_r400_linux_marlboro
`
`fixed bug in vsrldstate VSR_LD
`
`Change 79871 on 2003/01/28 by dougd@dougd_r400_ linuxmarlboro
`
`corrected range on spprddata_q[15:0]
`
`from [i]
`
`to [i-48]
`
`in for loop
`
`Change 79731 on 2003/01/27 by dougd@dougd_r400_ linuxmarlboro
`
`fixes bug where vsr_ldstate gets stuck in state VSR_LD
`
`Change 79716 on 2003/01/27 by vromaker@vromaker1400linuxmarlboro
`
`fix for thread arbiter priority encoder; updates to kill mask and predicate loading
`from SP
`
`Change 79542 on 2003/01/26 by dougd@dougd+400 linuxmarlboro
`
`added inputs irbi_rt_rd_req and address logic to support diagnostic read support for
`Real Time
`
`Change 79540 on 2003/01/26 by dougd@dougd1400 linuxmarlboro
`
`fixed typo that produced latches in synthesis
`
`Change 79498 on 2003/01/25 by vromaker@vromakerr400linuxmarlboro
`
`updates for kill mask
`
`Change 79443 on 2003/01/25 by hartogs@fl_hartogs
`
`Made two wire declarations match their associated port declarations.
`
`Change 79383 on 2003/01/24 by dougd@dougd_r400_ linuxmarlboro
`
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`changes to SQFLOWCONTROL register
`
`Change 79347 on 2003/01/24 by dougd@dougd_r400_linux_marlboro
`
`fixed bug in vgt interface (endofvtxvector can be valid when indxvalid is not)
`
`Change 78932 on 2003/01/23 by dougd@dougd_r400_ linuxmarlboro
`
`changes necessary to simulate with rf rams from latest virage compiler
`
`Change 78924 on 2003/01/23 by donaldl@donaldl_crayola_linuxorl
`
`Initial
`
`Change 78850 on 2003/01/23 by scamlin@scamlincrayolaunixorl
`
`add rtl versions
`
`Change 78849 on 2003/01/23 by scamlin@scamlin_crayola_unixorl
`
`add rtl version
`
`Change 78805 on 2003/01/23 by dougd@dougd_r400_linux_marlboro
`
`replaced latest version of this virage rf ram with the one from previous virage
`
`compiler because latest version doesn't work
`
`Change 78788 on 2003/01/23 by mmantor@mmantorcrayola_linuxorl
`
`<fixed bugs created by seperation of alloc machine and interp machine to align all data
`
`to the sx and sp interfaces and moved thread counter after delay pipe>
`
`Change 78700 on 2003/01/22 by vromaker@vromakerr400linuxmarlboro
`
`fixes for predset/kill; texarbpolicy added
`
`Change 78428 on 2003/01/22 by scamlin@scamlin_crayola_unixorl
`
`virage a04 new register files
`
`Change 78427 on 2003/01/22 by scamlin@scamlin_crayola_win
`
`mod for a04
`
`Change 78248 on 2003/01/21 by hartogs@fl_hartogs
`
`Updated for VGT and RBBM stimulus.
`
`Updated for changes in unit under test.
`
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`Change 78247 on 2003/01/21 by hartogs@fl_hartogs
`
`Added this port to the instance “uscalar" to file sp/vector/spvector.v.
`
`
`
`
`-OPREDSETEXECUTE(),
`// TODO -- added unconnected output port to avoid
`warnings during sim load
`
`
`
`Apparently the spscalarlut module added an output port
`
`(single bit).
`
`Als