`
`Regen with new genperfcode
`
`Change 92454 on 2003/03/27 by rramsey@rramseycrayolalinuxorl
`
`add reset for mp_snd and mp_loop regs
`
`Change 92356 on 2003/03/27 by smoss@smoss_crayola_linux_orl
`
`removed space limiting on mismatch display
`
`Change 91348 on 2003/03/20 by kmeekins@kmeekins_crayola_linux_orl
`
`Changed to use the default filenames created by build scripts.
`
`Change 91177 on 2003/03/20 by donaldl@fl_donaldl_p4
`
`Removed IO_SC and IO_SC_B partition scan input/output signals.
`
`Change 90931 on 2003/03/19 by kmeekins@kmeekins_r400_win
`
`Changed the ROM_BADPIPEDISABLEREGISTER logic to only check those
`disable bit fields associated with pixel processing.
`
`Change 90807 on 2003/03/18 by donaldl@fl_donaldl_p4
`
`Added common test ports.
`
`Change 90308 on 2003/03/14 by kmeekins@kmeekins r400win
`
`Conditioned the usepolymode_grad mux select with the Real-Time
`stream enable such that the stored polymode gradient is never used
`
`during RTS. The dx and dy gradients are supplied during RTS so using
`the stored value is not necessary.
`
`Change 90029 on 2003/03/13 by kmeekins@kmeekins_r400_win
`
`Created script to convert Modelsim .do wave files to nWave .re files.
`
`Change 89510 on 2003/03/11 by kmeekins@kmeekins_r400_win
`
`Changed compareScSq to not compare pixel mask on events or dealloc.
`
`Change 88833 on 2003/03/06 by donaldl@fl_donaldlp4
`
`Wrapper around ati_lrpstatestorage to register RBIU interface signals.
`
`AMD1044_0254047
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`
`Change 88830 on 2003/03/06 by donaldl@fl_donaldl_p4
`
`Delayed by 1 clk some of RBIU inputs/outputs to state storage modules (ie. w_addr[2:0],
`we, sel, cp, w_data[31:0], r_addr[2:0], re, r_data[31:0]). Done to reduce large fanout
`in post layout netlist.
`
`Change 88560 on 2003/03/05 by rramsey@RRAMSEYP4r400win
`
`only look at lower 5 bits of rbbm write data to get event
`
`id
`
`Change 88556 on 2003/03/05 by kmeekins@kmeekins_r400win
`
`Modified quad select out and quad pair proc out trackers and dump
`
`routines to handle and additional vector generation for last quad
`
`pair of prim.
`
`Change 88094 on 2003/03/03 by rramsey@RRAMSEY_P4r400win
`
`Fix a bug related that was allowing non-rts/rts quads to get packed with rts/non-rts
`quads when the switch happened with a quad in the overflow buf
`
`Change 87945 on 2003/03/02 by donaldl@donaldl_crayola_unix_orl
`
`Fanout of state variable indices to help post layout timing.
`
`Change 87944 on 2003/03/02 by donaldl@fl_donaldl_p4
`
`Fanout of state variable indices to help post layout timing.
`
`Change 87649 on 2003/02/28 by rramsey@RRAMSEYP4r400win
`
`fix a problem with the sc_sq rt tracker
`
`Change 86893 on 2003/02/25 by donaldl@donaldl_crayola_unixorl
`
`Reduce critical path of XY3 to meet post layout timing.
`
`Change 86892 on 2003/02/25 by donaldl@fl_donaldl_p4
`
`Reduce critical path of XY3 to meet post layout timing.
`
`Change 86888 on 2003/02/25 by rramsey@RRAMSEYP4 r400win
`
`Make packer and sq rts trackers compare an entry for each of fpos, event, hit quads,
`and dealloc
`
`Add monitors for sc_sq and packer output
`
`AMD1044_0254048
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`
`Clean up a couple of things in the vsim scripts
`
`Change 85939 on 2003/02/21 by kmeekins@kmeekins r400win
`
`Modified compareScSx task to handle differences between the dmp file
`write order and the RTL.
`
`Change 85903 on 2003/02/21 by scamlin@scamlin_crayola_unix_orl
`
`changed width
`
`Change 85595 on 2003/02/20 by scamlin@scamlincrayola_unixorl
`
`added testreg
`
`Change 84525 on 2003/02/14 by danh@danh_r400win
`
`Added z_interp_jss_ enable.
`
`Change 84488 on 2003/02/14 by rramsey@rramseycrayola_linuxorl
`
`Add pixel-per-quad perfcounters to SC RTL
`
`Change 84255 on 2003/02/13 by kmeekins@kmeekins r400win
`
`Reset vq_visible_status registers to match emulator results.
`
`Change 83897 on 2003/02/12 by rramsey@FL_RAMSEY_r400_win
`
`Don't compare tile x/y for events
`
`update rand script to check for both done msgs (rt and non rt)
`
`Change 83821 on 2003/02/12 by kmeekins@kmeekins r400win
`
`Added control logic to handle tests where CONTEXT_DONE event issued
`but never any state loaded for that context
`(2D prims).
`
`Change 83575 on 2003/02/11 by kmeekins@kmeekins_ r400win
`
`Modifed the test for incomplete results.
`
`Change 83337 on 2003/02/10 by kmeekins@kmeekins r400win
`
`Added checks for incomplete files that look for multiple files
`
`compared for a single dump file. Real-Time stream trackers now
`
`generate two compare results per dump file.
`
`Change 83210 on 2003/02/10 by smoss@smoss_crayolalinuxorl
`
`AMD1044_0254049
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`
`removed rom_sc
`
`Change 83079 on 2003/02/08 by smoss@smoss_crayola_linuxorlregress
`
`fixed starved condition where sc was waiting for change of context from suscan
`permanently
`
`Change 82995 on 2003/02/07 by rramsey@rramsey_crayola_linux_orl
`
`stipple fixes related to realtime stream interruptions
`
`Change 82991 on 2003/02/07 by rramsey@RRAMSEY_P4_r400_win
`
`Don't compare stipple values for realtime prims since there is no way to know when the
`rt prim will
`
`break in, and the rt tiles will inherit the stipple values that happen to be sitting in
`
`cur_ptr/cur_cnt
`at that time
`
`Change 82943 on 2003/02/07 by kmeekins@kmeekins r400win
`
`Added condition to permit certain events to pass PA_SC even if their
`context has yet to be loaded. Allows flush event to pass to SQ so
`RBBM flush can terminate to permit context loading.
`
`Change 82942 on 2003/02/07 by kmeekins@kmeekins r400win
`
`Added file not empty condition to loop to prevent accidental
`
`compare of last vector in file.
`
`Change 82565 on 2003/02/06 by kmeekins@kmeekins r400win
`
`Cleaned up flush operations.
`Fixed rbbm read operations.
`
`Added debug counter to rbbm writes.
`
`Change 81919 on 2003/02/04 by kmeekins@kmeekins_ r400win
`
`Added synchronizing logic to prevent the SC from flushing when
`
`it sees a PA_SC flush event prior to reading the same flush event
`on the RBBM bus.
`
`Change 81873 on 2003/02/04 by kmeekins@kmeekins r400win
`
`Rewrote testbench to recognize,
`
`implement and control the pipe flush
`
`commands and data flow control in both the RBBM and PA_SC
`interfaces.
`
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`
`
`Change 81036 on 2003/01/31 by viviana@viviana_crayola_linux_orl
`
`Incorporated the SC_SP_PATH define inside of a specific ‘define for GCTEST, CHIP TEST
`and Block level tests.
`
`Change 80866 on 2003/01/30 by viviana@viviana_crayola_linux_orl
`
`Took out the ‘define sc_blocksim and added it to the command line in buildtb and
`Makefile.
`
`Change 80540 on 2003/01/29 by hartogs@fl_hartogs
`
`Added SC tracker (tbtrk_sc)
`
`to the tbsqsp testbench.
`
`Change 80304 on 2003/01/29 by smoss@smoss_crayola_linux_orl_regress
`
`<Orlando Hardware Regression Results >
`
`Change 80177 on 2003/01/28 by mmantor@FLmmantorLT_r400win
`
`got basic sc stimulas to work for sq/sp test bench and reset multipass counter during
`reset
`
`Change 80101 on 2003/01/28 by kmeekins@kmeekins r400win
`
`Changed the bad pipe logic
`
`- Removed use of rom_sc.dmp
`- Pipe disable controlled by RBBM data bus
`
`- Removed rom_scfilenot_empty from "simulation complete" testing
`Added pipe flush logic
`
`- Snoop the RBBM bus for flush commands
`- Freeze RBBM bus
`
`- Stop PA_SC data xfer
`Reformated signal definitions and added comments
`
`Optimized tbmod_sc_rbbm task
`
`Change 79904 on 2003/01/28 by donaldl@fl_donaldl_p4
`
`Checked in wrong bvrl file for previous change.
`
`Change 79837 on 2003/01/27 by mmantor@FLmmantorLTr400win
`
`improve timing path for iter_cmd_wdata path in the iterator
`
`Change 79536 on 2003/01/26 by smoss@smoss_crayola_linux_orl_regress
`
`added rts dumps now generated by emulator
`
`AMD1044_0254051
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`
`Change 79141 on 2003/01/24 by smoss@smoss_crayola_linux_orl_regress
`
`changed atipli to tb_utils
`
`Change 78687 on 2003/01/22 by smoss@smoss_crayola_linux_orl_regress
`
`<Orlando Hardware Regression Results >
`
`Change 78533 on 2003/01/22 by rramsey@RRAMSEY_P4 r400_win
`
`Another try to fix context management in tbsc
`
`Change 78424 on 2003/01/22 by rramsey@RRAMSEYP4 r400win
`
`last check in didn't seem to revert the change,
`
`try it again
`
`Change 78423 on 2003/01/22 by rramsey@RRAMSEYP4 r400win
`
`Go back 1 revision
`
`Change 78280 on 2003/01/21 by kmeekins@kmeekins_ r400_win
`
`Added a second register delay for cntx0 to allign with SP data.
`
`Using ~SC_SP_PATH.usc_biter.iterspout_en as an enable for passing
`the context.
`
`Change 78270 on 2003/01/21 by smoss@smoss_crayola_linux_orl_regress
`
`set context loaded flag when context done is seen
`
`Change 78237 on 2003/01/21 by kmeekins@kmeekins r400win
`
`Cleaned up fifo interface.
`
`Removed unused signal.
`
`sc_gqdpr_proc.v
`
`Changed wait_for_rl logic.
`
`Change 77980 on 2003/01/20 by smoss@smoss_crayola_linux_orl_regress
`
`added sc_stdrfsdks2p28x69cm2sw0_rtl.v memory instead of gate sim mem that was being
`used by default
`
`Change 77974 on 2003/01/20 by donaldl@fl_donaldlp4
`
`AMD1044_0254052
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`
`
`Fixed typo - use rtl mem version of itercmdfifo for rtl sims instead of gate version.
`
`Change 77878 on 2003/01/20 by scamlin@scamlin_crayola_win
`
`mod for a04
`
`Change 77838 on 2003/01/20 by smoss@smoss_crayola_linux_orl_regress
`
`new dump
`
`Change 77525 on 2003/01/17 by scamlin@scamlincrayola_unixorl
`
`AO4
`
`Change 77498 on 2003/01/17 by rramsey@RRAMSEY_P4 r400_win
`
`Incorporate RTS dump routines into emulator, don't need to run createrts dumps.pl
`anymore
`
`Fix readback of pa_scfifosize to only return lower 16 bits
`
`Remove call to create_rts_dumps.pl
`
`from run_vsim scripts
`
`Fix prints in gqdpr_proc/out_compare to have identify correct tracker
`
`Fix a problem with stipple rpt cnt
`
`loads in r400sc_rand
`
`Add runtime comment to rand_rd00sc.sh
`
`Change 77443 on 2003/01/17 by smoss@smoss_crayola_linux_orl_regress
`
`Add end_of context to cntx_event since end of state cant go until it's state is
`loaded
`
`Change 76872 on 2003/01/15 by rramsey@rramseycrayolalinuxorl
`
`Update to new version of genperfcode
`
`Change 76810 on 2003/01/15 by fhsien@fhsien_r400linuxmarlboro
`
`Change MESALL parameter to OFF
`
`Change 76802 on 2003/01/15 by scamlin@fl regress p4j_crayolawin
`
`Change 76779 on 2003/01/15 by rramsey@RRAMSEY_P4 r400_win
`
`Fix assignment problem
`
`AMD1044_0254053
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`
`
`Change 76772 on 2003/01/15 by kmeekins@kmeekins r400_win
`
`Increased depth of q[0-3] fifos to 128 words.
`
`Change 76483 on 2003/01/14 by kmeekins@kmeekins_crayola_linux_orl
`
`Modified code to fix LEDA warnings and errors.
`
`Change 76347 on 2003/01/13 by kmeekins@kmeekins_ r400win
`
`Corrected sensitivity lists.
`Fixed LEDA errors.
`
`Changed tap points for control signals headed to sc_b.
`
`sc_biter.v
`
`Added register delay to one_clk_cmd_reg.
`Corrected connections to get sp_interfacefull signal
`the same signal in se_iter.
`
`in syne with
`
`Change
`
`75894 on 2003/01/10 by
`
`viviana@viviana_crayola_linux_orl
`
`Change
`
`to be able to read all
`
`context registers.
`
`Change
`
`75722 on 2003/01/10 by
`
`scamlin@scamlin_crayola_win
`
`virage
`
`star unit test works
`
`Change
`
`75015 on 2003/01/07 by
`
`kmeekins@kmeekins r400win
`
`Added debug option to each dump to print corresponding line number
`of parent dump file.
`
`Change 75013 on 2003/01/07 by kmeekins@kmeekins_r400_win
`
`Added comments.
`
`Change 74870 on 2003/01/07 by viviana@viviana_crayola_linux_orl
`
`Added a ‘define called sc_block_sim to be able to use the tracker in the chip sim
`without any io.
`
`Change 74849 on 2003/01/07 by mmantor@mmantor_crayola_linux_orl
`
`<Remove the conditioning by sq_interfacefull of control signals being read from
`
`AMD1044_0254054
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`
`
`itercmdfifo in the interface counter processes because the signals are appropriately
`
`conditioned by itercmdfifo_re. This fixes a bug with interface counters created by a
`change to improve interface perfomance.
`>
`
`Change 74789 on 2003/01/06 by kmeekins@kmeekins r400win
`
`Changed mask on all RBBM address busses to look at all 17 bits.
`
`Change 74781 on 2003/01/06 by smoss@smoss_crayola_linux_orl_regress
`
`Add vgt_dma_base and vgt_dma_size to regs that are allowed in when the
`contextloaded bit is set
`
`Change 74452 on 2003/01/03 by smoss@smoss crayolalinuxorlregress
`
`removed rbbmrd
`
`Change 74309 on 2003/01/03 by viviana@viviana_crayola_linuxorl
`
`Removed the use of rbbmRd.dmp in VCS to using only rbbm.dmp.
`
`Change 74193 on 2003/01/02 by kmeekins@kmeekins_ r400_win
`
`Corrected filename in CompareVec_MT parameters for comparePixVecGrpOut.
`
`Change 74186 on 2003/01/02 by kmeekins@kmeekins_r400win
`
`Okay, so I mispelled the filename. It is really fixed this time...
`
`Change 74183 on 2003/01/02 by kmeekins@kmeekins r400win
`
`Corrected filename in CompareVecMT parameters for compareQdprProcOut tracker.
`
`Change 74066 on 2003/01/02 by smoss@smoss_crayola_linux_orl
`
`modified tracker to initialize fifos_not_empty signal in case task is not called
`
`Change 73878 on 2002/12/31 by donaldl@fl_donaldl_p4
`
`Make same sc_iter change of nxt_sp_interfacefull to sc_biter. Need to also add
`interface signal sc_b_eopv from sc to sc_b.
`
`Change 73786 on 2002/12/30 by kmeekins@kmeekins r400win
`
`out_compare.v
`
`- Corrected the trackers to work with the new RTS formats for:
`
`sc_quad_select_out_rts.dmp, sc_quadpairprocout_rts.dmp, and
`
`AMD1044_0254055
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`
`
`sc_pix_vec_grpout_rts.dmp.
`
`- Modifed calls to trackers to use the newer RTS formats.
`
`- Fixed FIFO not empty warning for fill quads by checking the FIFO
`status as part of the simulation terminating condition.
`
`tbtrk_sc.v
`
`- Removed FIFO not empty warning for fill quads.
`
`- Simulation will now continue and read remaining fill quads from
`
`FIFO before terminating simulation. Non fill reads will result in
`errors.
`
`Change 73782 on 2002/12/30 by kmeekins@kmeekins r400win
`
`Changed sc_pixgrpout_rts.dmp file to write End of Prim messages.
`
`Added column to sc_pix_grp_out_rts.dmp show the corresponding line
`
`number in sc_pixgrp_out.dmp.
`
`Change 73725 on 2002/12/30 by donaldl@fl_donaldl_p4
`
`Decreased the input delays on those inputs with negative slack so MC can work harder on
`internal violations.
`
`Change 73723 on 2002/12/30 by donaldl@donaldl_crayola_unixorl
`
`Decreased the input delays on those inputs with negative slack so
`MC can work harder on internal violations.
`
`Change 73475 on 2002/12/27 by rramsey@FLRAMSEYr400win
`
`Move ‘endif to correct spot
`
`Change 73474 on 2002/12/27 by rramsey@RRAMSEY_P4_ r400_win
`
`tbh_sc.v -
`Add monitor for sc_sp interface
`Add instance of sctbtrk_perfent
`
`scdefines.v -
`
`Add CHECK_PERFCOUNT define
`
`sctbtrkperfent.v -
`Fix typo
`
`Change scripts to use tcsh instead of sh when running vsim.
`
`tcsh seems to behave better
`
`AMD1044_0254056
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`
`
`when vsim crashes and lets the random run continue.
`
`Change 73398 on 2002/12/26 by rramsey@FLRAMSEYr400win
`
`One last cleanup for perfent tracker
`
`Change 73397 on 2002/12/26 by rramsey@FL_RAMSEYr400win
`
`Modify sctbtrk_perfcnt to compile with older modelsim
`Add sctbtrk_perfcnt back to makefile
`
`Change 73247 on 2002/12/23 by mmantor@fl mmantorxpr400win
`
`added 4 ij buffers availabiltiy and made changes in the sc_iterator to allow sending
`sq/sx data on the same clock as recieving free buff to run 1 interpolant at rate
`
`Change 73223 on 2002/12/23 by rramsey@FL_RAMSEYr400win
`
`remove sctbtrkperfent since older modelsim does not like 2d arrays
`
`Change 73222 on 2002/12/23 by rramsey@RRAMSEYP4 r400win
`
`tracker for sc perfcounters
`
`Change 73221 on 2002/12/23 by rramsey@RRAMSEYP4 r400win
`
`Fix perfcounters:
`sc_pipe was using wrong lat version of min/max for scis_ discard
`detail_mask was sending out wrong state id to perf_cntl
`Fix Makefile
`
`change sc_stdrfsdks2p24x69cm2sw0_rtl
`
`to sc_stdrfsdks2p28x69cm2sw0
`
`add sctbtrk_perfent
`Add tracker for sc performance counters
`
`Change 73125 on 2002/12/23 by rramsey@rramseycrayola_linux_orl
`
`Update with latest version of simulation only counters
`
`Change 73050 on 2002/12/21 by scamlin@scamlin_crayola_unix_orl
`
`updated sc_intercmd_fifo depth to 28
`
`Change 72845 on 2002/12/20 by mmantor@FLmmantorLT_r400win
`
`fixed a problem for sp_interfacebufcnt when changing from center or centroid only
`processing to centers and centroids and 3 buffers are in use, a double buffer load
`
`caused overflow, and thus data corruption. This change only allows a double buffer
`load to occur when there are at least two buffers available
`
`AMD1044_0254057
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`
`
`Change 72705 on 2002/12/20 by rramsey@rramseycrayola_linux_orl
`
`update with for new genperfcode version (1.3)
`
`Change 72465 on 2002/12/19 by rramsey@RRAMSEY_P4_ r400_win
`
`Add parsing for quad_select and quad_pairproc
`
`Change 72459 on 2002/12/19 by kmeekins@kmeekins r400win
`
`Removed "End of Vector" from the scpixvec_grpout_rts.dmp header.
`
`Change 72450 on 2002/12/19 by rramsey@RRAMSEYP4 r400win
`
`immed data to regs that are allowed in when the context_loaded
`Add vgt
`bit is set
`
`Change 72421 on 2002/12/19 by donaldl@fl_donaldlp4
`
`Updated to work with gate sims (ie.
`
`to access signals existing in both rtl and gates).
`
`Change 72404 on 2002/12/19 by donaldl@fl_donaldl_p4
`
`Fixed typo for accessing tbtrk_sc signal.
`
`Change 72375 on 2002/12/19 by rramsey@RRAMSEYP4 r400win
`
`Change DISABLERBBMFILTER default to 1 so we don't filter transfers at our input
`
`Change 72373 on 2002/12/19 by rramsey@RRAMSEY_P4 r400_win
`
`Add pa_scfifosize to rbbm input filter
`
`Change 72165 on 2002/12/18 by rramsey@RRAMSEYP4r400win
`
`Add sc_pix_vec_grpout_rts.dmp
`
`Change 72155 on 2002/12/18 by kmeekins@kmeekins_r400win
`
`Added “include" file dependencies.
`
`Change 72153 on 2002/12/18 by smoss@smoss_crayola_linux_orl_regress
`
`adding rom_se
`
`Change 72116 on 2002/12/18 by viviana@viviana_crayola_linux_orl
`
`AMD1044_0254058
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`
`
`Initialized TST_SC_rfstar_p1500 to 6 bits of zero instead of 5 bits.
`
`Change 72110 on 2002/12/18 by viviana@viviana_crayola_linuxzorl
`
`Moved sc_sq2ndclock, sc_sq_lst_clock and sc_sqlst_clk_vq to tbtrk_sc.v from tbh_sc.v
`and
`
`all the logic around these signals.
`
`Change 72076 on 2002/12/18 by kmeekins@kmeekins r400win
`
`Makefile
`
`Changed make dependency for tb_sc to included build rules for the
`tbtrksc.v
`
`tbtrk_sc.v
`
`Included sc_header.v to resolve unknown macro errors/warnings.
`
`Change 72044 on 2002/12/18 by donaldl@fl_donaldlp4
`
`Update coarse walker conditions for gates since first_tile_of_prim_sl no longer exists
`in gates.
`
`Change 72023 on 2002/12/18 by grayc@graycr400win
`
`created tbtrksc
`
`Change 72000 on 2002/12/18 by mmantor@FL_mmantorLT_r400win
`
`moved rom_sc dump file to after a primitive was received so that it could dump current
`
`state.
`
`Removed some unused signals from sc_packer
`
`Change 71840 on 2002/12/17 by rramsey@RRAMSEYP4 r400win
`
`Add PA_SC_FIFO_SIZE to rbiu decode, state block
`
`Change sc_primfifo and sctilefifo to progdepth fifos
`
`Change 71793 on 2002/12/17 by smoss@smoss_crayola_linux_orl_regress
`
`add rbbmRd
`
`Change 71788 on 2002/12/17 by viviana@viviana_crayola_linux_orl
`
`Moved tb_sc_sp_cntx0 from tb_sc.v to tbtrk_sc.v. Also added the ‘ifdef GATES
`statements
`
`to sc_defines.v.
`
`AMD1044_0254059
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`
`Change 71774 on 2002/12/17 by viviana@viviana_crayola_linux_orl
`
`Moved the out_compare.v functions to tbtrk_sc.v and moved all the compare code
`from tb_sc.v to tbtrk_sc.v so that it can be used at the chip level. Also added
`
`sc_defines.v which is included in tb_sc.v and tbtrk_sc.v with all the ‘defines.
`
`Change 71729 on 2002/12/17 by smoss@smoss_crayola_linux_orl_regress
`
`removed file that depends on conditional
`
`Change 71726 on 2002/12/17 by rramsey@RRAMSEY_P4 r400win
`
`tbhsc.v -
`Add control to hold off perfcount reads until the end of the sim
`
`sctbtrkrbbmrd.v -
`Make mismatch report look like others so scripts can catch it
`
`detail_accum -
`
`Fix stateid output to perfcntl block
`pipe -
`
`Fix supertdiscard output to perfcntl block
`
`Change 71690 on 2002/12/17 by donaldl@fl_donaldl_p4
`
`Updated to handle gate-level sims.
`
`Change 71686 on 2002/12/17 by donaldl@fl_donaldl_p4
`
`Added option to compile for gate-level sims.
`
`Change 71504 on 2002/12/16 by kmeekins@kmeekins r400win
`
`sctbtrkrbbmrd.v
`
`Converted InitVec and GetVec to Multi-Threaded calls so that we
`
`no longer need a separate rbbmRt.dmp file.
`
`Enabled the RBBM tracker.
`
`Change 71488 on 2002/12/16 by kmeekins@kmeekins_r400_win
`
`Makefile
`
`Changed %.mkv pattern rules to permit searching the current
`
`directory for source files.
`
`tbhsc.v
`
`AMD1044_0254060
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`- Commented out ‘define ENABLERBBMTRACKER since rbbm_Rd.dmp file
`is not automatically created and is needed for the tracker.
`
`- Added compile option RT_RANDOM to disable random generation of
`
`times we can inject RT_INITIATOR interrupts.
`
`Change 71452 on 2002/12/16 by kmeekins@kmeekins_r400win
`
`- Added logic to randomize where we interrupt processing a primitive
`
`to inject the Real-Time stream initiator.
`
`- Cleaned up the condition for generating a watchdog timeout.
`
`Change 71375 on 2002/12/16 by smoss@smoss_crayola_linux_orl_regress
`
`enabled rbbm_tracker removed rom_se from test.cfg
`
`Change 71370 on 2002/12/16 by kmeekins@kmeekins_r400win
`
`Expanded character field to display entire compare message.
`
`Change 71109 on 2002/12/13 by mmantor@mmantor_r400win
`
`fixed lint errors
`
`Change 70771 on 2002/12/12 by viviana@viviana_crayola_linux_orl
`
`Turned off “ENABLERBBMTRACKERS.
`
`Change 70769 on 2002/12/12 by viviana@viviana_crayola_linux_orl
`
`Declared rbbm_filenum as an integer inside tbmod_sc_rbbm.
`
`Change 70712 on 2002/12/12 by smoss@smoss crayolalinuxorlregress
`
`<Orlando Hardware Regression Results >
`
`Change 70690 on 2002/12/12 by viviana@viviana_crayola_linux_orl
`
`Changed the rbbmrd tracker to a module and deleted the old sc_rbbmrd_out_compare
`function.
`
`Change 70134 on 2002/12/10 by donaldl@fl_ donaldlp4
`
`Mems for gate-level sims.
`
`Change 70050 on 2002/12/10 by kmeekins@kmeekins r400win
`
`- Removed unused code.
`
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`
`-— Corrected the handeling of passing the compare file status upon
`
`re-entering the compareScSp task.
`
`Change 69957 on 2002/12/10 by viviana@viviana_crayola_linux_orl
`
`Replaced a sensitivity list separated by commas to separated by or to run on VCS.
`
`Change 69930 on 2002/12/10 by rramsey@RRAMSEYP4 r400win
`
`Emulator -
`
`Update rce_sc dump to contain stateId, needed for rt trackers
`tbsc.v -
`
`Modify rce_sc injector to work with new dump format
`Add monitor for re_se interface
`
`Add monitor for sc_quad_select data
`
`Change 69831 on 2002/12/09 by mmantor@FL_mmantorLT_r400win
`
`added a 2 deep fifo to decouple timing.
`
`Change 69807 on 2002/12/09 by mmantor@FL_mmantorLT_r400win
`
`fixed typo for non real sp time trackers to work
`
`Change 69756 on 2002/12/09 by scamlin@scamlin_crayola_unixorl
`
`update memory
`
`Change 69739 on 2002/12/09 by rramsey@RRAMSEY_P4 r400_win
`
`createrts dumps.pl -
`
`Fix bug with dumps created with bad_pipe bits set
`
`out_compare.v -
`
`Disable highest level compareempty failure when running in RT mode since fill quad
`rows can be sent after
`
`the compare file goes empty
`
`Change 69723 on 2002/12/09 by mmantor@FLmmantorLT_r400_win
`
`typo
`
`Change 69647 on 2002/12/09 by mmantor@FLmmantorLTr400win
`
`added replicated gqd0 and gdl hit signals to sc packer
`
`Change 69635 on 2002/12/09 by rramsey@RRAMSEY_P4 r400_win
`
`Add ability to save off standalone vectors to run on linux for coverage
`
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`
`Update sc regress status
`
`Change 69632 on 2002/12/09 by rramsey@RRAMSEYP4 r400win
`
`SC timing fixes
`
`Change sc_rbiu srst input to a registered version
`
`Split hier_mask_sum into two clks in sc_perf_cntl
`Register samplemask outputs in sc_qdpr_proc
`Make q0/1_hit output from qdpr_proc 5 bits to help with fanout
`
`Change 69629 on 2002/12/09 by kmeekins@kmeekins r400win
`
`Increased quad FIFO depth.
`Removed unwanted tasks.
`
`Change 69243 on 2002/12/06 by smoss@smoss_crayola_linux_orl_regress
`
`changed for real time streams on Linux
`
`Change 69234 on 2002/12/06 by kmeekins@kmeekins r400win
`
`- Added support for Real-Time streams to the SC_SQ, SC_SX, and SC_SP
`interfaces.
`
`- Added a FIFO on the SC_RC interface to track the context id across
`the interface to retreive the correct RC_SC data thread.
`
`out_compare -V
`
`- Major changes to the compareScSq, compareScSx, and compareScSp
`
`routines to support Real-Time stream multi-threading.
`
`- Added an include of sc_asynecfifos.v for RT streams.
`
`Change 69168 on 2002/12/06 by kmeekins@kmeekins_ r400win
`
`sc_async_fifos.v
`
`Separate tasks used to simulate asynchronous FIFOs the TBSC
`trackers need to test the interleaving of Real-Time and NonReal-time
`streams.
`
`Makefile
`
`Added the sc_async_fifos.v dependency to tb_sc.v
`
`Change 69167 on 2002/12/06 by kmeekins@kmeekins r400win
`
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`
`Corrected generation of the ScSq header.
`
`Change 69165 on 2002/12/06 by kmeekins@kmeekins r400win
`
`Added support for checking Real-Time vectors.
`
`Change 68983 on 2002/12/05 by mmantor@FL_mmantorLT_r400_win
`
`bug with realtime streams interupting a polygon with fpos and the end of real time
`
`primitive killing the memory that fpos has already been sent.
`
`Change 68882 on 2002/12/05 by donaldl@fl_donaldl_p4
`
`Reassigned primdata and quad data widths/definitions so lsbs line up sequentially with
`
`data going to sc_b.v.
`
`Change sc_biterphase[2:0] to sc_biterphase_1lsb since only bit 0 is need in sc_b.v.
`
`Change 68769 on 2002/12/05 by scamlin@scamlin_crayola_unix_orl
`
`timing fix
`
`Change 68752 on 2002/12/05 by mmantor@FLmmantorLTr400win
`
`stage removal of unused ports on sc and sc_b
`
`Change 68725 on 2002/12/05 by mmantor@FL_mmantorLT_r400win
`
`removed sc_rc_wakeup since re is not using
`
`Change 68700 on 2002/12/05 by rramsey@RRAMSEYP4 r400win
`
`Fix some lint warnings for se rtl
`
`Cover lclk hole in busy cnt decrements from qdpr_proc
`
`Change 68510 on 2002/12/04 by mmantor@FLmmantorLT_r400_win
`
`timing
`
`Change 68480 on 2002/12/04 by rramsey@RRAMSEYP4 r400win
`
`Fix case where we missed marking an empty_prim because the result of start/end
`subtract/add wrapped
`
`Change 68426 on 2002/12/04 by mmantor@FL_mmantorLT_r400_win
`
`AMD1044_0254064
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`more timing improvements
`
`Change 68335 on 2002/12/04 by kmeekins@kmeekins r400win
`
`Initialized sq_lod so its output is non-null if Event is the lst vector.
`
`Change 68201 on 2002/12/03 by viviana@viviana_crayola_linux_orl
`
`Changed the Comparison to === instead of ==.
`
`Change 68198 on 2002/12/03 by viviana@viviana_crayola_linux_orl
`
`Added the rtl models of the Virage Memories to the buildtbh script.
`
`Change 68165 on 2002/12/03 by donaldl@fl_donaldl_p4
`
`Updated to compile with real mem rtl (instead of behavioral).
`
`Change 68163 on 2002/12/03 by donaldl@fl_donaldlp4
`
`Increased iter cmd fifo depth from 23 to 24. Real mems require even depth.
`
`Change 68111 on 2002/12/03 by scamlin@scamlin_crayola_unix_orl
`
`update memory size
`
`Change 68105 on 2002/12/03 by rramsey@RRAMSEYP4 r400win
`
`Add readback for PA_SC_LINECNTL.expand_linewidth. This bit is only used in the pa,
`but is shadowed for readback in the sc.
`
`Change 68079 on 2002/12/03 by scamlin@scamlin_crayola_unix_orl
`
`change itercmdfifo memory from 22 to 24 deep
`
`Change 68067 on 2002/12/03 by mmantor@FLmmantorLT_r400win
`
`timing improvement
`
`Change 68054 on 2002/12/03 by rramsey@RRAMSEYP4 r400win
`
`Add iteratorstall as enable condition for mpass regs
`
`Change 68053 on 2002/12/03 by rramsey@RRAMSEY_P4 r400_win
`
`Update status
`
`Change 68041 on 2002/12/03 by rramsey@RRAMSEYP4r400win
`
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`
`Add running of create_rts_dumps.pl
`files are created automatically
`
`to sce regression scripts so RTS versions of dump
`
`Change 67972 on 2002/12/02 by viviana@viviana_crayola_linux_orl
`
`The function to compare the RBBM reads for the sc.
`
`Change 67848 on 2002/12/02 by mmantor@mmantorr400win
`
`change for timing improvement
`
`Change 67640 on 2002/11/29 by mmantor@FL_mmantorLT_r400_win
`
`moved ‘define USESC_B to header file so it is defined for every one
`
`Change 67639 on 2002/11/29 by mmantor@FLmmantorLT_r400win
`
`fixed port mismatch typo
`
`Change 67554 on 2002/11/29 by smoss@smoss_crayola_linux_orl_regress
`
`removed coverage
`
`Change 67412 on 2002/11/27 by grayc@chipregressorl
`
`added define for sc_b
`
`Change 67366 on 2002/11/27 by donaldl@donaldl_crayola_unix_orl
`
`No change.
`
`Change 67363 on 2002/11/27 by mmantor@mmantorr400win
`
`changes for timing improvements
`
`Change 67362 on 2002/11/27 by donaldl@donaldl_crayola_unix_orl
`
`Added oRC_WAKEUP going to RC block.
`
`Change 67351 on 2002/11/27 by donaldl@fl_donaldl_p4
`
`Added wake-up output signals going to SX's, SP's, SQ, and RC external blocks.
`
`Change 67284 on 2002/11/27 by donaldl@fl_donaldl_p4
`
`Added delay chain and scan I/O to sc_b.v.
`
`AMD1044_0254066
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`
`
`Added fusebox to sc.v.
`
`Change 67235 on 2002/11/27 by scamlin@scamlin_crayola_unixorl
`
`fusebox
`
`Change 67153 on 2002/11/27 by mmantor@mmantorr400win
`
`timing fixes for sc_packer.v
`
`Change 67045 on 2002/11/26 by rramsey@RRAMSEY_P4_ r400_win
`
`Add run_vsim_emu.pl —
`This script runs emu vs rtl (vsim)
`
`regressions on a list of
`
`emulator tests specified in the config file. It runs the
`
`emulator to create fresh vectors, copies them to TBSC/tbfiles,
`and then runs the rtl sim
`
`Add test_emu.cfg -
`
`Example config file for run_vsim_emu.pl
`
`Change 67044 on 2002/11/26 by rramsey@RRAMSEYP4 r400win
`
`Correct GFX_COPYSTATE decode in sc_perfmon
`Remove unused signal
`from sc_perf_cntl
`Change tbh_sc to use draw_inits/context_events for context management
`
`Change 67023 on 2002/11/26 by scamlin@scamlin_crayola_unixorl
`
`typo
`
`Change 67012 on 2002/11/26 by smoss@smoss_crayola_linux_orl_regress
`
`<Orlando Hardware Regression Results >
`
`Change 66994 on 2002/11/26 by viviana@viviana_crayola_linux_orl
`
`Added the ati_delay block and two IO pins to the se and tb_sc.v.
`
`Change 66978 on 2002/11/26 by donaldl@fl_donaldl_p4
`
`Send sc_clk_en from sc.v to sc_b.v for clock gating in sc_b.
`
`Change 66922 on 2002/11/26 by donaldl@fl_donaldl_p4
`
`Replaced “ifndef constructs with “ifdef-‘else since ifndef doesn't work in V2KS.
`
`Change 66808 on 2002/11/25 by mmantor@mmantorr400win
`
`AMD1044_0254067
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`
`
`some packer fixes to make it fully functional
`
`Change 66801 on 2002/11/25 by donaldl@fl_donaldlp4
`
`Files needed for new sc_b block.
`
`Change 66793 on 2002/11/25 by donaldl@fl_donaldl_p4
`
`Fixed vlib statement back.
`
`Change 66791 on 2002/11/25 by donaldl@fl_donaldl_p4
`
`Initial split of sc into two blocks: sc.v and sc_b.v.
`
`The sc_b contains the sc_barye blocks and any supporting logic.
`
`Change 66786 on 2002/11/25 by donaldl@fl_donaldl_p4
`
`Initial split of sc into two blocks: sc.v and scb.v.
`
`The sc_b contains the sc_baryc blocks and any supporting logic.
`
`Change 66725 on 2002/11/25 by kmeekins@kmeekins_ r400win
`
`- Propigated the sc_pipeout_cntx0 signal to the output of the
`
`sc_iter (renamed it iterator_SP_cntx0).
`
`- Registered iteratorSP_cntx0 in the sc_interfaceregs.
`
`Change 66695 on 2002/11/25 by rramsey@RRAMSEY_P4_ r400_win
`
`update sc regression status
`
`Change 66578 on 2002/11/25 by rramsey@RRAMSEYP4 r400win
`
`Update sc regression status
`
`Change 66520 on 2002/11/24 by grayc@grayer400_win
`
`sc top level name changed to PA_SC_wake_up_call
`
`Change 66519 on 2002/11/24 by grayc@graye_r400_win
`
`changed top level signal name to PA_SC_wake_up_call
`
`Change 66456 on 2002/11/23 by mmantor@mmantorr400win
`
`connected sc standalone to moved number class
`
`changed tb_sc to decode and send pa_sc_enhance register
`
`AMD1044_0254068
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`IPR2023-00922
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`
`
`minor clean up of packer
`
`Change 66332 on 2002/11/22 by smoss@smoss_crayolalinuxorl
`
`update
`
`Change 66312 on 2002/11/22 by rramsey@RRAMSEYP4r400win
`
`fix an issue with the last context
`
`load
`
`Change 66087 on 2002/11/21 by kmeekins@kmeekins r400win
`
`connected new module I/O ports for use with trackers.
`
`sc_detailmask_accum.v
`
`- Created two new outputs to indicate when context 0 or context
`1 thru 7 are in use. Used in the trackers.
`
`- Added a new SC to SX port indicating context 0 usage for trackers.
`
`sc_interface_regs.v
`
`- Created two new registers for the new tracker ports to keep
`
`control signals alligned with their data.
`
`Change 66085 on 2002/11/21 by kmeekins@kmeekins r400win
`
`Broke out bits for SQ Quad Pixel Mask for use in the tracter.
`
`Change 66035 on 2002/11/21 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`Change 65994 on 2002/11/21 by rramsey@RRAMSEYP4 r400win
`
`tb_sc.v - Put in new method for context management to fix failing vizg test
`Add DISABLERBBMFILTER parameter so we can test with all rbbm data flowing
`
`rand_r400sc.sh - Add some commenting to rtl sim