` R400 Program Review
`Marlborough — October10, 2002
`
`ATI Corporate Presentation
`
`AMD1044_0228773
`
`ATI Ex. 2070
`IPR2023-00922
`Page 1 of 13
`
`
`
`Tye irate
`
`
`IP — Virage HD
`
`@ Virage is under control for now
`22.14 bit cell is out; 2.8 bit cell is in the HD
`memories
`@ Compilers are ready because of prior customer
`@ Larger RAM andit will consume more power
`@ Cells design rules are less aggressive
`@ Cell is not approved at TSMC, but doesnot
`appear to be a formality
`@ Test chip is in the October Shuttle, but wewill
`not seesilicon till January
`@ Some customization to the compiler need to be
`made
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228774
`
`ATI Ex. 2070
`IPR2023-00922
`Page 2 of 13
`
`
`
`Tye irate IP — Virage RF
`
`
`@ Virage has delivered the logical views of the
`registerfile and fuse box.
`@ The Processor still has issues with the test and
`repair modes, but works in normal modes.
`@ Design team is beginning to enter the system
`into the Verilog
`@Wearestill having issues with the compiler, but
`they seem to be addressed
`@ Virage is here tomorrow and wewill review
`what our implementation
`@ Now need deal with the test and laser interface.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228775
`
`ATI Ex. 2070
`IPR2023-00922
`Page 3 of 13
`
`
`
`STAR RF 16K
`
`LV-OD-LowK
`
`30-Nov-02 (pulled in from Nov 15)
`
`Tye irate IP — Virage
`
`
`Memory FE
`SMS ProcessorShell
`SMS Processor RTL
`
`Memory Compiler
`
`Shipped 19-Sep-02
`Shipped 19-Sep-02
`30-Oct-02
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228776
`
`ATI Ex. 2070
`IPR2023-00922
`Page 4 of 13
`
`
`
`IP — Analog
`
`@ Work has started with Toronto team to make
`small modifications to the cell.
`
`@MPLL should work at 600Mhz, but 700Mhz is
`scary.
`@ Thermal Sensor was over designed to nearly a
`medical instrument. Going to larger increment
`cause the design to half its area.
`@ TVDAC board muxing is the path weare going
`and adding a pin to control the chip.
`
`Tye irate
`
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`
`AMD1044_0228777
`
`ATI Ex. 2070
`IPR2023-00922
`Page 5 of 13
`
`
`
`Tye irate IP - Digital
`
`
`@ Toronto team is looking design for the harvest fuses
`@ Studies about differential clocking did not pan out
`because of noise margin issues
`@ Specialized clock buffer with built in decoupling is
`being studied.
`@ Clocking will go to a wide metal with shield
`approach.
`@ Decoupling Specific cell will come out of work with
`done RV350. We need to find the balance between
`gate array and decoupling cells.
`@ Need a modification to the gate array cell for
`backside fibs.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228778
`
`ATI Ex. 2070
`IPR2023-00922
`Page 6 of 13
`
`
`
`Tye irate Pads and Pad ring
`
`
`@ Initial padout has been complete based on
`Shiva cells; this giving us a 14.2 mm die
`@ With the dropping of support of 2.5 volt Rams
`we can cut the memory cells to 65X350, which
`will bring the die size down to 13 ish
`@ The ball has been released to the board group,
`but the board group is to busy to comment.
`@A schedule for the developmentof pads has
`been received with a final delivery date of 15-
`Feb-03
`@ John Hackenbergwill working on Electrical
`Packaging modeling
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228779
`
`ATI Ex. 2070
`IPR2023-00922
`Page 7 of 13
`
`
`
`Tye irate System Integration
`somone
`
`@ Validation of the Rom is nearly complete
`@ Proposalfor chip personality bits and chip ids
`for the entire R400 family is currently under
`review.
`
`@1/O ring code and pad spreadsheetis doneuntil
`pad and board group.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228780
`
`ATI Ex. 2070
`IPR2023-00922
`Page 8 of 13
`
`
`
`Tye irate o
`
`
`Netlist Generation
`
`@ Netlist was release on 3-Oct-02.
`@ Synopsysate the I/O pads, this wasfixed and
`re-released.
`@ At this point all top level functional connection
`should be complete.
`@ Star Memories did not makeit every where, but
`all blocks have memories
`@ The team is going to enter the Star memories
`incrementally
`1st week of November will be the next
`coordinated release that includes all the DFT
`connections.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228781
`
`ATI Ex. 2070
`IPR2023-00922
`Page 9 of 13
`
`
`
`Tye irate
`
`
`DFT
`
`@ The R400 is currently 1.08M flops.
`@ Test Controller specification has been released
`is currently being implemented.
`@Scan chains and pins are being assignedto
`blocks, lookslike length will be 3500. R200
`family is in the 2000's
`@1/O testing is being defined.
`@ Virage validation of test and repair is going to
`be a time consuming process.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228782
`
`ATI Ex. 2070
`IPR2023-00922
`Page 10 of 13
`
`
`
`Tye irate Diagnostics
`
`
`@ Development and Build infrastructure is
`complete.
`@ Chip definition files have been generated off of
`AutoReg
`@Primlib and library conversion are almost
`complete
`@ Packet Reader is currently being updated
`@ Base Diagnostics are just starting
`@ Toronto appearsto be distracted on other
`projects currently.
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228783
`
`ATI Ex. 2070
`IPR2023-00922
`Page 11 of 13
`
`
`
`@ Non Graphic core netlist has been compiled and is
`2.7 million gates
`@ RTL compilation seem unlikely because of
`problemsin the IKOS compiler. Back to Gates
`@ Still trying to compile full chip, but held up on I/O
`pad problem.
`
`Tye irate IKOS
`
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228784
`
`ATI Ex. 2070
`IPR2023-00922
`Page 12 of 13
`
`
`
`Issues
`
`—
`
`@ Virage is better, but it is going to require
`attention throughout the program.
`@ Need the board group give us somecycle to
`deal with packaging and memory interface.
`@A number of issues are not being address due
`lack of time and manpower.
`
`Tye irate
`
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
`
`AMD1044_0228785
`
`ATI Ex. 2070
`IPR2023-00922
`Page 13 of 13
`
`
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