400 Program Review
`
`December11,2002
`
`
`
`ATI Corporate Presentation
`
`ATI Ex. 2034
`IPR2023-00922
`Page 1 of 62
`
`

`

`Emulator
`
`•SQ/SP/SX
`
`
`
`mismatchese Debugging HW / EMU numerical
`
`•TP/TC
`• Debugging 3DNolume textures
`
`
`
`• Debugging HW / EMU numerical mismatches
`
`•RB/RC
`• Debugging MSAA Resolve
`
`
`
`
`• Shader depth export and Zpass counter not implemented
`
`•MC/MH
`a Debugging ATI GART
`
`
`
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`

`

`
`
`
`
`HW Verification (directed tests)
`
`870
`
`91% 86% 86%
`
`% Written % Running % Passing
`Planned
`Block
`MC/MH
`96% 100% 94%
`2300
`RB/ RC
`SQ/SX/SP
`TP /TC
`*GC
`
`1700
`
`97% 100% 81%
`
`5500
`
`85% 13% 25%
`
`4183
`
`63%
`
`
`
`ATI Corporate Presentation
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`

`

`etnaSpire
`
`ee
`
`ATI Corporate Presentation
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`

`

`
`
`
`
`
`
`
`
`
`
`
`0 Performance
`
`ferification
`—
`ebruary 12, 2003
`
`
`
`ATI Corporate Presentation
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`

`

`etnaSpire
`
`See tip:
`
`/www.ma atitech.com/r400/pertver/index.htm
`
`2
`
`ATI Corporate Presentation
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`

`

`
`
`nfilesdownsomewhat by preventing the capturing of duplicate
`- VB's and textures
`
`
`
`3
`
`etnaSpire
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`

`

`etnaSpire
`
`vedbacktframesofQuakes, 3DWinBench2000(Rust
`eee ——
`
`! ue erful and allowedall thistohappen
`Images are on the web site
`
`ee
`
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`

` i!
`
`
`
`
`etna
`Rips
`
`es
`
`ATI Corporate Presentation
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`

`etnaSpire
`
`6
`
`
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`

`CONEIDENTIAL
`
`ia
`
`ATI Corporate Presentation
`Confidential
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`

`

`Spire
`
`CONEIDENTIAL
`
`ATI Corporate Presentation
`Confidential
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`

`

`
`_DriverIs ues”
`
`ing withthe driver groupsto.goive problems with capture
`ay
`fbenchmarks that may be driver related
`
`date,the driver folks have fixed a handful ofrelatively minor
`their code ranging from bad assertions and memory
`
`~ leakstoinitialization issues
`
`—
`oo
`
`etnaSpire
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`

`

`
`
`ryis the shaders§ produced by tthe driver/compiler are
`fest
`ingfunctionalityin the -hw that isnot working properly;
`If tng teto validatethis by using simpler, known to. work
`
`
`
`( reatinga standalone disassembler to help out here..
`
`
`io
`
`etnaSpire
`
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`

`

`pture&PlaybackTools
`
`b dissecembly support for.shaders using the
`will
`all ne Gieaeeemblertethe compilerfolks are
`
`
`
`
`ggroups are continuing weekly meetings to
`ules; implementation details, etc
`. 2Dcapture and playback implementationis mostly complete;
`
`.] “working on issues related to buffer location, etc..
`
`SoTrapalee
`
`
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`

`

`Rares
`
`rame/Scissor Tools (DX8Logger.
`oe ° Actively used as part of the perf ver process
`
`CONEIDENTIAL
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`

`

`
`
`
`somewhat gated by: the gc and sim playback issues
`Planis to be able to post process dumps to provide support for
`analysis of simulations, benchmark runs, etc
`
`_ @
`te
`etnaSpire
`
`
`
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`

`

`aud of Shoda
`plel lech msde bo count:
`pertmori wrapper
`2 GE
`Spertinan weap
`i
`perfmonwrapper rb.)
`
`
`ds_p
`
`=
`
`
`zolow,
`low,
`acnefill
`
`
`
` Ac
`
`CONEIDENTIAL
`Spire
`
`ATI Corporate Presentation
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`

`

`
`
`
`lends al 6 rently not hitting the peak numbers (~6 pix/clk) but
`have improved. in the last few weeks by approx 10%; thisis still
`“under investigation
`
`
`
`>
`etnaSpire
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`ATI Corporate Presentation
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`

`

`
`
`
`Small.batchtests -scissoring tests, shadows?, shaders?
`
`i
`
`16 ee
`CONEIDENTIAL
`Trapalee
`
`ATI Corporate Presentation
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`
`

`

`
`
`
`
`—
`CONEIDENTIAL
`Spire
`
`
`
`a ionTests
`
`t een working towards gettingmore complex iterations of
`eststo run on theemulator and simulator.
`
`o Have Doom3 final shader pass and stencil shadow algorithms;
`“R300 perfsuite complex tests will complement these tests
`
`
`
`ATI Corporate Presentation
`Confidential
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`

`

`
`(arepleves .
`
`o
`
`
`
`se
`etna
`ua
`
`+ ave been able to successfully emulate, capture, and playback
`
`“frames of one Q3 demo
`
`@ Dooms not ready yet...
`
`ATI Corporate Presentation
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`

`

`sthisallmear
`
`mance analysisof thesebenchmarkrunsshould
`sidered as part of thereadinesscriteria
`
`Spire
`
`co
`CONEIDENTIAL
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`

`

`
`
`et al) applications —
`ing by the end of the
`
`
`
`a _
`coor.
`Rares
`:
`
`& “Successful implementation of R400 optimizertool
`
`
`
`ATI Corporate Presentation
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`

`

`ferification
` nd ofPerformance
`
`ATI Corporate Presentation
`Confidential
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`

`

`
`
`%Analyzed -
`% Written: A
`78% |
`100%|
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`2
`CONEIDENTIAL
`Spire
`
`ATI Corporate Presentation
`Confidential
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`
`

`

`
`
`89.67%
`98.85%
`- 96.29%
`99.04%
`99.04%
`
`84.49%
`95.94
`
`99.06%
`8.36%
`
`Pes
`
`etnaSpire
`
`ATI Corporate Presentation
`Confidential
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`Page 27 of 62
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`

`

`
`
`- Color FillRates
`
`
`
`
`
`
`
`
`
`
`
`—+ rectmesh_we32
`
`«_trimesh_we32
`
`
`
`
`
`ez
`
`etnaSpire
`
`ATI Corporate Presentation
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`

`

`Color FiliRates =
`
`
`
`
`
`
`
`
`
`eo recineswes?25]
`
`@
`tnmesn wes? 65
`
`
`
`
`
`
`
`
`128
`Prim Size (266x265)
`
`a
`
`etnaSpire
`
`ATI Corporate Presentation
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`
`

`

`R300"
`(sim)
`
`%
`(Sim)
`
`15.74%,
`70.28%
`9,
`68% 7.0981
`
`68.79%
`
`81.91%
`
`70.809
`
`11909. 5:5030649
`115715.6638147
`
`ee
`
`etnaSpire
`
`ATI Corporate Presentation
`Confidential
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`

`

`ATI Ex. 2034
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`Page 31 of 62
`
`0
`
`00
`
`Fattnnn start of module sc count ----3--3---3-3- 3-3-3 rnnnn nnn
`»Ssc.
`testbench.
`usc_perfmongmnumquads low,
`»Sc.
`testbench.
`usc_perfmon_qm_covered_h16_low,
`»sc
`testbench.
`-usc_perfmon_hiernum_quads_low,
`»Sc.
`testbench.
`usc_perfmon_det_num_quads_low,
`»sc
`testbench.
`-usc_perfmon_det_mask_h0_low,
`»sc
`testbench.
`-usc_perfmon_det_mask_hl_low,
`
`4096
`256
`4096
`4096
`0
`0
`
`Fa end of module sc count ~--7-7-77 777375555rn
`Fa start of module rb count ~---7--77777773555
`testbench.
`testbench.
`testbench.
`testbench.
`testbench.
`testbench.
`testbench.
`
`3.urb_perfmon_wrapper.urb_perfmon_rb_cntx17_busy_low,
`1024
`3.urb_perfimon_wrapper.urbperfmon_num_quads passed_z_low,
`1
`3.urb_perfimon_wrapper.urbperfmon_num_quads failed_zlow,
`
`3.urb_perfmon_wrapper.urbperfmon_num_8x256 depth_cache fills exp_low,
`
`3.urb_perfmon_wrapper.urb perfmon_num_8x256 depth cache fills sep low,
`3.urbperfmon_wrapper.urbperfmon_num_8x256depthcacheflusheslow,
`3.urb_perfmon_wrapper.urbperfmon_num_8x256depth_cacheflushes sep,
`
`4527
`
`0
`
`wonnnne nennnnnanna nnnnnn n= end of module rb count -----------------------------------------
`
`ATI Ex. 2034
`IPR2023-00922
`Page 31 of 62
`
`

`

`PROTECTIVE ORDER
`
`R400 Fill Rate Tests
`Updated 1/15/2003
`
`RBRC
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn) Pixels Clks
`
`Size
`
`Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`(Exp)
`
`% R400
`Expected
`
`R300
`(Sim)
`
`% R300
`Simulated
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`4096
`1
`4 65536
`1 16384
`2 65536
`1 65536
`
`4096
`1
`4 65536
`1 16384
`2 65536
`1 65536
`
`7.17338
`827 4.952842
`7.90829
`8543
`7.67131
`2383 6.875367 7.702868
`8527 7.685704 7.923588
`8527 7.685704 7.923588
`
`4.75174 6.759076
`862
`8795 7.451507 7.674903
`2407 6.806813 7.616922
`8526 7.686606 7.924547
`8585
`7.63378 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`100.66%
`
`AMD1044_0175018
`
`ATI Ex. 2034
`IPR2023-00922
`Page 32 of 62
`
`

`

`Color Fill Rates
`
`rectmesh_wc32
`trimesh_wc32
`
`4096
`
`16384
`Pixels
`
`65536
`
`8.2
`
`8
`
`7.8
`
`7.6
`
`7.4
`
`7.2
`
`7
`
`6.8
`
`6.6
`
`6.4
`
`6.2
`
`6
`
`Pix/Clk
`
`PROTECTIVE ORDER
`
`AMD1044_0175019
`
`ATI Ex. 2034
`IPR2023-00922
`Page 33 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn)
`
`Size
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`1
`1
`
`1
`1
`1
`
`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk Test
`
`Pixels
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`8795 7.4515 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8526 7.6866 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`827 4.9528 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`4096 6.759076
`65536 7.674903
`16384 7.616922
`65536 7.924547
`65536 7.868412
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`7.17338
`4096
`16384 7.702868
`65536 7.923588
`
`4096 6.759076
`16384 7.616922
`65536 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`100.66%
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`89.67%
`96.29%
`99.04% 7.871268
`
`84.49%
`95.21%
`98.36%
`
`100.66%
`
`100.66%
`
`PROTECTIVE ORDER
`
`AMD1044_0175019
`
`ATI Ex. 2034
`IPR2023-00922
`Page 34 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`Grid
`(nxn) Pixels
`
`Size
`
`128
`128
`256
`128
`128
`256
`
`1
`2
`1
`1
`2
`1
`
`16384
`65536
`65536
`16384
`65536
`65536
`
`GC
`Cntx17
`busy
`
`Pix/Clk
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`2704 6.0592
`11656 5.6225
`11272 5.8141
`3095 5.2937
`11909 5.5031
`11571 5.6638
`
`8
`8
`8
`8
`8
`8
`
`75.74%
`70.28%
`72.68% 7.098056
`66.17%
`68.79%
`70.80%
`
`81.91%
`
`PROTECTIVE ORDER
`
`AMD1044_0175019
`
`ATI Ex. 2034
`IPR2023-00922
`Page 35 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`rectmesh_wc32_t128pt
`rectmesh_wc32_t128pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`
`rectmesh_wc32_rwz
`rectmesh_wc32_rwz
`
`Grid
`(nxn) Pixels
`
`Size
`
`GC
`Cntx17
`busy
`
`Pix/Clk
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`64
`64
`128
`128
`256
`64
`64
`128
`128
`256
`
`128
`128
`256
`128
`128
`256
`
`64
`64
`128
`128
`256
`128
`128
`256
`
`256
`128
`
`1
`4
`1
`2
`1
`1
`4
`1
`2
`1
`
`1
`2
`1
`1
`2
`1
`
`1
`4
`1
`2
`1
`1
`2
`1
`
`1
`2
`
`4096
`65536
`16384
`65536
`65536
`4096
`65536
`16384
`65536
`65536
`
`16384
`65536
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`16384
`65536
`65536
`
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`2704 6.0592
`11656 5.6225
`11272 5.8141
`3095 5.2937
`11909 5.5031
`11571 5.6638
`
`2705 1.5142
`
`271400000
`286520000
`
`2.4147
`2.2873
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`75.74%
`70.28%
`72.68% 7.098056
`66.17%
`68.79%
`70.80%
`
`100.66%
`
`81.91%
`
`8
`8
`8
`8
`8
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`8
`
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`
`apparent hang (RB->MC)
`
`currently unoptimized
`currently unoptimized
`
`PROTECTIVE ORDER
`
`AMD1044_0175019
`
`ATI Ex. 2034
`IPR2023-00922
`Page 36 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/15/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn) Pixels Clks
`
`Size
`
`RBRC
`
`Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`(Exp)
`
`% R400
`Expected
`
`R300
`(Sim)
`
`% R300
`Simulated
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`4096
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`100.66%
`
`PROTECTIVE ORDER
`
`AMD1044_0175019
`
`ATI Ex. 2034
`IPR2023-00922
`Page 37 of 62
`
`

`

`Color Fill Rates
`
`rectmesh_wc32_256
`trimesh_wc32_256
`
`64
`
`128
`Prim Size (256x256)
`
`256
`
`7.95
`
`7.9
`
`7.85
`
`7.8
`
`7.75
`
`Pix/Clk
`
`7.7
`
`7.65
`
`7.6
`
`7.55
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 38 of 62
`
`

`

`Color Fill Rates
`
`rectmesh_wc32
`trimesh_wc32
`
`4096
`
`16384
`Pixels
`
`65536
`
`8.2
`
`8
`
`7.8
`
`7.6
`
`7.4
`
`7.2
`
`7
`
`6.8
`
`6.6
`
`6.4
`
`6.2
`
`6
`
`Pix/Clk
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 39 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn)
`
`Size
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`1
`1
`
`1
`1
`1
`
`4
`2
`1
`
`4
`2
`1
`
`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk Test
`
`Pixels
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`8795 7.4515 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8526 7.6866 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`827 4.9528 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`8543 7.6713 rectmesh_wc32_256
`8527 7.6857 rectmesh_wc32_256
`8527 7.6857 rectmesh_wc32_256
`
`8795 7.4515 trimesh_wc32_256
`8526 7.6866 trimesh_wc32_256
`8585 7.6338 trimesh_wc32_256
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`4096 6.759076
`65536 7.674903
`16384 7.616922
`65536 7.924547
`65536 7.868412
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`7.17338
`4096
`16384 7.702868
`65536 7.923588
`
`4096 6.759076
`16384 7.616922
`65536 7.868412
`
`7.90829
`65536
`65536 7.923588
`65536 7.923588
`
`65536 7.674903
`65536 7.924547
`65536 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`100.66%
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`89.67%
`96.29%
`99.04% 7.871268
`
`84.49%
`95.21%
`98.36%
`
`100.66%
`
`100.66%
`
`98.85%
`99.04%
`99.04% 7.871268
`
`100.66%
`
`95.94%
`99.06%
`98.36%
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 40 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`Grid
`(nxn) Pixels
`
`Size
`
`128
`128
`256
`128
`128
`256
`
`1
`2
`1
`1
`2
`1
`
`16384
`65536
`65536
`16384
`65536
`65536
`
`GC
`Cntx17
`busy
`
`Pix/Clk
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`2704 6.0592
`11656 5.6225
`11272 5.8141
`3095 5.2937
`11909 5.5031
`11571 5.6638
`
`8
`8
`8
`8
`8
`8
`
`75.74%
`70.28%
`72.68% 7.098056
`66.17%
`68.79%
`70.80%
`
`81.91%
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 41 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`rectmesh_wc32_t128pt
`rectmesh_wc32_t128pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`
`rectmesh_wc32_rwz
`rectmesh_wc32_rwz
`
`Grid
`(nxn) Pixels
`
`Size
`
`GC
`Cntx17
`busy
`
`Pix/Clk
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`64
`64
`128
`128
`256
`64
`64
`128
`128
`256
`
`128
`128
`256
`128
`128
`256
`
`64
`64
`128
`128
`256
`128
`128
`256
`
`256
`128
`
`1
`4
`1
`2
`1
`1
`4
`1
`2
`1
`
`1
`2
`1
`1
`2
`1
`
`1
`4
`1
`2
`1
`1
`2
`1
`
`1
`2
`
`4096
`65536
`16384
`65536
`65536
`4096
`65536
`16384
`65536
`65536
`
`16384
`65536
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`16384
`65536
`65536
`
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`2704 6.0592
`11656 5.6225
`11272 5.8141
`3095 5.2937
`11909 5.5031
`11571 5.6638
`
`2705 1.5142
`
`271400000
`286520000
`
`2.4147
`2.2873
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`75.74%
`70.28%
`72.68% 7.098056
`66.17%
`68.79%
`70.80%
`
`100.66%
`
`81.91%
`
`8
`8
`8
`8
`8
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`8
`
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`
`apparent hang (RB->MC)
`
`currently unoptimized
`currently unoptimized
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 42 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/15/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn) Pixels Clks
`
`Size
`
`RBRC
`
`Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`(Exp)
`
`% R400
`Expected
`
`R300
`(Sim)
`
`% R300
`Simulated
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`4096
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`100.66%
`
`PROTECTIVE ORDER
`
`AMD1044_0175020
`
`ATI Ex. 2034
`IPR2023-00922
`Page 43 of 62
`
`

`

`Color Fill Rates
`
`rectmesh_wc32_256
`trimesh_wc32_256
`
`64
`
`128
`Prim Size (256x256)
`
`256
`
`7.95
`
`7.9
`
`7.85
`
`7.8
`
`7.75
`
`Pix/Clk
`
`7.7
`
`7.65
`
`7.6
`
`7.55
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 44 of 62
`
`

`

`Color Fill Rates
`
`rectmesh_wc32
`trimesh_wc32
`
`4096
`
`16384
`Pixels
`
`65536
`
`8.2
`
`8
`
`7.8
`
`7.6
`
`7.4
`
`7.2
`
`7
`
`6.8
`
`6.6
`
`6.4
`
`6.2
`
`6
`
`Pix/Clk
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 45 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn)
`
`Size
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`64
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`1
`1
`1
`
`1
`1
`1
`
`4
`2
`1
`
`4
`2
`1
`
`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk Test
`
`Pixels
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`8795 7.4515 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8526 7.6866 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`827 4.9528 rectmesh_wc32
`8543 7.6713 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`827 4.9528 rectmesh_wc32
`2383 6.8754 rectmesh_wc32
`8527 7.6857 rectmesh_wc32
`
`862 4.7517 trimesh_wc32
`2407 6.8068 trimesh_wc32
`8585 7.6338 trimesh_wc32
`
`8543 7.6713 rectmesh_wc32_256
`8527 7.6857 rectmesh_wc32_256
`8527 7.6857 rectmesh_wc32_256
`
`8795 7.4515 trimesh_wc32_256
`8526 7.6866 trimesh_wc32_256
`8585 7.6338 trimesh_wc32_256
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`4096 6.759076
`65536 7.674903
`16384 7.616922
`65536 7.924547
`65536 7.868412
`
`7.17338
`4096
`7.90829
`65536
`16384 7.702868
`65536 7.923588
`65536 7.923588
`
`7.17338
`4096
`16384 7.702868
`65536 7.923588
`
`4096 6.759076
`16384 7.616922
`65536 7.868412
`
`7.90829
`65536
`65536 7.923588
`65536 7.923588
`
`65536 7.674903
`65536 7.924547
`65536 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`100.66%
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`
`89.67%
`96.29%
`99.04% 7.871268
`
`84.49%
`95.21%
`98.36%
`
`100.66%
`
`100.66%
`
`98.85%
`99.04%
`99.04% 7.871268
`
`100.66%
`
`95.94%
`99.06%
`98.36%
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 46 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/15/2003
`
`Test
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`Grid
`(nxn) Pixels
`
`Size
`
`RBRC
`
`Clks
`
`Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`(Exp)
`
`% R400
`(Exp)
`
`R300
`(Sim)
`
`% R300
`(Sim)
`
`128
`128
`256
`128
`128
`256
`
`1
`2
`1
`1
`2
`1
`
`6.69281
`2704 6.0591716
`16384
`65536 11656
`5.622512 5.748772
`65536 11272 5.8140525 5.949165
`16384
`3095 5.2936995 5.771046
`65536 11909 5.5030649 5.623959
`65536 11571 5.6638147 5.791958
`
`8
`8
`8
`8
`8
`8
`
`75.74%
`70.28%
`72.68% 7.0981
`66.17%
`68.79%
`70.80%
`
`81.91%
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 47 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/xx/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`rectmesh_rwc32
`rectmesh_rwc32
`rectmesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`trimesh_rwc32
`
`rectmesh_wc32_t128pt
`rectmesh_wc32_t128pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`rectmesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`trimesh_wc32_t256pt
`
`rectmesh_wc32_rwz
`rectmesh_wc32_rwz
`
`Grid
`(nxn) Pixels
`
`Size
`
`GC
`Cntx17
`busy
`
`Pix/Clk
`
`RBRC
`
`Clks
`(all_busys) Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`Expected
`
`% R400
`Expected
`
`R300
`Simulated
`
`% R300
`Simulated Notes
`
`64
`64
`128
`128
`256
`64
`64
`128
`128
`256
`
`128
`128
`256
`128
`128
`256
`
`64
`64
`128
`128
`256
`128
`128
`256
`
`256
`128
`
`1
`4
`1
`2
`1
`1
`4
`1
`2
`1
`
`1
`2
`1
`1
`2
`1
`
`1
`4
`1
`2
`1
`1
`2
`1
`
`1
`2
`
`4096
`65536
`16384
`65536
`65536
`4096
`65536
`16384
`65536
`65536
`
`16384
`65536
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`16384
`65536
`65536
`
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`2704 6.0592
`11656 5.6225
`11272 5.8141
`3095 5.2937
`11909 5.5031
`11571 5.6638
`
`2705 1.5142
`
`271400000
`286520000
`
`2.4147
`2.2873
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871268
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`75.74%
`70.28%
`72.68% 7.098056
`66.17%
`68.79%
`70.80%
`
`100.66%
`
`81.91%
`
`8
`8
`8
`8
`8
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`8
`
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`6.4
`
`apparent hang (RB->MC)
`
`currently unoptimized
`currently unoptimized
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 48 of 62
`
`

`

`R400 Fill Rate Tests
`Updated 1/15/2003
`
`Test
`
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`rectmesh_wc32
`
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`trimesh_wc32
`
`Grid
`(nxn) Pixels Clks
`
`Size
`
`RBRC
`
`Pix/Clk
`
`Pix/Clk
`(noflush)
`
`R400
`(Exp)
`
`% R400
`Expected
`
`R300
`(Sim)
`
`% R300
`Simulated
`
`64
`64
`128
`128
`256
`
`64
`64
`128
`128
`256
`
`1
`4
`1
`2
`1
`
`1
`4
`1
`2
`1
`
`4096
`65536
`16384
`65536
`65536
`
`4096
`65536
`16384
`65536
`65536
`
`7.17338
`827 4.9528
`7.90829
`8543 7.6713
`2383 6.8754 7.702868
`8527 7.6857 7.923588
`8527 7.6857 7.923588
`
`862 4.7517 6.759076
`8795 7.4515 7.674903
`2407 6.8068 7.616922
`8526 7.6866 7.924547
`8585 7.6338 7.868412
`
`8
`8
`8
`8
`8
`
`8
`8
`8
`8
`8
`
`89.67%
`98.85%
`96.29%
`99.04%
`99.04% 7.871
`
`84.49%
`95.94%
`95.21%
`99.06%
`98.36%
`
`100.66%
`
`PROTECTIVE ORDER
`
`AMD1044_0175021
`
`ATI Ex. 2034
`IPR2023-00922
`Page 49 of 62
`
`

`

`
`
`
`
`
`
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 50 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 50 of 62
`
`

`

`
`
`:
`© =:[Directed:.
`[PIXCLK (2.5n8)
`Emulator [Tests| _-
`
`plete | BOLK (14.1nS) omplete [Written ce 2. nS)
`
`
`
`
`
`
`
`
`
`
`802.73
`RBBM: 2.95
`=GP:.2. 85.
`
`
`Display. 11
`PPIXCLK: 2.5
`
`
`
`
`
`IDCT: 4.23
`BIF 4.47
`
`
`
`
`ri
`CONEIDENTIAL
`Spire
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 51 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 51 of 62
`
`

`

`
`
` Completeness
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
` .
`
` % Written& % Passing
`
`Functional Block
`
`3
`CONEIDENTIAL
`Spire
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 52 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 52 of 62
`
`

`

`etnaSpire
`
`
`
`
`
`
` Test
`Count
`
`
`
`
`
`Planned
`& Written
`
`
`
` Passing
`
`
`
`
`
`
`
`Functional Block
`
`4
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 53 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 53 of 62
`
`

`

`
` nitial padout done, needs to be reviewed
`
`
`Initial nétlist'successfully read into SPC
`-
`i!
`-—~Generated floorplan from SPC (no I/O constraint)
`
`etnaSpire
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 54 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 54 of 62
`
`

`

`(no VO constraiae
`
` loorplan- Silicon Per pectives
`
`
`6
`CONEIDENTIAL
`Spire
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 55 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 55 of 62
`
`

`

`
`e3 MM)
`
`
`- MRD reviewmeeting scheduled on Thursday.
`
`—e
`
`tnaTrapalee
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 56of 62
`
`|, ~5% sscienton
`O% implemented
`
`Desig
`
`spe
`
`‘parially complete.
`
`ATI Ex. 2034
`IPR2023-00922
`Page 56 of 62
`
`

`

`
`drawing functions _ Compiler. integrated with SSM and D3D Driver 100%
`
`
`
`2C
`
`ONEIDENTIAL
`Trapalee
`
`e Status (3D)
`
`= Triangle through compiler on emulator 100%
`
`
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 57 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 57 of 62
`
`

`

`Post Route Logie sera:
`Sanit Area
`
`SaPeBbhata
`6,306,025,
`
`4.205, CA
`28639)
`4/835,301
`
`
`
` CONEIDENTIAL
`
`Hoe852,
`asd205)
`
`a082338:
`add.7,
`
`
`2,084,338
`15,356,891)
`PagIerad
` She i to
`Caen, 143:
`2ST E68:
`ByeA€ £49
`164,400
`
`
` "OE, 18 AG
`Tei TWEET
`
`GGrrantPad separation iumy
`‘Current Pad height (umy
`coe
`.
`‘Scribe
`Gore mimiside
`Toral mmiside
`
`IRN450in 0.09 (estimated)
`{Sore mmiside
`P Total mmiside
`
`aos1.8)
`
`
`
`
`
`Spire
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 58 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 58 of 62
`
`

`

`Spire
`
`io
`CONEIDENTIAL
`
`Beeprogressing slowly in some areas
`
`— February tapeout target.
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 59 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 59 of 62
`
`

`

`Forecast...
`
`05-17-02
`06-15-02
`07-1202
`09-16-02
`40-11-02
`11-08-02
`11-11-02
`11-15-02
`01-10-03
`
`03-14-03...
`
`06-28-03
`
`09-30-02
`10-11-02
`11-15-02
`11-11-02
`11-30-02
`02-28-03
`
`05-23-03
`
`07-26-03
`08-02-03
`09-02-03
`
`-
`
`
`
`
`R400 CustomerSamples
`Product-Delivery
`
`fe
`
`"a
`CONEIDENTIAL
`Spire
`
`.
`
`ATI Corporate Presentation
`Confidential
`
`ATI Ex. 2034
`IPR2023-00922
`Page 60 of 62
`
`ATI Ex. 2034
`IPR2023-00922
`Page 60 of 62
`
`

`

`R400 Area Estimate (0.13)
`
`Block
`
`BIF (Bus Interface)
`DC (Display Controller)
`VIP (Video In Port)
`CG (Clock Gen)
`ROM (ROM and debug controller)
`TSTC (Test Controller)
`CP (Control Processor)
`RBBM (Register Backbone Manager)
`MH (Memory Hub)
`IDCT
`VGT (Vertex Group and Tesselate)
`PA(Viewport Xform,Clip and Setup)
`SC (Scan Converter)
`SP (Shader Pipe)
`SQ (Sequencer)
`TP (Texture Pipe)
`TC (Texture Cache)
`RB (Render Backend)
`RC (Render Central)
`SX (Shader Export)
`MC (Memory Controller)
`Analog
`
`Total Core (um2)
`
`Pre Route
`Logic
`Area
`
`1,488,869
`2,677,800
`518,369
`340,700
`193,104
`9,600
`3,366,639
`221,702
`3,193,174
`847,452
`816,990
`2,979,377
`6,558,352
`3,992,400
`1,178,584
`2,210,279
`13,014,218
`3,584,000
`40,000
`524,928
`543,312
`
`Utilization
`
`Post Route Logic
`Unit Area
`
`Macro
`Area
`
`Total Unit
`Area
`
`R400 Qty R400 Total
`
`RV400
`Qty
`
`RV400
`Total
`
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`0.70
`
`2,126,956
`0
`2,126,956
`5,605,377
`3,825,429 1,779,948
`788,419
`740,527
`47,892
`710,714
`486,714
`224,000
`275,863
`275,863
`0
`13,714
`13,714
`0
`6,306,825
`4,809,484 1,497,341
`316,717
`316,717
`0
`5,236,909
`4,561,677
`675,232
`1,295,049
`1,210,646
`84,403
`1,498,822
`1,167,129
`331,693
`4,836,271
`4,256,253
`580,018
`9,937,261
`9,369,074
`568,187
`8,317,138
`5,703,429 2,613,709
`4,064,338
`1,683,692 2,380,646
`3,838,973
`3,157,541
`681,432
`18,591,739 5,322,011 23,913,751
`5,120,000 1,233,000
`6,353,000
`57,143
`200,000
`257,143
`749,897 1,516,000
`2,265,897
`776,160
`426,757
`1,202,917
`
`Current Pad separation (um)
`Current Pad height (um)
`Scribe
`Core mm/side
`Total mm/side
`
`80
`350
`0.18
`
`RV450 in 0.09 (estimated)
` Core mm/side
` Total mm/side
`
`1
`1
`1
`1
`1
`1
`1
`1
`1
`1
`1
`1
`1
`4
`1
`4
`1
`4
`1
`2
`4
`
`2,126,956
`5,605,377
`788,419
`710,714
`275,863
`13,714
`6,306,825
`316,717
`5,236,909
`1,295,049
`1,498,822
`4,836,271
`9,937,261
`33,268,552
`4,064,338
`15,355,891
`23,913,751
`25,412,000
`257,143
`4,531,794
`4,811,668
`6,545,540
`
`1.00
`1.00
`1.00
`1.00
`1.00
`1.00
`1.00
`1.00
`0.75
`1.00
`1.00
`1.00
`0.60
`2.00
`1.00
`2.00
`0.60
`2.00
`1.00
`1.00
`2.00
`
`2,126,956
`5,605,377
`788,419
`710,714
`275,863
`13,714
`6,306,825
`316,717
`3,927,682
`1,295,049
`1,498,822
`4,836,271
`5,962,357
`16,634,276
`4,064,338
`7,677,945
`14,348,251
`12,706,000
`257,143
`2,265,897
`2,405,834
`8,154,400
`
`157,109,574
`
`102,178,849
`
`12.53
`13.98
`
`10.11
`10.99
`
`8.15
`9.07
`
`1% BIF (Bus Interface)
`4% DC (Display Controller)
`1% VIP (Video In Port)
`0% CG (Clock Gen)
`0% ROM (ROM and debug controller)
`1% VIP (Video In Port)
`4% CP (Control Processor)
`0% RBBM (Register Backbone Manager)
`3% MH (Memory Hub)
`1% IDCT
`1% VGT (Vertex Group and Tesselate)
`3% PA(Viewport Xform,Clip and Setup)
`6% SC (Scan Converter)
`21% SP (Shader Pipe)
`3% SQ (Sequencer)
`10% TP (Texture Pipe)
`15% TC (Texture Cache)
`16% RB (Render Backend)
`0% RC (Render Central)
`3% SX (Shader Export)
`3%