October 28, 2002
`
`Executive Review — R400
`
`AMD1044_0051169
`
`ATI Ex. 2022
`IPR2023-00922
`Page 1 of 14
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`

`

`
`Block Logic Design and Timing
`
`Synthesis W/C
`
`i
`
`MCLK(1.67nS),
`PIXCLK (2.5nS), BCLK TNS (nS)
`(14nS), AGP(3.5nS),
`omplete |Comp
`TVCLK(10nS)
`SCLK (2.5nS)
`lete |Complete [Written
`MC -MCLK: 1.71
`MC:2.5, MH; 3.08
`Le 89%
`
`
`
`
`97% 199% 95% 91% RB: 6.3; RC 2.5 Ree ecoB/RC 6211/0
`
`Sefio]
`:
`
`SP 100%ESee100% Done
`
`
`
`95% 86%YP25ICTSPe
`
`
`GICGM/ROM
`100%
`Done
`NA
`5%
`CG. 2.5, OGM:2.5, DBG.2.5 fly
`
`100%
`Done
`55%
`PA: 2.79
`aS
`Done
`100%
`78%
`VGT: 250
`100%
`95%
`
`a
`
`
`
`a
`&
`i
`2%
`95%
`95% EE ees
`95%
`86%
`ameeae
`100%
`75% Sb aes eee
`
`90% OER ureaanan NPa a75% Fee OUP Jue ad PTC
`
`
`
`peeCreate
`100%
`71%
`.
`90%
`74%
`40%
`99%
`100%
`90%
`97%
`
`:
`
`RES
`
`Sh Ee pe
`TOO% PSUS yace
`17%
`BIF 2.63
`BCLK. 14.53nS; AGP:3.49nS
`IDCT: 2.83
`Partin
`
`BapeSB100%
`
`ATI Confidential and Proprietary
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`AMD1044_0051170
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`ATI Ex. 2022
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`ATI Ex. 2022
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`Page 2 of 14
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`Block Level Test Completeness
`
`
`
`Block Level Test Status
`
`
`
`
`Completeness
`
`
`& % Passing
`
` % Written
`
`A
`A»
`SACILINEBCLKAVLRP
`wee “ RY
`& “Sx’ LE x
`oy
`o & VER Orn’
`o
`TP
`)
`¥
`Functional Block
`
`All
`
`and Proprietary
`
`AMD1044_0051171
`
`ATI Ex. 2022
`IPR2023-00922
`Page 3 of 14
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`ATI Ex. 2022
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`Page 3 of 14
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`

`

`
`
`Marlboro Blocks
`
`Marlboro Test Trend by Day
`
`
`
`
`
`
`
`
`
`
`O EmulatorFailed
`B Tests Failing
`@ Tests Passing
`
`
` VY cb VO Mia dedi ww
`
`
`ELFLEFFCLKES
`GGG GGG GGG
`Date
`
`
`ATl
`
`and Proprietary
`
`AMD1044_0051172
`
`ATI Ex. 2022
`IPR2023-00922
`Page 4 of 14
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`ATI Ex. 2022
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`

`

`
`General Status
`
`¢ Full chip
`— Full chip environment now passingtests
`* Synthesis
`— Working through issues with netlist “N”
`* Flowand processissues are being resolved for next netlist “N+1”
`— Nextnetlist ...
`* STAR memories and DFT are intended to be included
`
`STAR processor functionality not arriving till 10/30/02
`*
`— Synthesis experts continually reviewing code for area optimization
`* Have identified potential areas in RB that are being pursued
`* Block Design
`— RB currently exceeds 300K instance
`* Split into color blend unit and remainder of RB
`+ Allows early delivery of RB blend for Physical Design
`— MCsynthesized at 600 MHz
`
`
`
`ATl
`
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`AMD1044_0051173
`
`ATI Ex. 2022
`IPR2023-00922
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`ATI Ex. 2022
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`Page 5 of 14
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`

`
`General Status
`
`- Block delivery
`— Stressing early block delivery to take advantage of new PD flow
`
`Major Block
`RB(Blend)
`
`11/18/2002
`
`spo 11/18/2002
`
`
`
`— Early block wrap-up is expected to enable physical design elements to
`complete sooner
`
`ATlt
`
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`AMD1044_0051174
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`ATI Ex. 2022
`IPR2023-00922
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`ATI Ex. 2022
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`Page 6 of 14
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`

`

`
`Software Status (2D)
`
`° CAIL
`
`— CommandDecoder 1s integrated to CAIL
`
`¢* BIOS
`
`
`
`— BIOS nowboots up with new command decoder and new
`imitialization table
`
`— NewBIOS architecture nowhas official name — ‘ATOM’
`
`° 2D
`
`— 8 of 12 2D legacy PM4packets passed initial tests with Oct 22nd's
`QS-EMU
`
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`Page 7 of 14
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`Software Status (3D)
`
`* Compiler
`Compilerissuesstarting to clear
`
`* D3D
`
`
`
`Index Buffer optimization - complete
`Polygon Offset — complete
`Blit — complete
`Fixed Pipe Multi-texture — complete
`Fixed Pipe TCL — complete
`Pixel Shader 1.0-1.4 — complete
`enGL
`CopyPixels — complete; Drawpixels — complete
`Cubemapand 3D Texture — complete
`Immediate Mode—complete
`Multi-texture — complete
`Fragment Shader (ATI R200 Level) — complete
`Fixed Pipe Multi-texture — complete
`
`° Op
`
`ATI Confidential and Proprietary
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`AMD1044_0051176
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`ATI Ex. 2022
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`ATI Ex. 2022
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`

`
`R400 Risks / Issues Summary
`
`R400 Technology
`— Proceeding with TSMC 0.13 Low-K; need to continue to monitor status
`
`Hardware Design & Chip Integration
`— Validation / debug effort is the long pole
`— Virage STAR compiler - functional compiler deliverylate
`— Impacted completeness netlist one; second netlist with STAR
`
`
`
`Physical Design
`— Logic Designnetlist delivery continues; resolving issues
`— Early block delivery expected to realize schedule savings
`
`Overall
`— Debug progressing;full chip testing nowprogressing
`
`ATI
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`AMD1044_0051177
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`ATI Ex. 2022
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`

`

`
`
`R400 Program Schedule
`
`Task
`
`Emulator Test template Complete
`GC Emulatorintegration - 1 triangle
`Core Emulatorpixel / shadertests run
`Block Testing Begins
`GC/Chip Integration Start
`Simulate 1 Triangle / Emulator ready for SW
`First Syntheses (n-1)
`Verilog Feature Complete
`Second Synthesis (n)
`IKOS Emulation start
`
`Third Synthesis
`Early block delivery
`IKOS Emulation (w/ Software) begins
`RTL Freeze / Final Netlist (Gate level ECO only)
`A11 Base Layers Tapeout
`A11 Metal Layers Tapeout
`First Samples for Engineering
`A12 Tapeout
`A12 Samples for Engineering
`R400 Customer Samples
`Product Delivery
`
`Actual
`01-18-02
`02-21-02
`03-19-02
`05-01-02
`05-15-02
`07-01-02
`08-03-03
`
`10-04-02
`
`Plan
`01-18-02
`02-22-02
`03-15-02
`04-16-02
`05-17-02
`06-15-02
`07-12-02
`09-16-02
`09-23-02
`10-11-02
`11-01-02
`11-08-02
`11-11-02
`11-15-02
`01-10-03
`01-24-03
`
`Forecast
`
`10-31-02
`
`11-15-02
`11-01-02
`11-18-02
`12-16-02
`01-31-03
`03-28-03
`04-11-03
`06-25-03
`07-31-03
`09-04-03
`09-11-03
`10-04-03
`
`
`
`ATI Confidential and Proprietary
`
`AMD1044_0051178
`
`ATI Ex. 2022
`IPR2023-00922
`Page 10 of 14
`
`ATI Ex. 2022
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`IPR2023-00922
`Page 10 of 14
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`

`

`Back-up Slides
`
`
`
`
`ATI Confidential and Proprietary
`
`AMD1044_0051179
`
`ATI Ex. 2022
`IPR2023-00922
`Page 11 of 14
`
`ATI Ex. 2022
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`Page 11 of 14
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`

`

`
`Area Summary
`
`* Routing efficiency
`
`70%
`
`* Padsize
`
`(RV350)
`
`80u x 350u
`
`
`
`¢ R400 in 0.13u
`— Core Size
`— Total area (pad limited ?)
`
`¢
`
`RV4S5S0 in 0.09, (estimated)
`— Core Size
`— Total Area
`
`12.45mm
`
`~14mm
`
`8.1mm
`9.1mm
`
`ATI Confidential and Proprietary
`
`AMD1044_0051180
`
`ATI Ex. 2022
`IPR2023-00922
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`ATI Ex. 2022
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`Page 12 of 14
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`

`
`
` %4
`
`R400 Area Summary
`
`R400 Area Estimate (0.13)
`
`
`
`Pre Route=UVUlizad. Post Rowe Macro Total Unit Rv400
`
`
`
`
`
`
`Block RAO Oty—RAO TotalLogic Area on Logic Unit Area Area Area Qty RV400 Total
`
`BIF (Bustnterface)
`1,488,669
`2,126,956
`2126956
`0.70
`O
`1
`2126985:
`1.00
`2,126,956
`%
`DC (Display Controlier)
`2.677,600
`0,70
`3.825.429
`1,779948
`5.605377
`4
`$605,377
`1.00
`5,605,377
`1%
`VIP(Video tn Post)
`518,369
`0.70
`740,627
`47,892
`738.4'9
`1
`768,419
`1.00
`788,419
`CG (Clock Gen)
`340,700.70
`406,714
`224,000
`710714
`1
`TIO714
`1.00
`710,714
`O%
`ROMA(ROM ard debug controller)
`1:93, 104
`0.70
`275,983
`Qo
`275.863
`1
`775,863
`1.00
`275,983
`TSTC (Test Controite)
`9,600
`0.70
`13714
`o
`13714
`1
`13,714
`1.00
`W714
`%
`CP(Control Processor)
`3,366,639
`0.70
`4.800.484
`1,497,341
` 6,06.825
`1
`6,306,825,
`1.00
`6,308,825
`RBBM (Register Backbone Manager)
`221, 702
`0.70
`36717
`0
`36717
`1
`H6717
`1.00
`316,717
`44
`MMH (Memory Hub)
`3,834,989
`0.70
`6478499
`675,232.
`6.153.731
`1
`6,163,731
`O75
`4,615,298
`1%
`40CT
`847,462
`0.70
`1,210,646
`84403
`1,295,049
`1
`1,295,049
`100
`1,295,049
`1%
`VGT(Vertex Group aint Tesseiate)
`816,990
`0.70
`1,167,129.
`331,693
`1,498,822
`1
`1,498,922
`1.00
`1,493,822
`%
`PA(Viewport Xform, Clip and Setup)
`2.979,377
`0.70
`4.256.253
`580.018
`4.836.271
`1
`4836271
`100)
`4,338,271
`SC (Scan Converter}
`6,558,362
`0.70
`9,369,074
`568,187
`9.937.261
`1)
`9,937,261
`060
`5,962,357
`21%
`SP(Shader Pipe}
`3,992,400
`0.70
`6,705,423
`2,613,709
`8317138
`4
`33,268,552
`200
`16,634,276
`SQ (Sequencer)
`1,648,968
`0.70
`2,386,654
`2,333,798
`4.639.452
`1
`4689452
`1.00
`4,683,452
`10%
`TP(Texture Pipe)
`2,305,274
`0.70
`3,293,249
`596.989
`3.890.238
`4
`15560.990
`200
`7,780,475
`13%
`TC(Texture Cache)
`11,382,699
`0.70
`16.261,285'
`3,755,997
`20,016682 _
`1
`20,016682
`0.60
`12,010,009
`18%
`RB (Render Backend)
`3,584,000
`0.70
`$120,000
`1,233,000
`6,353,000
`4
`2412000
`200
`12,708,000
`RC (Render Central)
`40,000
`0.70
`67,143
`200,000
`257.143
`1
`287,143,
`1.00
`267,143
`SX (Shader Exporg
`524,$28
`9,70
`749,897
`1,616,000
`2,286,897
`2
`4,551,794
`1.00
`2,265,997
`MAC (Memory Coatrolier
`$43,312
`9.70
`776,100
`$26,757
`1,202917
`4
`$811,568
`200
`2,405,834
`Analog
`6.545,540
`8,154,400
`
`7
`ft
`
`%4
`
`w 4
`
`%
`
`Current Pad separation (um)
`Current Pad height (um)
`Senbe
`Core mmiside
`Total mmiside
`
`80
`350
`O18
`
`16,272, 364
`
`12.45
`1.3
`
`10.06
`10.94
`
`ATI Confidential and Proprietary
`
`AMD1044_0051181
`
`ATI Ex. 2022
`IPR2023-00922
`Page 13 of 14
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`ATI Ex. 2022
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`IPR2023-00922
`Page 13 of 14
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`
`
`and Proprietary
`
`AIL:
`
`AMD1044_0051182
`
`ATI Ex. 2022
`IPR2023-00922
`Page 14 of 14
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`ATI Ex. 2022
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`IPR2023-00922
`Page 14 of 14
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