LMC6953 PCI Local Bus Power Supervisor
`
`October 1996
`
`LMC6953
`PCI Local Bus Power Supervisor
`
`General Description
`The LMC6953 is a voltage supervisory chip designed to
`meet PCI (Peripheral Component Interconnect) Specifica-
`tions Revision 2.1. It monitors 5V and 3.3V power supplies.
`In cases of power-up, power-down, brown-out, power failure
`and manual reset interrupt, the LMC6953 provides an active
`low reset. RESET holds low for 100 ms after both 5V and
`3.3V powers recover, or after manual reset signal returns to
`high state. The external capacitor on pin 8 adjusts the reset
`delay.
`
`This part is ideal on PCI motherboards or add-in cards to
`ensure the integrity of the entire system when there is a
`fault condition. The active low reset sets the microprocessor
`or local device in a known state.
`
`The LMC6953 has a built-in bandgap reference that accu-
`rately determines all the threshold voltages. The internal re-
`set delay circuitry eliminates additional discrete compo-
`nents.
`
`Features
`Y Compliant to PCI specifications revision 2.1.
`Y Under and over voltage detectors for 5V and 3.3V
`Y Power
`failure detection (5V falling under 3.3V by
`300 mV max)
`Y Manual reset input pin
`Y Guaranteed RESET assertion at VDD e 1.5V
`Y Integrated reset delay circuitry
`Y Open drain output
`Y Adjustable reset delay
`Y Response time for over and under voltage
`detection
`Y Power failure response time
`Y Requires minimal external components
`
`490 ns Max
`90 ns Max
`
`Applications
`Y Desktop PCs
`Y PCI-Based Systems
`Y Network servers
`
`Typical Application Circuits
`On Mother Board
`
`On Add-in Cards
`
`TL/H/12846 – 23
`
`Ordering Information
`
`Package
`
`8-Pin Small
`Outline
`
`Commercial Temp Range
`0§C to a70§C
`
`LMC6953CM
`
`LMC6953CMX
`
`NSC
`Drawing
`
`M08A
`
`TL/H/12846 – 24
`
`Supplied
`As
`
`Rails
`
`2.5k Tape
`and Reel
`
`Connection
`Diagram
`
`8-Pin SO
`
`TL/H/12846 – 2
`Top View
`
`C1996 National Semiconductor Corporation
`
`TL/H/12846
`
`RRD-B30M116/Printed in U. S. A.
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 1
`
`

`

`Absolute Maximum Ratings (Note 1)
`If Military/Aerospace specified devices are required,
`please contact
`the National Semiconductor Sales
`Office/Distributors for availability and specifications.
`
`ESD Tolerance (Note 2)
`Human Body Model
`Machine Model
`
`Voltage at Input Pin
`
`Supply Voltage
`
`Current at Output Pin
`
`Current at Power Supply Pin (Note 3)
`
`2 kV
`200V
`
`7V
`
`7V
`
`15 mA
`
`10 mA
`
`Lead Temp. (Soldering, 10 sec.)
`
`Storage Temperature Range
`
`Junction Temperature
`
`260§C
`b65§C to a150§C
`150§C
`
`Operating Ratings (Note 1)
`Supply Voltage
`
`Junction Temperature Range
`LMC6953C
`Thermal Resistance (iJA)
`M Package
`
`1.5V to 6V
`
`0§C s TJ
`
`s 70§C
`
`165§C/W
`
`DC Electrical Characteristics
`Unless otherwise specified, all boldface limits guaranteed for TJ e 0§C to 70§C, VDD e 5V, RPULL-UP e 4.7 kX and CEXT e
`0.01 mF. Typical numbers are room temperature (25§C) performance.
`
`Symbol
`
`Parameter
`
`Conditions
`
`VH5
`
`VL5
`
`VH3.3
`
`VL3.3
`
`VDD Over-Voltage Threshold
`
`VDD Under-Voltage Threshold
`
`3.3V Over-Voltage Threshold
`
`3.3V Under-Voltage Threshold
`
`(Note 4)
`
`(Note 4)
`
`(Note 5)
`
`(Note 5)
`
`Min
`
`5.45
`
`4.25
`
`3.8
`
`2.5
`
`Typ
`
`5.6
`
`4.4
`
`3.95
`
`2.65
`
`Max
`
`5.75
`
`4.55
`
`4.1
`
`2.8
`
`2.8
`
`Units
`
`V
`
`V
`
`V
`
`V
`
`V
`
`VMR
`
`VPF
`
`RIN
`
`VOL
`
`IS
`
`Manual RESET Threshold
`
`Power Failure Differential Voltage
`(3.3V Pin – 5V Pin)
`
`(Note 6)
`
`Input Resistance at 5V and 3.3V Pins
`
`RESET Output Low
`
`Supply Current
`
`VDD e 1.5V to 6V
`
`(Note 3)
`
`2.5
`
`150
`
`35
`
`0.05
`
`0.8
`
`300
`
`0.1
`
`1.5
`
`mV
`
`kX
`
`V
`
`mA
`
`AC Electrical Characteristics
`Unless otherwise specified, all boldface limits guaranteed for TJ e 0§C to 70§C, VDD e 5V, RPULL-UP e 4.7 kX and CEXT e
`0.01 mF. Typical numbers are room temperature (25§C) performance.
`
`Symbol
`
`Parameter
`
`Conditions
`
`tD
`
`tPF
`
`Over or Under Voltage Response Time
`
`(Note 7)
`
`Power Failure Response Time
`
`(Note 8)
`
`tRESET
`
`Reset Delay
`
`CEXT e 0.01 mF
`
`LMC6953
`Limit
`
`490
`
`90
`
`Typ
`
`150
`
`40
`
`100
`
`Units
`
`ns
`max
`
`ns
`max
`
`ms
`
`Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
`intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
`
`Note 2: Human body model, 1.5 kX in series with 100 pF. Machine model. 200X in series with 100 pF.
`
`Note 3: Supply current measured at pins 1, 2, and 3. The 4.7 kX pull-up resistor on pin 7 is not tied to VDD in this measurement.
`Note 4: PCI Specifications Revision 2.1, Section 4.2.1.1 and Section 4.3.2.
`
`Note 5: PCI Specifications Revision 2.1, Section 4.2.2.1 and Section 4.3.2.
`
`Note 6: PCI Specifications Revision 2.1 and Section 4.3.2.
`
`Note 7: PCI Specifications Revision 2.1, Section 4.3.2. The response time is measured individually with g750 mV of overdrive applied to pin 2 then g600 mV of
`overdrive applied to pin 3 and taking the worst number of the four measurements.
`
`Note 8: PCI Specifications Revision 2.1, Section 4.3.2. The power failure response time is measured with a signal changing from 5V to 3V applied to pin 2 and a
`3.3V DC applied to pin 3.
`
`http://www.national.com
`
`2
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 2
`
`

`

`LMC6953 Timing Diagram
`
`Note: tRESET, tD and tPF are not to scale.
`
`TL/H/12846 – 3
`
`3
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 3
`
`

`

`Typical Performance Characteristics Unless otherwise specified, TA e 25§C
`
`Supply Current vs Temperature
`
`Output Voltage vs Supply Voltage
`
`TL/H/12846 – 4
`
`TL/H/12846 – 12
`
`Power-Up Supply Voltage
`vs Temperature
`
`VH5 vs Temperature
`
`TL/H/12846 – 9
`
`TL/H/12846 – 5
`
`VL5 vs Temperature
`
`VH3.3 vs Temperature
`
`TL/H/12846 – 6
`
`TL/H/12846 – 7
`
`http://www.national.com
`
`4
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 4
`
`

`

`Typical Performance Characteristics Unless otherwise specified, TA e 25§C (Continued)
`
`VL3.3 vs Temperature
`
`Over-Voltage Response Time
`vs Temperature
`
`TL/H/12846 – 8
`
`TL/H/12846 – 13
`
`Under-Voltage Response Time
`vs Temperature
`
`Power Failure Response Time
`vs Temperature
`
`TL/H/12846 – 14
`
`TL/H/12846 – 15
`
`VOL vs RPULL-UP
`
`IOL vs RPULL-UP
`
`TL/H/12846 – 19
`
`TL/H/12846 – 20
`
`5
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 5
`
`

`

`Typical Performance Characteristics Unless otherwise specified, TA e 25§C (Continued)
`
`Reset Delay vs CEXT
`
`Reset Delay vs Temperature
`with CEXT e 0.01 mF
`
`TL/H/12846 – 10
`
`TL/H/12846 – 11
`
`http://www.national.com
`
`6
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 6
`
`

`

`Block Diagram of the LMC6953
`
`** All five comparators’ positive power supplies are connected to VDD
`
`Truth Table
`
`Power Failure
`
`5V Over-Voltage
`
`5V Under-Voltage
`
`3.3V Over-Voltage
`
`3.3V Under-Voltage
`
`MR
`
`RESET
`
`TL/H/12846 – 25
`
`Fail
`
`X
`
`X
`
`X
`
`X
`
`X
`
`OK
`
`X
`
`Fail
`
`X
`
`X
`
`X
`
`X
`
`OK
`
`X e Don’t Care
`
`Pin Description
`
`Pin
`
`Name
`
`X
`
`X
`
`Fail
`
`X
`
`X
`
`X
`
`OK
`
`X
`
`X
`
`X
`
`Fail
`
`X
`
`X
`
`OK
`
`Function
`
`X
`
`X
`
`X
`
`X
`
`Fail
`
`X
`
`OK
`
`High
`
`High
`
`High
`
`High
`
`High
`
`Low
`
`High
`
`Low
`
`Low
`
`Low
`
`Low
`
`Low
`
`Low
`
`High
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`VDD
`
`5V
`
`3.3V
`
`MR
`
`5V input supply voltage. This pin supplies power to the internal comparators. It can be connected to a
`capacitor acting as a back-up battery. Otherwise, it should be shorted to the 5V pin.
`
`5V input supply voltage. This pin is not connected to the positive power supply of the internal comparators. It
`provides input signal to the 5V window comparators as well as the power failure comparator.
`
`3.3V input supply voltage. This pin provides input signal to the 3.3V window comparators and the power failure
`comparator.
`
`Manual reset input pin. It takes 5V CMOS logic low and triggers RESET. If not used, this pin should be
`connected to VDD.
`
`PWRdžGND Ground.
`GND
`This pin should be grounded at all times.
`
`RESET
`
`Active low reset output. RESET holds low for 100 ms after both 5V and 3.3V powers recover, or after manual
`reset signal returns to high state.
`
`CEXT
`
`External capacitor pin. The value of CEXT sets the reset delay.
`
`7
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 7
`
`

`

`5V AND VDD PINS
`By having the 5V and the VDD pins separately, a capacitor
`can be used as a back-up power supply in event of a sud-
`den power supply failure. This circuit is shown in the appli-
`cation circuit section titled ‘‘On Motherboard With Capacitor
`as a Back-up Power Supply.’’ Under normal condition, the
`diode is forward-biased and the capacitor is charged up to
`VDD b 0.7V. If the power supply goes away, the diode be-
`comes reverse-biased, isolating the 5V and the VDD pins.
`The capacitor provides power to the internal comparators
`for a short duration for the LMC6953 to operate.
`
`CEXT SETS RESET DELAY IN LINEAR FASHION
`The LMC6953 has internal delay circuitry to generate the
`reset delay. By choosing different values of capacitor CEXT,
`reset delay can be programmed to the desired length for the
`system to stabilize after a fault condition occurs.
`
`EVALUATING THE LMC6953
`
`To Measure Over-Voltages and Under-Voltages.
`Connect a 3.3V DC to the 3.3V pin and a 5V DC to the VDD
`and the 5V pins (VDD and 5V pins are shorted). RESET
`output is high because voltages are within window. These
`voltages should be monitored. While keeping the 3.3V con-
`stant, increase the 5V DC signal until a RESET low is de-
`tected. The point on the 5V DC signal at which RESET
`changes from high to low is the 5V over-voltage. It is typical-
`ly 5.6V. To detect 5V under-voltage, start the 5V DC signal
`from 5V and decrease it until a RESET low is detected. The
`point on the 5V DC signal at which RESET changes from
`high to low is the 5V under-voltage. It is typically 4.4V.
`
`To find 3.3V over-voltage and under-voltage, keep the 5V
`DC at 5V and vary the 3.3V DC signal until a RESET low is
`detected.
`
`To Measure Timing Specifications.
`For evaluation purposes only, the VDD and the 5V pins
`should have separate signals. It is easier to measure re-
`sponse time in this manner. The VDD pin is connected to a
`steady 5V DC and the 5V pin is connected to a pulse gener-
`ator. To simulate the power supply voltages going out of
`window, a pulse generator with disable/enable feature and
`rise and fall time adjustment is recommended. To measure
`the RESET signal, a oscilloscope is recommended because
`of its ability to capture and store a signal.
`
`Application Note
`
`HOW THE LMC6953 FUNCTIONS
`
`The LMC6953 is a power supply supervisor with its perform-
`ance specifications compliant to PCI Specifications Revi-
`sion 2.1. The chip monitors power-up, power-down, brown-
`out, power failure and manual reset interrupt situations.
`
`During power-up, the LMC6953 holds RESET low for 100
`ms after both 5V and 3.3V are within specified windows. It
`asserts reset in 490 ns when a brown-out is detected.
`Brown-out occurs when 5V supply is above 5.75V over-volt-
`age or below 4.25V under-voltage or when 3.3V supply is
`above 4.1V over-voltage or 2.5V under-voltage. In case of
`power failure where the 5V supply falls under 3.3V supply by
`300 mV maximum, reset is asserted in 90 ns. RESET also
`can be asserted by sending a 5V CMOS logic low to the
`manual reset pin.
`
`Each time RESET is asserted, it holds low for 100 ms after a
`fault condition is recovered. The 100 ms reset delay is gen-
`erated by the 0.01 mF CEXT capacitor, and can be adjusted
`by changing the value of CEXT.
`It is highly recommended to place lands on printed circuit
`boards for 120 pF capacitors between pin 2 and ground and
`also between pin 3 and ground. As power supplies may
`change abruptly, there can be very high frequency noise
`present and the capacitors can minimize the noise,
`
`MINIMUM SUPPLY VOLTAGE FOR RESET ASSERTION
`The LMC6953 guarantees VDD e 1.5V as the minimum
`supply voltage to achieve consistent RESET assertion. This
`ensures system stability in initialization state.
`
`TL/H/12846 – 12
`FIGURE 1. Output Voltage vs Supply Voltage
`
`Figure 1 is measured by shorting pins 1, 2 and 3 together
`when supply voltage is from 0V to 3.3V. Then pin 3 is con-
`nected with a constant 3.3 VDC and pins 1 and 2 are con-
`nected to a separate power supply that continues to vary
`from 3.3V to 6V.
`
`http://www.national.com
`
`8
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 8
`
`

`

`Application Note (Continued)
`To measure the 5V under-voltage response time on the
`LMC6953, set the pulse generator to trigger mode and pro-
`gram the amplitude to have a high value of 5V and a low
`value of the 5V under-voltage threshold measured previous-
`ly with 50 mV overdrive. For example, if the measured 5V
`under-voltage is 4.4V, then a 50 mV overdrive on this signal
`is 4.35V. The disable feature on the pulse generator should
`be on. Program the fall time of the pulse to be 30 ns and
`program the scope to trigger on the falling edge, with trigger
`level of 4.5V. Set the scope to 200 ns/division. The probes
`should be connected to the 5V pin and the RESET pin. Now
`enable the 5V signal from the pulse generator and trigger
`the signal. Be aware that when the signal is enabled, there
`is high frequency noise present, and putting a 120 pF ca-
`pacitor between the 5V pin and ground suppresses some of
`the noise. Response time is measured by taking the 5V
`under-voltage threshold on the 5V signal
`to the point
`
`where RESET goes low. Figure2 shows a scope photo of
`5V under-voltage waveforms. It is taken with a signal going
`from 5V to 4.25V at the 5V pin.
`
`To measure the 100 ms RESET delay, change the scope to
`50 ms/division and trigger the 5V signal again. RESET
`should stay low for 100 ms after the 5V is recovered and
`within window.
`
`Other over-voltages and under-voltages can be measured
`by changing the pulse generator to different voltage steps.
`Putting a 120 pF capacitor between the 3.3V pin and ground
`is recommended in evaluating 3.3V signal.
`
`To measure power-failure response time, set the pulse gen-
`erator from 5V to 3V with fall time of the pulse 3 ns and
`connect it to the 5V pin. RESET should go low within 90 ns
`of power failure. Figure 3 shows a scope photo of power
`failure waveforms. It is taken with a signal going from 5V to
`3V at the 5V pin.
`
`TL/H/12846 – 21
`FIGURE 2. 5V Under-Voltage Waveforms
`
`TL/H/12846 – 22
`FIGURE 3. Power Failure Waveforms
`
`9
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 9
`
`

`

`Typical Application Circuits
`
`On Mother Board
`
`On Mother Board with Capacitor as a Back-up Power Supply
`
`TL/H/12846 – 17
`
`TL/H/12846 – 26
`
`On Add-In Cards
`
`TL/H/12846 – 18
`
`http://www.national.com
`
`10
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 10
`
`

`

`11
`
`http://www.national.com
`
`Samsung Electronics Co., Ltd.
`Ex. 1063, p. 11
`
`

`

`Physical Dimensions inches (millimeters) unless otherwise noted
`
`LMC6953PCILocalBusPowerSupervisor
`
`8-Pin Small Outline Package
`Order Number LMC6953CM or LMC6953CMX
`NS Package Number M08A
`
`LIFE SUPPORT POLICY
`
`NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
`DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
`SEMICONDUCTOR CORPORATION. As used herein:
`
`1. Life support devices or systems are devices or
`systems which, (a) are intended for surgical
`implant
`into the body, or (b) support or sustain life, and whose
`failure to perform, when properly used in accordance
`with instructions for use provided in the labeling, can
`be reasonably expected to result in a significant injury
`to the user.
`
`is any component of a life
`2. A critical component
`support device or system whose failure to perform can
`be reasonably expected to cause the failure of the life
`support device or system, or to affect its safety or
`effectiveness.
`
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`Corporation
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`
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`
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`
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