`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Ordering Information
`
`Description
`Part Numbers
`SG5127FBD225652-SA 512Mx72 (4GB), DDR2, 240-pin Fully
`Buffered DIMM, ECC, 512Mx4 Based
`(Stacked - two 256Mx4), PC2-5300,
`DDR2-667-555, 30.35mm, Green Mod-
`ule (RoHS Compliant).
`Label:
`4GB 2Rx4 PC2-5300F-555-11-D_*
`
`* This character defines PCB revision.
`
`AMB Vendor
`IDT, Rev. A1.5
`AMB0480A5RJ
`
`Device Vendor
`Samsung, Rev. A
`K4T2G264QA-ZCE6
`
`(All specifications of this module are subject to change without notice.)
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`

`
`
`• March 20, 2007
`Datasheet released.
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Revision History
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`4GByte (512Mx72) DDR2 SDRAM Module - 512Mx4 Based (Stacked - two 256Mx4)
`240-pin Fully Buffered DIMM, ECC
`
`Features:
`
`Device Speed CL (Device) Cycle Time
`
`Link Speed
`
`DDR2-667
`
`3.0/4.0/5.0
`
`3.0ns
`
`4.0Gb/s
`
`• High-Speed differential PTP link between Controller & AMB
`• SMBus Interface access to AMB Configuration Registers
`
`• AMB allows upto 8 Double-Rank DIMMs/Channel (288
`devices) Transparent Mode for DRAM Test
`• MEMBIST and IBIST Test Functions
`• VDD = VDDQ = 1.8V +/- 0.1V (for DDR2 SDRAM)
`• VCC = 1.5V +/- 0.045V (for AMB)
`• VTT = 0.9V +/- 0.036V (DRAM Interface Termination)
`• VDDSPD = 3.3V +/- 0.3V
`• Dual Rank Module (JEDEC Raw Card “D”)
`• Lead Finish : Gold
`
`FBD/AMB Specifications:
`
`Fully Buffered DIMM (FBD) provides a high memory bandwidth, large capacity channel solution that has a narrow
`host interface. Fully Buffered DIMMs use commodity DRAMs isolated from the channel behind a buffer (AMB) on
`the DIMM. The memory capacity is 288 devices per channel and total memory capacity scales with DRAM bit den-
`sity. Currently, FBD/AMB specification is broken-out into the following specifications:
`
`1. FBD Design Specification: This specification defines the electrical and mechanical requirements for 240-pin,
`PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-
`Line Memory Modules (DDR2 SDRAM FBDs).
`
`2. FBD Architecture and Protocol Specification: This specification covers Overview, Channel Initialization, Chan-
`nel Protocol, and Reliability, Availability, and Serviceability (RAS) features of FBDIMM architecture.
`
`3. FBD AMB Specification: The Advanced Memory Buffer allows buffering of memory traffic to support large
`memory capacities. This specification covers information about various AMB interfaces (Channel/DRAM), Test
`& Initialization functions, SMBus Interface, Clocking, Registers, etc.
`
`4. FBD High-Speed Differential PTP Link Specification: This specification defines the high-speed differential
`point-to-point signaling link for FB-DIMM, operating at the buffer supply voltage of 1.5V that is provided at the
`FBDIMM connector. This specification also applies to FBD host chips which may operate with a different sup-
`ply voltage. The link consists of a transmitter and a receiver and the interconnect in between them. The trans-
`mitter sends serialized bits into a lane and the receiver accepts the electrical signals of the serialized bits and
`transforms them into a serialized bit-stream.The link utilizes a derived clock approach and transmitter de-
`emphasis to compensate for channel loss characteristics.
`
`5. FBD SPD Specification: This specification describes the Serial Presence Detect (SPD) values for FBD.
`
`6. FBD DFx Specification: The FB-DIMM DFx spec covers Design for Test (DFT), Design for Manufacturing
`(DFM) and Design for Validation (DFV) requirements and implementation guidelines for Fully Buffered DIMM
`technology.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`

`
`
`DDR2 240-Pin FB-DIMM Pin List
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Pin
`No.
`1
`2
`
`3
`4
`5
`6
`7
`8
`9
`10
`
`Pin
`Name
`VDD
`VDD
`VDD
`VSS
`VDD
`VDD
`VDD
`VSS
`VCC
`VCC
`VSS
`11
`VCC
`12
`VCC
`13
`VSS
`14
`VTT
`15
`VID1
`16
`17 RESET#
`18
`VSS
`19 RFU
`
`20 RFU
`21
`VSS
`22
`PN0
`23
`PN0#
`24
`VSS
`25
`PN1
`26
`PN1#
`27
`VSS
`28
`PN2
`
`29
`30
`
`PN2#
`VSS
`
`Pin
`No.
`31
`32
`
`33
`34
`35
`36
`37
`38
`39
`40
`
`Pin
`Name
`PN3
`PN3#
`VSS
`PN4
`PN4#
`VSS
`PN5
`PN5#
`VSS
`PN13
`
`PN13#
`41
`VSS
`42
`VSS
`43
`44 RFU
`45 RFU
`46
`VSS
`47
`VSS
`48
`PN12
`49
`PN12#
`VSS
`PN6
`PN6#
`VSS
`PN7
`PN7#
`VSS
`PN8
`PN8#
`VSS
`PN9
`
`50
`51
`52
`53
`54
`55
`56
`57
`58
`
`59
`60
`
`Pin
`No.
`61
`62
`
`63
`64
`65
`66
`67
`68
`69
`70
`
`71
`72
`73
`74
`75
`76
`77
`78
`79
`
`Pin
`Name
`PN9#
`VSS
`PN10
`PN10#
`VSS
`PN11
`PN11#
`VSS
`VSS
`PS0
`
`PS0#
`VSS
`PS1
`PS1#
`VSS
`PS2
`PS2#
`VSS
`PS3
`
`PS3#
`80
`VSS
`81
`PS4
`82
`PS4#
`83
`VSS
`84
`VSS
`85
`86 RFU
`87 RFU
`88
`VSS
`VSS
`PS9
`
`89
`90
`
`Pin
`No.
`91
`92
`
`Pin
`Name
`PS9#
`VSS
`PS5
`93
`PS5#
`94
`VSS
`95
`PS6
`96
`PS6#
`97
`VSS
`98
`PS7
`99
`100 PS7#
`101 VSS
`102 PS8
`103 PS8#
`104 VSS
`105 RFU
`106 RFU
`107 VSS
`108 VDD
`109 VDD
`110 VSS
`111 VDD
`112 VDD
`113 VDD
`114 VSS
`115 VDD
`116 VDD
`117 VTT
`118 SA2
`
`119 SDA
`120 SCL
`
`Pin
`Pin
`Name
`No.
`121 VDD
`122 VDD
`123 VDD
`124 VSS
`125 VDD
`126 VDD
`127 VDD
`128 VSS
`129 VCC
`130 VCC
`161 SN13#
`131 VSS
`162 VSS
`132 VCC
`163 VSS
`133 VCC
`164 RFU
`134 VSS
`165 RFU
`135 VTT
`166 VSS
`136 VID0
`137 DNU/M_Test 167 VSS
`168 SN12
`138 VSS
`139 RFU
`169 SN12#
`170 VSS
`171 SN6
`172 SN6#
`173 VSS
`174 SN7
`175 SN7#
`176 VSS
`177 SN8
`178 SN8#
`179 VSS
`180 SN9
`
`140 RFU
`141 VSS
`142 SN0
`143 SN0#
`144 VSS
`145 SN1
`146 SN1#
`147 VSS
`148 SN2
`
`149 SN2#
`150 VSS
`
`Pin
`Pin
`Name
`No.
`151 SN3
`152 SN3#
`153 VSS
`154 SN4
`155 SN4#
`156 VSS
`157 SN5
`158 SN5#
`159 VSS
`160 SN13
`
`Pin
`Pin
`Name
`No.
`181 SN9#
`182 VSS
`183 SN10
`184 SN10#
`185 VSS
`186 SN11
`187 SN11#
`188 VSS
`189 VSS
`190 SS0
`
`191 SS0#
`192 VSS
`193 SS1
`194 SS1#
`195 VSS
`196 SS2
`197 SS2#
`198 VSS
`199 SS3
`
`200 SS3#
`201 VSS
`202 SS4
`203 SS4#
`204 VSS
`205 VSS
`206 RFU
`207 RFU
`208 VSS
`209 VSS
`210 SS9
`
`Pin
`Pin
`Name
`No.
`211 SS9#
`212 VSS
`213 SS5
`214 SS5#
`215 VSS
`216 SS6
`217 SS6#
`218 VSS
`219 SS7
`220 SS7#
`221 VSS
`222 SS8
`223 SS8#
`224 VSS
`225 RFU
`226 RFU
`227 VSS
`228 SCK
`229 SCK#
`230 VSS
`231 VDD
`232 VDD
`233 VDD
`234 VSS
`235 VDD
`236 VDD
`237 VTT
`238 VDDSPD
`239 SA0
`240 SA1
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`
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`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Pin Description:
`DIMM Connector Pin Description
`Function
`Symbol
`Type
`Polarity
`Positive line of the differential pair of system clock inputs.
`SCK
`Input
`Positive Edge
`SCK#
`Input
`Negative Edge Negative line of the differential pair of system clock inputs.
`PN0 ~ PN13
`Output
`Positive Edge
`Primary Northbound Data, positive lines.
`PN0# ~ PN13# Output
`Negative Edge Primary Northbound Data, negative lines.
`PS0 ~ PS9
`Input
`Positive Edge
`Primary Southbound Data, positive lines.
`PS0# ~ PS9#
`Input
`Negative Edge Primary Southbound Data, negative lines.
`SN0 ~ SN13
`Input
`Positive Edge
`Secondary Northbound Data, positive lines.
`SN0# ~ SN13#
`Input
`Negative Edge Secondary Northbound Data, negative lines.
`SS0 ~ SS9
`Output
`Positive Edge
`Secondary Southbound Data, positive lines.
`SS0# ~ SS9#
`Output
`Negative Edge Secondary Southbound Data, negative lines.
`SCL
`Input/Output
`-
`Serial Presence Detect (SPD) for Clock Input.
`SDA
`Input/Output
`-
`SPD Data Input/Output.
`SA0 ~ SA2
`Input
`-
`SPD Address Inputs, also used to select the DIMM number in the AMB.
`VID0 ~ VID1
`Supply
`-
`Voltage ID: These pins must be unconnected for DDR2-based Fully
`Buffered DIMMs.
`VID0 is VDD value: OPEN = 1.8V, GND = 1.5V;
`VID1 is VCC value: OPEN = 1.5V, GND = 1.2V;
`AMB Core Power and AMB Channel Interface Power(1.5 Volt).
`DRAM Power and AMB DRAM I/O Power(1.8 Volt).
`Ground.
`DRAM Address/Command/Clock termination Power (VDD/2).
`SPD Power (3.3 Volt).
`Advanced Memory Buffer (AMB) reset signal.
`Reserved for Future Use.
`The DNU/M_Test pin provides an external connection for testing the
`margin of VREF which is produced by a voltage divider on the module. It
`is not intended to be used in normal system operation and must not
`be connected (DNU) in a system.
`
`-
`-
`-
`-
`-
`Active Low
`-
`-
`
`VCC
`VDD
`VSS
`VTT
`VDDSPD
`RESET#
`RFU
`DNU/M_Test
`
`Supply
`Supply
`Supply
`Supply
`Supply
`Input
`-
`-
`
`Note: System Clock Signals (SCK & SCK#) switch at one-half the DRAM CK/CK# frequency.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`

`SG5127FBD225652-SA
`
`March 20, 2007
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`AMB
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`Upto 8 Modules
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`AMB
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`AMB
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`AMB
`
`DRAM
`
`DRAM
`
`DRAM
`
`DRAM
`
`
`
`FBD System Block Diagram
`
`N S
`
`Host
`
`10
`
`14
`
`SMBus
`
`CLK Synth
`
`CLK BUFFER
`
`The above system block diagram shows a generic example of a clock distribution for a simple single-channel FBD
`Platform. Also shown are the Northbound/Southbound channels as well as SMBus Interface. “Northbound” refers
`to the transfer of data towards host Controller. “Southbound” refers to the transfer of data away from the host con-
`troller.
`
`An FBD channel can support upto 8 double-rank modules (36 devices each) for a total of 288 devices.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Advanced Memory Buffer - Interface Block Diagram
`
`Secondary or to Optional
`Next FBD
`
`CLK0# ~ CLK1#
`CLK0 ~ CLK1
`DQS0# ~ DQS17#
`DQS0 ~ DQS17
`DQ0 ~ DQ63, CB0 ~ CB7
`ODT0
`CS0# ~ CS1#
`CKE0 ~ CKE1
`CAS#, RAS#, WE#
`A0 ~ A15, BA0 ~ BA2
`
`Memory Interface
`
`NB FBD
`Inlink
`
`SB FBD
`Outlink
`
`SN0 ~ SN13
`SN0# ~ SN13#
`
`SS0 ~ SS9
`SS0# ~ SS9#
`
`AMB
`
`Primary or Host
`Direction
`
`PN0 ~ PN13
`PN0# ~ PN13#
`
`PS0 ~ PS9
`PS0# ~ PS9#
`
`SDA
`SCL
`SA0 ~ SA2
`
`Outlink
`
`SB FBD
`Inlink
`
`SMBus
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
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`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`AMB Pin Description
`FBD Channel Signals (Signal Count: 99)
`Pin Name
`Pin Description
`SCK
`Positive line of the differential pair of system clock inputs.
`SCK#
`Negative line of the differential pair of system clock inputs.
`PN0 ~ PN13
`Primary Northbound Data, positive lines.
`PN0# ~ PN13#
`Primary Northbound Data, negative lines.
`PS0 ~ PS9
`Primary Southbound Data, positive lines.
`PS0# ~ PS9#
`Primary Southbound Data, negative lines.
`SN0 ~ SN13
`Secondary Northbound Data, positive lines.
`SN0# ~ SN13#
`Secondary Northbound Data, negative lines.
`SS0 ~ SS9
`Secondary Southbound Data, positive lines.
`SS0# ~ SS9#
`Secondary Southbound Data, negative lines.
`To an external precision calibration resistor connected to VCC.
`FBDRES
`
`Count
`1
`1
`14
`14
`10
`10
`14
`14
`10
`10
`1
`
`Count
`9
`9
`9
`
`9
`64
`8
`32
`
`6
`
`6
`
`2
`4
`
`4
`
`4
`
`4
`
`DDR2 Interface Signals (Signal Count: 175)
`Pin Name
`Pin Description
`DQS0 ~ DQS8
`Data Strobes, positive lines.
`DQS0# ~ DQS8#
`Data Strobes, negative lines.
`DQS9 ~ DQS17/
`Data Strobes (x4 DRAM only), positive lines. These signals are driven
`DM0 ~ DM8
`low to x8 DRAM on writes.
`DQS9# ~ DQS17#
`Data Strobes (x4 DRAM only), negative lines.
`DQ0 ~ DQ63
`Data.
`CB0 ~ CB7
`Checkbits.
`Address.
`A0A ~ A15A,
`A0B ~ A15B
`BA0A ~ BA2A,
`BA0B ~ BA2B
`RASA#, RASB#,
`CASA#, CASB#,
`WEA#, WEB#
`ODTA, ODTB
`CKE0A, CKE1A,
`CKE0B, CKE1B
`CS0A#, CS1A#,
`CS0B#, CS1B#
`CLK0 ~ CLK3
`
`Bank Select Addresses.
`
`Command Signals.
`
`On-Die Termination Enable.
`Clock Enable (One per Rank).
`
`Chip Select (One per Rank).
`
`CLK0# ~ CLK3#
`
`CLK[1:0] used on 9 and 18 device DIMMs, CLK[3:0] used on 36 device DIMMs.
`CLK[3:2] should be output disabled when not in use.
`Clock, Negative lines.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`8
`
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`Samsung v Netlist
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`
`

`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`AMB Pin Description (Contd...)
`DDR2 Interface Signals (Contd...)
`Pin Name
`Pin Description
`DDRC_C14
`DDR Compensation: Common return pin for DDRC_B18 and DDRC_C18.
`DDRC_B18
`DDR Compensation: Resistor connected to common return pin DDRC_C14.
`DDRC_C18
`DDR Compensation: Resistor connected to common return pin DDRC_C14.
`DDR Compensation: Resistor connected to VSS.
`DDRC_B12
`DDRC_C12
`DDR Compensation: Resistor connected to VDD.
`
`SPD Bus Interface Signals (Signal Count: 5)
`Pin Name
`Pin Description
`SCL
`Serial Presence Detect (SPD) Clock Input.
`SDA
`SPD Data Input/Output.
`SA0 ~ SA2
`SPD Address Inputs, also used to select the DIMM number in the AMB.
`
`Miscellaneous (Signal Count: 163)
`Pin Name
`Pin Description
`PLLTSTO
`PLL Clock Observability Output.
`Analog VCC for the PLL. Tied with low pass filter to VCC.
`VCCAPLL
`VSSAPLL
`Analog VSS for the PLL. Tied to ground on the AMB die. Do not tie to ground on the
`DIMM.
`Leave floating on the DIMM.
`Tie to ground on the DIMM.
`Tie to ground to set functionality as “buffer on DIMM.”
`AMB Reset Signal.
`No connect. Many NC are connected to VDD on the DIMM, to lower the impedance of
`the VDD power islands.
`Reserved for Future Use.
`
`TEST_pin#
`TESTLO_pin#
`BFUNC
`RESET#
`NC
`
`RFU
`
`Power/Ground Signals (Signal Count: 213)
`Pin Name
`Pin Description
`AMB Core Power (1.5 Volt).
`VCC
`VCCFBD
`AMB Channel I/O Power (1.5 Volt).
`VDD
`AMB DRAM I/O Power (1.8 Volt).
`VDDSPD
`SPD Power (3.3 Volt).
`VSS
`Ground.
`
`Count
`1
`1
`1
`1
`1
`
`Count
`1
`1
`3
`
`Count
`1
`1
`1
`
`6
`5
`1
`1
`129
`
`18
`
`Count
`24
`8
`24
`1
`156
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`9
`
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`
`

`

`
`
`Block Diagram
`RCS0#
`RCS1#
`RCKE0
`RCKE1
`RODT0
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`DQS0
`
`DQS0#
`DQ0
`DQ1
`DQ2
`DQ3
`DQS1
`
`DQS1#
`DQ8
`DQ9
`DQ10
`DQ11
`DQS2
`
`DQS2#
`DQ16
`DQ17
`DQ18
`DQ19
`DQS3
`
`DQS3#
`DQ24
`DQ25
`DQ26
`DQ27
`DQS4
`
`DQS4#
`DQ32
`DQ33
`DQ34
`DQ35
`DQS5
`
`DQS5#
`DQ40
`DQ41
`DQ42
`DQ43
`DQS6
`
`DQS6#
`DQ48
`DQ49
`DQ50
`DQ51
`DQS7
`
`DQS7#
`DQ56
`DQ57
`DQ58
`DQ59
`DQS8
`
`DQS8#
`CB0
`CB1
`CB2
`CB3
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D0
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D1
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D2
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D3
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D4
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D5
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D6
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D7
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D18
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D19
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D20
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D21
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D22
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D23
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D24
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D25
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D8
`
`D26
`
`DQS S# CKE ODT
`DQS S# CKE ODT
`DQS17#
`DQS#
`DQS#
`CB4
`I/O 0
`I/O 0
`CB5
`I/O 1
`I/O 1
`CB6
`I/O 2
`I/O 2
`CB7
`I/O 3
`I/O 3
`Note: Unless otherwise noted, data resistor values are 22Ω ± 5%.
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`DQS9
`
`DQS9#
`DQ4
`DQ5
`DQ6
`DQ7
`DQS10
`
`DQS10#
`DQ12
`DQ13
`DQ14
`DQ15
`DQS11
`
`DQS11#
`DQ20
`DQ21
`DQ22
`DQ23
`DQS12
`
`DQS12#
`DQ28
`DQ29
`DQ30
`DQ31
`DQS13
`
`DQS13#
`DQ36
`DQ37
`DQ38
`DQ39
`DQS14
`
`DQS14#
`DQ44
`DQ45
`DQ46
`DQ47
`DQS15
`
`DQS15#
`DQ52
`DQ53
`DQ54
`DQ55
`DQS16
`
`DQS16#
`DQ60
`DQ61
`DQ62
`DQ63
`DQS17
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D9
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D10
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D11
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D12
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D13
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D14
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D15
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D16
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D27
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D28
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D29
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D30
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D31
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D32
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D33
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D34
`
`D17
`
`DQS S# CKE ODT
`DQS#
`I/O 0
`I/O 1
`I/O 2
`I/O 3
`
`D35
`
`10
`
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`
`

`

`
`
`SPD
`EEPROM
`SA0 VDD
`SA1
`U1
`SA2
`SCL
`SDA WP
`
`SA0
`SA1
`SA2
`SCL
`SDA
`
`VDDSPD
`
`PN0 ~ PN13
`PN0# ~ PN13#
`PS0 ~ PS9
`PS0# ~ PS9#
`
`SCL
`SDA
`SA0 ~ SA2
`SCK, SCK#
`RESET#
`
`ODT0, RAS#, CAS#, WE#,
`A0 ~ A15, BA0 ~ BA2,
`CK0 ~ CK3, CK0# ~ CK3#
`
`30Ω
`
`VTT
`
`CS0#, CS1#, CKE0, CKE1
`
`39Ω
`
`VTT
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`SN0~SN13
`SN0#~SN13#
`SS0~SS9
`SS0#~SS9#
`
`DQ0 ~ DQ63
`CB0 ~ CB7
`DQS0 ~ DQS17
`DQS0# ~ DQS17#
`A0 ~ A13
`BA0 ~ BA2
`RAS#
`CAS#
`WE#
`ODT0
`CKE0, CKE1
`CS0#, CS1#
`CK0 ~ CK3
`CK0# ~ CK3#
`
`A
`
`M
`
`B
`
`Command,
`Address, and
`CLK signals
`to DDR2
`Channel
`
`VDD/VDDSPD/VREF/VCC/VTT
`
`Decoupling
`Capacitors
`(10µF, 2.2µF, 1µF, 0.22µF, 0.1µF, 33nF, 10nF)
`
`VSS
`
`Notes:
`1. There are two physical copies of each address/command/control/clock.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`11
`
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`IPR2022-00996
`
`

`

`
`
`Physical Dimensions
`
`240-pin Fully Buffered DIMM
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`(All dimensions are in millimeters with ±0.15mm tolerance unless specified otherwise.)
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`12
`
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`

`

`
`
`Physical Dimensions (Contd.)
`
`240-pin Fully Buffered DIMM
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`(All dimensions are in millimeters with ±0.15mm tolerance unless specified otherwise.)
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`13
`
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`
`

`

`
`
`Serial Presence Detect Table
`
`Byte No. Byte Description
`0
`Number of Bytes Utilized/Number of Bytes in SPD
`Device/CRC Coverage
`SPD Revision
`Key Byte
`Voltage Levels of this assembly
`SDRAM Addressing
`Module Physical Attributes
`
`1
`2
`3
`4
`5
`
`6
`7
`8
`9
`10
`11
`
`12
`
`13
`14
`
`15
`16
`
`17
`18
`19
`
`20
`
`21
`
`22
`
`23
`
`24
`
`25
`
`26
`
`Module Type
`Module Organization
`Fine Timebase (FTB) Dividend and Divisor
`Medium Timebase (MTB) Dividend
`Medium Timebase (MTB) Divisor
`Minimum SDRAM Cycle Time (tCKmin)
`Maximum SDRAM Cycle Time (tCKmax)
`CAS# Latencies Supported
`Minimum CAS# Latency Time (tAAmin)
`Write Recovery Times Supported
`Write Recovery Time (tWR)
`Write Latencies Supported
`Additive Latencies Supported
`Minimum RAS# to CAS# Delay (tRCD)
`Minimum Row Active to Row Active Delay (tRRD)
`Minimum Row Precharge Time (tRP)
`Upper Nibbles for tRAS and tRC
`Minimum Active to Precharge Time (tRAS)
`Minimum Active to Active/Refresh Time (tRC)
`Minimum Refresh Recovery Time Delay (tRFC)
`…Minimum Refresh Recovery Time Delay (tRFC)
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Value Supported
`176 Bytes
`
`Value in Hex
`92h
`
`Revision 1.1
`DDR2 FB-DIMM
`1.8V/1.5V
`14 Row, 11 Col., 8 Bank
`height = 30.35mm,
`thickness = 8.00mm
`FB-DIMM
`2 rank, x4 SDRAM
`2.5ps
`1
`4
`3.0ns
`
`8ns
`
`3.0, 4.0, 5.0
`15ns
`
`2.0, 3.0, 4.0, 5.0
`15ns
`
`2.0, 3.0, 4.0
`0.0, 1.0, 2.0, 3.0
`15ns
`
`7.5ns
`
`15ns
`
`-
`
`45ns
`
`60ns
`
`127.5ns
`
`11h
`09h
`12h
`49h
`23h
`
`07h
`10h
`52h
`01h
`04h
`0Ch
`
`20h
`
`33h
`3Ch
`
`42h
`3Ch
`
`32h
`40h
`3Ch
`
`1Eh
`
`3Ch
`
`00h
`
`B4h
`
`F0h
`
`FEh
`
`01h
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`14
`
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`
`

`

`
`
`Serial Presence Detect Table (Contd.)
`
`28
`
`Byte No. Byte Description
`27
`Minimum Internal Write to Read Command Delay
`(tWTR)
`Minimum Internal Write to Precharge Command
`Delay (tRTP)
`Burst Lengths Supported
`Terminations Supported
`Drivers Supported
`Average SDRAM Refresh Interval (tREFI)
`
`29
`30
`31
`32
`
`33
`34
`
`35
`
`36
`
`37
`
`38
`
`39
`
`40
`
`41
`
`42~78
`79
`80
`81
`
`82
`
`83
`
`Tcasemax
`Thermal Resistance of SDRAM Package from Top
`(Case) to Ambient (PsiT-A SDRAM)
`SDRAM Case Temperature Rise from Ambient due
`to Activate-Precharge (DT0)
`SDRAM Case Temperature Rise from Ambient due
`to Precharge/Quiet Standby (DT2N/DT2Q)
`SDRAM Case Temperature Rise from Ambient due
`to Precharge Power-Down (DT2P)
`SDRAM Case Temperature Rise from Ambient due
`to Active Standby (DT3N)
`SDRAM Case Temperature Rise from Ambient due
`to Page Open Burst Read/DT4R4W Mode Bit (DT4R/
`DT4R4W Mode Bit)
`SDRAM Case Temperature Rise from Ambient due
`to Burst Refresh (DT5B)
`SDRAM Case Temperature Rise from Ambient due
`to Bank Interleave Reads with Auto-Precharge (DT7)
`Reserved
`FBD ODT Definition
`Reserved
`Channel Protocols Supported
`
`…Channel Protocols Supported
`
`Back-to-back Turnaround Cycles
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Value Supported
`7.5ns
`
`Value in Hex
`1Eh
`
`7.5ns
`
`4, 8
`50Ω, 75Ω, 150Ω
`Weak Driver
`7.8μs, Double Refresh,
`High Temp. Self Refresh
`95°C, 1.0°C
`25Ω
`
`Device Based
`
`Device Based
`
`Device Based
`
`Device Based
`
`Device Based
`
`Device Based
`
`Device Based
`
`-
`Raw Card D
`-
`ECC
`
`-
`
`1 CLK Read to Write
`
`1Eh
`
`03h
`07h
`01h
`C2h
`
`50h
`32h
`
`14h
`
`15h
`
`30h
`
`13h
`
`25h
`
`15h
`
`1Dh
`
`00h
`12h
`00h
`02h
`
`00h
`
`10h
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`15
`
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`IPR2022-00996
`
`

`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Serial Presence Detect Table (Contd.)
`
`Byte No. Byte Description
`
`Value Supported
`
`Value in Hex
`
`84
`
`85
`
`86
`
`87
`
`88
`
`89
`
`90
`
`91
`
`92
`
`93
`
`94~97
`
`98
`
`99
`
`100
`
`101
`
`102
`
`103
`
`104
`
`105
`
`106
`
`107
`
`Buffer Read Access Time for DDR2-800
`(AMB.LINKPARNXT[1:0] = 11)
`
`Buffer Read Access Time for DDR2-667
`(AMB.LINKPARNXT[1:0] = 10)
`
`Buffer Read Access Time for DDR2-533
`(AMB.LINKPARNXT[1:0] = 01)
`
`Thermal Resistance of AMB Package from Top
`(Case) to Ambient (PsiT-A AMB)
`AMB Case Temperature Rise from Ambient due to
`AMB in Idle_0 State (DT AMB Idle_0)
`
`AMB Case Temperature Rise from Ambient due to
`AMB in Idle_1 State (DT AMB Idle_1)
`
`AMB Case Temperature Rise from Ambient due to
`AMB in Idle_2 State (DT AMB Idle_2)
`
`AMB Case Temperature Rise from Ambient due to
`AMB in Active_1 State (DT AMB Active_1)
`
`AMB Case Temperature Rise from Ambient due to
`AMB in Active_2 State (DT AMB Active_2)
`
`AMB Case Temperature Rise from Ambient due to
`AMB in L0s State (DT AMB L0s)
`
`Reserved
`AMB Junction Temperature Max (TJMax)
`DIMM Category Byte
`
`Reserved
`
`AMB Personality Bytes: Pre-Initialization byte 0
`
`AMB Personality Bytes: Pre-Initialization byte 1
`
`AMB Personality Bytes: Pre-Initialization byte 2
`
`AMB Personality Bytes: Pre-Initialization byte 3
`
`AMB Personality Bytes: Pre-Initialization byte 4
`
`AMB Personality Bytes: Pre-Initialization byte 5
`
`AMB Personality Bytes: Post-Initialization byte 6
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`-
`
`125
`
`Type 3, Planar, FMHS
`
`-
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`36h
`
`36h
`
`34h
`
`2Ah
`
`5Eh
`
`73h
`
`5Ch
`
`9Bh
`
`80h
`
`00h
`
`00h
`
`1Fh
`
`DAh
`
`00h
`
`40h
`
`C0h
`
`12h
`
`44h
`
`9Ch
`
`30h
`
`60h
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`16
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`
`

`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Serial Presence Detect Table (Contd.)
`
`Byte No. Byte Description
`
`Value Supported
`
`Value in Hex
`
`108
`
`109
`
`110
`
`111
`
`112
`
`113
`
`114
`
`115
`
`116
`
`117
`
`118
`
`119
`
`120
`
`121
`
`AMB Personality Bytes: Post-Initialization byte 7
`
`AMB Personality Bytes: Post-Initialization byte 8
`
`AMB Personality Bytes: Post-Initialization byte 9
`
`AMB Personality Bytes: Post-Initialization byte 10
`
`AMB Personality Bytes: Post-Initialization byte 11
`
`AMB Personality Bytes: Post-Initialization byte 12
`
`AMB Personality Bytes: Post-Initialization byte 13
`
`AMB Manufacturer ID Code
`
`…AMB Manufacturer ID Code
`
`Module Manufacturer ID Code
`
`…Module Manufacturer ID Code
`
`Module Manufacturing Location
`
`Module Manufacturing Date (Year)
`
`Module Manufacturing Date (Week)
`
`122~125 Module Serial Number
`
`126
`
`127
`
`SPD Cyclical Redundancy Code (CRC)
`
`…SPD Cyclical Redundancy Code (CRC)
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT AMB Based
`
`IDT
`
`IDT
`
`Samsung
`
`Samsung
`
`Onyang Korea
`
`-
`
`-
`
`-
`
`128~145 Module Part Number
`
`M395T5166AZ4-CE61
`
`146
`
`147
`
`148
`
`149
`
`Module Revision Code
`
`…Module Revision Code
`
`SDRAM Manufacturer ID Code
`
`…SDRAM Manufacturer ID Code
`
`150~175 Manufacturer’s Specific Data
`
`176~255 Reserved
`
`-
`
`-
`
`Samsung
`
`Samsung
`
`-
`
`-
`
`33h
`
`60h
`
`1Bh
`
`60h
`
`1Bh
`
`60h
`
`1Bh
`
`80h
`
`B3h
`
`80h
`
`CEh
`
`01h
`
`00h
`
`00h
`
`00h
`
`27h
`
`DDh
`
`P. No
`
`00h
`
`00h
`
`80h
`
`CEh
`
`00h
`
`00h
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`17
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`

`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Absolute Maximum Ratings
`
`Stress greater than those listed may cause permanent damage to the device. This is a stress rating only, and func-
`tional operation of the device at these or any other conditions above those indicated in the operational sections of
`this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may
`adversely affect reliability.
`
`Absolute Maximum Ratings
`Symbol
`Parameter
`VIN, VOUT
`Voltage on any pin relative to VSS
`VCC
`Voltage on VCC pin relative to VSS
`VDD
`Voltage on VDD pin relative to VSS
`VTT
`Voltage on VTT relative to VSS
`TSTG
`Storage Temperature
`TCASE
`DDR2 SDRAM device operating temperature (Ambient)
`AMB device operating temperature (Ambient)
`
`Min
`-0.5
`-0.3
`-0.5
`-0.5
`-55
`0
`0
`
`Max
`2.3
`1.75
`2.3
`2.3
`100
`85
`110
`
`Units
`V
`V
`V
`V
`°C
`°C
`°C
`
`Input DC Voltage and Operating Conditions
`
`Parameter
`AMB supply voltage
`DDR2 SDRAM supply voltage
`Termination voltage
`EEPROM supply Voltage
`SPD Input High (logic 1) voltage
`SPD Input Low (logic 0) voltage
`RESET Input High (logic 1)
`voltage
`RESET Input Low (logic 0)
`voltage
`Leakage Current (RESET)
`Leakage Current (link)
`
`Symbol
`VCC
`VDD
`VTT
`VDDSPD
`VIH(DC)
`VIL(DC)
`VIH(DC)
`
`VIL(DC)
`
`IL
`IL
`
`Min
`1.455
`1.7
`0.49xVDD-0.04
`3.0
`2.1
`-
`1.0
`
`Max
`Typ
`1.545
`1.5
`1.9
`1.8
`0.50xVDD 0.51xVDD+0.04
`3.3
`3.6
`-
`VDDSPD
`-
`0.8
`-
`-
`
`Units Notes
`V
`V
`V
`V
`V
`V
`V
`
`1
`1
`2
`
`-
`
`-90
`-
`
`-
`
`-
`-
`
`0.5
`
`90
`10
`
`V
`
`µA
`µA
`
`1
`
`2
`3
`
`Notes:
`1. Applies for SMB and SPD bus signals.
`2. Applies for AMB CMOS signal RESET#.
`3. For all other AMB related DC parameters, please refer to the high-speed differential link interface specification.
`
`Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
`Europe: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
`Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
`
`18
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`IPR2022-00996
`
`

`

`
`
`SG5127FBD225652-SA
`
`March 20, 2007
`
`Timing Parameters
`
`Parameter
`EI assertion pass-through timing
`EI deassertion pass-through timing
`EI assertion duration
`FBD command to DDR2 clock out that
`latches command
`FBD command to DDR2 WRITE
`DDR2 READ to FBD (last FBDIMM)
`Resample pass-through time
`Resynch pass-through time
`Bitlock interval
`Framelock interval
`
`Symbol
`tEl Propogate
`tEID
`tEI
`
`tBitlo