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`Samsung Electronics Co., Ltd. v. Demaray LLC
`Samsung Electronic's Exhibit 1054
`Exhibit 1054, Page 1
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`

`

`U.S. Patent
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`
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`July 19, 1994
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`Sheet 1 of 3
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`5,331,218
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`I8
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`FIG 3
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`
`PRIOR ART
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`Ex. 1054, Page 2
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`Ex. 1054, Page 2
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`

`

`U.S. Patent
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`July 19, 1994
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`Sheet 2 of 3
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`5,331,218
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`44|
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`380
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`420 390
`|
`
`“
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`“WOob 42> 29p
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`\
`
`wy et Ber 7S
`aba) T* Ya ep val Tae
`OUT
`FIG. F cn
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`==
`——-~~|VR
`oO
`46
`37
`
`
`
`Dog Dig2 Dag
`86
`qj]ip 82
`
`(fe 39c
`FIG. 9 38
`an
`5p
`aoe| yA
`Ee,
`48
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`Ex. 1054, Page 3
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`Ex. 1054, Page 3
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`

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`U.S. Patent
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`July 19, 1994
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`Sheet 3 of 3
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`5,331,218
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`VOLTAGEDB
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`|
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`0
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`6
`uJ
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`© -25
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`Oo
`>
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`-50
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`FREQUENCYf,(KHz)
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`3
`4
`5
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`2
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`7
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`890V0
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`82
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`8I
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`79
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`78
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`FIG 9
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`Ex. 1054, Page 4
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`Ex. 1054, Page 4
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`

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`1
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`5,331,218
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`SWITCHED-CAPACITOR NOTCH FILTER WITH
`PROGRAMMABLE NOTCH WIDTH AND DEPTH
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`25
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`45
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`2
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`depth, in response to a digital programmingsignal that
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`may be applied to the second group ofdigital program-
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`ming terminals.
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`In another aspect of this invention, the first and sec-
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`BACKGROUND
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`ond groupsof digital terminals of the capacitor arrays
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`are connected to each other; andadigitally programma-
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`This invention relates to an active notch filter circuit
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`ble voltage divider circuit, has a third group of digital
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`employing switched-capacitor resistors and more par-
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`programming terminals,
`is connected in the notch-
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`ticularly to such filter circuits that include simultane-
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`depth circuit branch, has an input connected to the
`ously-digitally-programmable capacitor arrays for con-
`10
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`notch filter input, and has an output connected to the
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`trolling notch width and notch depth.
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`second capacitorarray for determining the divider ratio
`Notch filters are used in analog-signal manipulating
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`of the programmable voltage divider and thus the notch
`circuits for rejecting a particular signal frequency, or
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`depth without affecting the notch width, in response to
`narrow range of frequencies. Conventional notchfilters
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`a digital programmingsignal that may be applied to the
`have a center or primary rejection frequency w, and a
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`third group of digital programming terminals.
`quality factor Q, which when high corresponds to a
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`narrowfilter bandwidth and when low correspondsto a
`BRIEF DESCRIPTION OF THE DRAWINGS
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`relatively wide bandwidth. A high and low Q value also
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`FIG. 1 showsa circuit diagram of a digitally pro-
`correspondsrespectively to a narrow notch and a wide
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`grammable capacitor array suitable for use in a notch
`notch,as is further explained below. The transfer func-
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`filter circuit of this invention.
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`tion of the conventional notch filter is expressed as
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`FIG.2 shows a block-diagram representation of the
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`capacitor array of FIG.1.
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`FIG. 3 showsa circuit diagram of a switched capaci-
`tor resistor.
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`FIG. 4 showsa first preferred embodimentof a notch
`filter circuit of this invention.
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`FIG. 5 showsa current flow diagram corresponding
`to the circuit of FIG. 4.
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`FIG. 6 shows a second preferred embodiment of a
`notch filter circuit of this invention.
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`FIG. 7 showsa block diagram of a reverse-connected
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`DACfor use as a digitally controlled voltage divider.
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`FIG. 8 shows, for different values of the programma-
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`ble capacitance ratio Co/Co, plots of the transfer func-
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`tion Vout/Vin,or “gain”, as a function of the frequency
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`f, of the input signal, for the circuit of FIG. 5.
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`FIG. 9 shows, for different values of the programma-
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`ble voltage dividerratio, A, a plot of the transfer func-
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`tion Vout/Vin, or “gain”, as a function of the frequency
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`fx of the input signal, for the circuit of FIG. 5.
`DESCRIPTION OF THE PREFERRED
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`EMBODIMENTS
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`A digitally programmable capacitor array 10 in FIG.
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`1 is binary weighted, i.e. all of the capacitors 12 have
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`the same capacitance value, C, and they are connected
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`in binary groupsof1,2, 4, etc. Electrically programma-
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`ble switches 14, 15, 16 and 17 determine which groups
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`of capacitors 12 contribute to the capacitance Cy ofthe
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`array 10 as measured between terminals 18 and 19.
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`The digital-signal-activated switches14, 15, 16 and 17
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`are preferably implemented as MOStransistors (not
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`shown). A switch to which a binary zero is applied
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`opens, and a switch to which a binary 1 is applied closes
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`to connect the switch-associated group of capacitors 12
`between terminals 18 and terminal 19. Thus for exam-
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`ple, when the digital programming signal is 1/0/0/1,
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`only switches 14 and 17 contribute to the array capaci-
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`tance C4 whichis illustrated in the block diagram of
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`2. The
`corresponding decimal number
`is
`FIG.
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`N=D0+4+2D14+4D2+8D3=1-1+2.0+4.0+8.1=9.
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`Thus C4=(D0+2D1+4D2+8D3)C, or Cy=MC,
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`wherein M is the decimal numbercorresponding to the
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`digital programming signal that sets the switches 14
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`through 17.
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`Forgreater simplicity and clarity of presentation, the
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`number of programmingbits shown in the drawing, m,
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`Vout _ Siw
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`Vin of,
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`Sj siw
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`S+GS+
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`Notch filters of this kind are described by Alan B.
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`Grebene in his book Bipolar And MOS Analog Inte-
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`grated Circuit Design, 1984, pages 736-739.
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`Notch width and notch depth are typically estab- .
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`lished by the filter manufacturer and are not controlla-
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`ble by the filter user.
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`It is an object of this invention to provide a notch
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`filter circuit that is programmable with respect to notch
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`width and depth.
`35
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`It is a further object of this invention to provide such
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`a filter wherein notch width and notch depth are inde-
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`pendently programmable by the user.
`SUMMARYOF THE INVENTION
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`40
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`A programmable notchfilter includes first and sec-
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`ond tandem connected operational amplifiers, each with
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`a capacitor connected output to input across it. The
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`tandem connection is effected by one switched-capaci-
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`tor resistor between the output of the first amplifier to
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`the input of the second. Another switched-capacitor
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`resistor is connected between the notchfilter input and
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`the input of the first amplifier. The filter output is the
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`output of the second amplifier. Yet another switched
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`capacitor resistor is connected between the notchfilter
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`output and the inputof the first amplifier. A feed for-
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`ward capacitor is connected between the input of the
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`notch filter and the input of the second amplifier.
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`A notch-width programming circuit consists of a
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`circuit branch, that includesa first digitally-programm-
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`able capacitor array, which array hasa first group of 55
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`digital programming terminals and which array is con-
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`nectedin parallel with the yet another switched-capaci-
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`tor resistor for determining the capacitance ofthe first
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`array, and thus the notch width, in response to a digital
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`programming signal that may be applied to the first
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`group of digital programming terminals.
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`A notch-depth programming circuit consists of a
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`circuit branch,
`that
`includes a second digitally-pro-
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`grammable capacitor array, which array has a second
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`group of digital programming terminals and which
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`array is connected in parallel with the another
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`switched-capacitor resistor. This second digitally-pro-
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`grammable capacitor array is for determining notch
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`50
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`60
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`65
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`Ex. 1054, Page 5
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`Ex. 1054, Page 5
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`

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`5,331,218
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`3
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`is just 4 whereas a greater numberofbits will usually be
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`Thus for m=4, M can be any integer between 0 and 1s
`preferred. M can be any integer between 0 and 2”—
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`The programmable capacitor array of FIG. 1 may be
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`more simply represented by symbol 10 of FIG. 2. The
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`programmable-array capacitance is C4. The capacitor
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`array 20 has capacitance terminals 18 and 19, and has a
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`group of digital programming terminals 22 to which the
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`programmingdigital signal is to be applied.
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`The switched-capacitor resistor circuit of FIG. 3
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`simulates a resistor whose equivalent ohmic value is
`Rs= W/feCs
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`4
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`Vout
`vin
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`or
`2
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`S +E3 Je-Co~& 5+)
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`st 4 27-5 + ypoO
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`The form ofthis transfer function illuminates a major
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`advantage of this notch filter, namely that the center
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`(notch) frequency w is exclusively determined by the
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`predictable temperature stable capacitor ratio Cs/Co
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`and the switching frequency f, of the switched capaci-
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`tor resistors which can be madeas stable as desired by
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`the user; and the quality factor Q, which determinesthe
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`width ofthe filter notch in the transfer function, is ex-
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`clusively determined by the capacitor ratio Co/Cg.
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`Furthermore, it is also preferred to fabricate the fixed
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`capacitances Co from one or more of the elemental
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`MOScapacitors that make up the binarily weighted
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`capacitor arrays so that for any digitally programmed
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`values of the array capacitances C4 and Cgtheratios
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`C4/Cg,that controls notch depth, and the ratio Co/Cg
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`are equally predictable and stable. These key capaci-
`tance ratios are
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` C:
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`w= ferGr=
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`¢
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`and @ =
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`The above-noted advantages derive partly from the
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`use of switched capacitorresistors leading to key capac-
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`itance ratio parameters in the transfer function.
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`The notch filter transfer function above for the cir-
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`cuit of FIG. 4 can now be rewritten as
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`20
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`35
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`where C, is the capacitance of switched capacitor 25.
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`The two phases ¢ and ¢2of a two phase clocksignal of
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`frequency f, are applied as indicated in FIG. 3 to the
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`clocked switches 26, 27, 28 and 29. With the four
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`switches clocked as shown in FIG. 3, the resistor is said
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`to be a positive switched capacitorresistor. As is well
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`known,a negative switched capacitor resistor is formed
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`in the case that switches 28 and 29 are changed to be
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`clocked respectively by clock phases 62 and 4; so that
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`a positive input charge (signal) generates a negative
`25
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`output charge(signal).
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`Referring now to FIG.4, operational amplifiers 30
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`and 32 have integrating capacitors 34 and 36, respec-
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`tively, connected between each amplifiers’s negative
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`input and output. A first and positive switched-capaci-
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`tor resistor circuit 37 is comprised of switches 38a, 39a,
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`40a and 41a and capacitor 42a. Resistor 37 is connected
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`between the filter input conductor 44 and the negative
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`input of the amplifier 30. A second but negative
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`switched-capacitor resistor 46 is comprised of switches
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`38), 39b, 405 and 41b and capacitor 425. Resistor 46 is
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`connected between the output of the amplifier 30 and
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`the negative input of the second amplifier 32.
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`A third and positive switched-capacitorresistor 48 is
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`comprised of switches 38c, 39c, 40c and 41c and capaci-
`40
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`tor 42c. Resistor 48 is connected between the output of
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`the amplifier 32, that corresponds to the filter output
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`conductor 50, and the negative inputof the first ampli-
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`fier 32. A first programmable capacitor array 52, of
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`capacitance Cy, having a group ofdigital programming
`45
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`input terminals 54, is connected between the filter out-
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`put conductor 50 and the negative input of amplifier 30.
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`A programmable capacitorarray 56, of capacitance Cg,
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`having a groupofdigital programming input terminals
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`58, is connected in parallel with the switched capacitor
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`37. A feedforward capacitor 60 is connected between
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`the filter input conductor 44 and the negative input of
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`the second amplifier 32.
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`Although notessential to the invention, the values of
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`switching capacitors 42a, 42b and 42c are preferably of
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`the same integrated circuit structure, e.g. MOS, and
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`preferably the same size and therefore the having the
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`same value C,; for optimum capacitance matching at
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`manufacture. This also makes simpler the analysis of the
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`circuit. For the same reason,the value of the capacitors
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`34, 36 and 60 are preferably set equal, to value Co.
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`The current flow diagram of FIG. 5 assigns a recipro-
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`cal impedance expression to each branch of the notch
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`filter circuit of FIG. 5, which expression when multi-
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`plied by the branch voltage drops across the branch
`65
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`components equals the branch current. This diagram
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`represents a conventional method for analysis of a com-
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`plex circuit, in this instance leading to the notchcircuit
`transfer function:
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`2
`we
`Vout _S+@gs+e
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`S+ ast
`vin
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`This equation for the filter of FIG. 4 is comparable to
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`the transfer function for a conventional notch filter
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`described above on page 1, except for having the new
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`S-term in the numerator. The transfer function of the
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`notch filter of FIG. 4 is seen to permit changing the
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`center frequency w,
`the Q or notch width, and the
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`notch depth @by changing capacitance ratios. The
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`array capacitances C4 and Cgaredigitally programma-
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`ble making this feasible. The center frequency w can be
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`adjusted by adjusting fy.
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`However, a change in Q being effected by repro-
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`gramming the value of array capacitance Cg also
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`changes notch depth @. But @ canbe held constant by
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`also adjusting C4. In order to achieve complete inde-
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`pendence of adjustment for each ofthese three perfor-
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`mance characteristics, there is added in the notchfilter
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`circuit of FIG. 6 a programmable voltage divider 64,
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`having a group 82 ofdigital programming input termi-
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`nals, in series with the array capacitor 56.
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`Digitally programmable voltage divider (PVD)cir-
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`cuits may be obtained by using standard digital-to-
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`analog circuits (DAC’s) in a voltage mode. A conven-
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`tional block symbol representing a standard DAC is
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`converted to a PVD 64 by the addition of an arrow at
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`the PVD output 84 as shown in FIG. 7, with multiple
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`input terminals becoming a group of digital program-
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`ming PVD terminals 82 for parallel application thereto
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`of a digital programming signal. The DAC may be
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`operated as PVD 64 by applying at the DAC voltage-
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`Ex. 1054, Page 6
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`Ex. 1054, Page 6
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`

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`5,331,218
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`6
`TABLEI-continued
`
`Q
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`5
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`curve #
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`72
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`M
`16
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`In FIG.9, the notch filter gain curves 78, 79, 80, 81
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`and 82 are plotted as a function of input signal fre-
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`quency f,, and each corresponding respectively to five
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`different digital signals of decimal value N applied to
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`the programmable voltage divider 64. The resulting
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`curves and valuesof attenuation A are given in TableII.
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`5
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`reference terminal, now the PVD input terminal 86, an
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`analog signal to be attenuated and observing the result-
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`ing analog signal at the DAC outputterminal, now the
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`PVDoutput terminal 84. The amountof attenuation, A,
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`obtained is determined by the particular digital signal
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`that is being applied to the group of DAC digital input
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`terminals, now PVDdigital programming terminals 82.
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`Filed concurrently herewith is applicant’s application
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`
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`entitled DIGITALLY DUAL-PROGRAMMABLE
`oo 0
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`
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`INTEGRATOR CIRCUIT, which describes in more
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`detail programmable capacitor arrays and such reverse
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`connected DACs used as voltage dividers; and that
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`co-filed application is incorporated by reference herein.
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`Theeffect of the PVD 64 is to reduce the capacitance
`—_ 5
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`Cy of the array capacitor 56 by the amount of the PVD
`attenuation ratio A.
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`However,it can be seen from an above-given transfer
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`equation ofthe circuit of FIG. 4, that in a special case
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`wherein the same digital programming signalis applied
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`to both capacitor-array programming terminals 54 and
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`58 connected in parallel, the ratio of the capacitance
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`values of the first and second arrays will remain con-
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`stant for all digital programming input signals that may
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`be applied to the connected together terminals. This
`25
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`special case exists for the circuit of FIG.6.
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`The array capacitors 56 and 52 of FIG.6 are prefera-
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`bly identical for optimizing capacitance matching and
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`have their programming terminals 58 and 54 connected
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`in parallel so that both are simultaneously changed by
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`the digital programming signal and always have identi-
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`cal values,i.e. Co=Cy, and
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`In the circuit of FIG. 4, the notch setting parameter
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`@=Cy/Co, but in the circuit of FIG. 6 the notch-
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`depth-setting capacitance is AC4, where A is the PVD
`35
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`attenuation. The newnotch-depth-setting parameter is
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`20
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`N
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`1
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`2
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`4
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`8
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`16
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`TABLEII
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`A
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`1/16
`1/8
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`1/4
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`1/2
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`1
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`curve #
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`78
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`79
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`80
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`81
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`82
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`Ex. 1054, Page 7
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`The notch width seen in FIG. 9 does not change as
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`notch depth is programmably varied, and the notch
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`depth in FIG. 8 does not change as notch widthis pro-
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`grammably varied. Thus complete independence in the
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`programming of these performance characteristics is
`realized.
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`The programmable state-variable notch filter circuit
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`of this invention is especially well suited as one of the
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`analog-signal manipulating circuits employed in the
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`integrated circuit co-processor described in the patent
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`application filed simultaneously herewith entitled HY-
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`BRID CONTROL-LAW SERVO CO-PROCESSOR
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`INTEGRATEDCIRCUIT,of the same inventive en-
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`tity and assigned to the same assigneeas is the present
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`invention. Uses and additional advantagesof this notch
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`filter circuit are described in that co-filed application
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`and that co-filed application is hereby incorporated by
`reference herein.
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`Weclaim:
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`1. A notch filter circuit comprising:
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`a) a filter circuit input and a filter circuit output;
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`b) first and second operational amplifiers;
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`c) first and second capacitors connected respectively
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`between the output and the negative input of each
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`of said first and second amplifiers,
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`d) a first switched-capacitor resistor connected be-
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`tween said filter circuit
`input and said first-
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`amplifier input;
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`e) a second switched-capacitor resistor connected
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`betweensaid first amplifier output and said second
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`amplifier input, said second-amplifier output con-
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`nected to said filter circuit output;
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`f) a third switched-capacitor resistor connected be-
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`tweensaid filter circuit output andsaid first ampli-
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`fier input;
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`g) a first programmable capacitor array connected in
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`parallel with said third switched-capacitorresistor;
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`h) a third capacitor connected between said second-
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`amplifier input and said filter circuit input, and
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`i) a second programmable capacitor array connected
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`in parallel with said first switched-capacitor resis-
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`tor, so that a change only in the capacitance ofsaid
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`second capacitor array causes a corresponding
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`changein the filter notch depth and a change only
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`in the capacitance of said first capacitor array
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`causes a corresponding change inthefilter notch
`width.
`
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`AC4
`AC4
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`@Q-"Gr
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`
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`The transfer function for the notch circuit of FIG. 7
`
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`is now
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`Ca
`(C,)?
`C.
`2 — s
`2
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`
`
`fe Co $+ U0)
`Vout_ _ st4 Co
`(Co)?
`
`
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`
`
`Mn
`Cc,
`(Cc 2
`
`
`2
`3
`Cs
`5
`Q
`a+ Co Se Co s
`(fo)
`(Co)?
`
`.
`
`45
`
`This transfer function indicates that notch width is
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`programmable by Cg, and notch depth is programma-
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`ble by A; and notch width and depth are now indepen-
`
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`dently programmable.
`
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`Performanceofthis circuit is demonstrated as follows
`
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`
`
`for the notchfilter circuit constructed as shown in FIG.
`6.
`
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`In FIG. 8, the riotch filter gain curves 68, 69, 70, 71
`
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`and 72 are plotted as a function of input signal fre-
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`
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`
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`quency f;, each corresponding respectivelyto five dif-
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`
`
`
`
`
`ferent digital signals of decimal value M applied to the
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`
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`capacitor arrays 52 and 56. The resulting curves and
`
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`
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`values of Q, namely Co/Cg,are given in Table 1.
`TABLEI
`
`curve #
`Q
`M
`
`
`
`
`1
`8
`68
`
`
`2
`4
`69
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`70
`4
`2
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`71
`8
`1
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`60
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`65
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`
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`Ex. 1054, Page 7
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`

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`5,331,218
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`7
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`2. The notchfilter of claim 1 wherein said first, sec-
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`ond and third capacitors have the same capacitance
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`
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`values so that the Q of said notch-filter is equal to the
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`
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`
`
`
`ratio of said same capacitance value and the capacitance
`
`
`
`
`
`value of said first capacitor array.
`3. The notch filter of claim 1 wherein said first and
`
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`second arraysare digitally programmable,said first and
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`second capacitor arrays having a group ofdigital pro-
`10
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`gramming terminals, the groups of programming termi-
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`nals ofsaid first and second capacitor arrays connected
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`to each other for making the ratio of the capacitance
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`values of said first and second arrays constant for all
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`15
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`8
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`digital programming input signals that may be applied
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`
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`to said connected together terminals.
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`
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`4. The notchfilter of claim 3 wherein said first and
`
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`second capacitor arrays are essentially identical, for
`
`
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`
`
`
`making the capacitance values of said first and second
`
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`
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`
`
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`arrays equal for all digital programming input signals
`
`
`
`
`
`
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`that may be applied to said connected together termi-
`nals.
`
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`
`
`5. The notch filter of claim 3 additionally comprising
`
`
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`
`
`
`
`a digitally programmable voltage divider circuit con-
`
`
`
`
`
`
`
`nected in series with said second programmable capaci-
`
`
`
`
`
`
`
`
`
`
`tor array between saidfilter circuit input and said sec-,
`
`
`
`ond capacitor array.*
`*
`*
`*
`&*
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`20
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`25
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`30
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`35
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`45
`
`
`
`50
`
`
`
`55
`
`
`
`65
`
`
`
`Ex. 1054, Page 8
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`Ex. 1054, Page 8
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`