Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 1 of 92
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`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 1 of 92
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`

`

`First Edition (October, 1990)
`
`The following paragraph does not apply to the United Kingdom or any country where
`such provisions are Inconsistent with local law: INTERNATIONAL BUSINESS
`MACHINES CORPORATION PROVIDES THIS PUBLICATION "AS IS" WITHOUT
`WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT
`LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
`PARTICULAR PURPOSE. Some states do not allow disclaimer of express or implied
`warranties in certain transactions, therefore, this statement may not apply to you.
`
`This publication could include technical inaccuracies or typographical errors. Changes
`are periodically made to the information herein; these changes will be incorporated in
`new editions of the publication. IBM may make improvements and/or changes in the
`product(s) and/or the program(s) described in this publication at any lime.
`
`It is possible that this publication may contain reference to, or information about, IBM
`products (machines and programs), programming, or services that are not announced
`in your country. Such references or information must not be construed to mean that
`IBM intends to announce such IBM products, programming, or services in your country.
`
`Requests for technical information about IBM products should be made to your IBM
`Authorized Dealer or your IBM Marketing Representative.
`
`IBM may have patents or pending patent applications covering subject matter in this
`document. The furnishing of this document does not give you any license to these
`patents. You can send license inquiries, in writing, to the IBM Director of Commercial
`Relations, IBM Corporation, Purchase, NY 10577.
`
`© Copyright International Business Machines Corporation 1990. All
`rights reserved.
`Note to U.S. Government Users - Documentation related to restricted
`rights - Use, duplication or disclosure is subject to restrictions set
`
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`

`

`Special Notices
`
`References in this publication to IBM products, programs, or services
`do not imply that IBM intends to make these available in all countries
`in which IBM operates. Any reference to an IBM product, program or
`service is not intended to state or imply that only IBM's product,
`program, or service may be used. Any functionally equivalent
`product, program, or service that does not infringe any of IBM's
`intellectual property rights or other legally protectible rights may be
`used instead of the IBM product, program, or service. Evaluation and
`verification of operation in conjunction with other products, programs,
`or services, except those expressly designated by IBM, are the user's
`responsi bi I ity.
`
`IBM may have patents or pending patent applications covering
`subject matter in this document. The furnishing of this document
`does not give you any license to these patents. You can send license
`inquiries, in writing, to the IBM Director of Commercial Relations,
`IBM Corporation, Purchase, NY 10577.
`
`The following terms, denoted by an asterisk (*) in this publication, are
`trademarks of the IBM Corporation in the United States and/or other
`countries:
`
`IBM
`Micro Channel
`Personal Computer AT
`Personal System/2
`PS/2
`
`The following terms, denoted by a double asterisk (") in this
`publication, are trademarks of other companies as follows:
`
`Intel
`Motorola
`National Semiconductor
`
`Intel Corporation
`Motorola, Incorporated
`National Semiconductor Corporation
`
`Ill
`
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`

`Notes:
`Notes:
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`Petitioners Ex. 1027
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`Page 4 of 92
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`

`

`Preface
`
`The Technical Reference library is intended for those who develop
`hardware and software products for IBM Personal Computers and
`IBM Personal System/2 products. Users should understand computer
`architecture and programming concepts.
`
`This manual consists of the following sections:
`
`Section 1, "System Overview," describes the system, features,
`and specifications.
`
`Section 2, "Programmable Option Select," describes the registers
`used for configuration.
`
`Section 3, "System Board," describes the system-specific
`hardware implementations of the Micro Channel architecture.
`
`Section 4, "Processor Complex" describes the components and
`features of the processor complex.
`
`This technical reference should be used with the following
`publications. These publications contain additional information on
`many of the subjects discussed in this technical reference.
`
`IBM Personal System/2 Hardware Interface Technical Reference
`- Architectures
`
`IBM Personal System/2 Hardware Interface Technical Reference
`- Common Interfaces
`
`IBM Personal System/2 and Personal Computer BIOS Interface
`Technical Reference
`
`Information about diskette drives, fixed disk drives, adapters, and
`external options are in separate option technical references.
`
`Warning: The term "Reserved" describes certain signals, bits, and
`registers that should not be changed. Use of reserved areas can
`cause compatibility problems, loss of data, or permanent damage to
`the hardware. When the contents of a register are changed, the state
`of the reserved bits must be preserved. When possible, read the
`register first and change only the bits that must be changed.
`
`Ir\ r,...,.,..,.;.,.1,,,-1, 1c1..1 r-. ..... 1nnn
`
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`

`Notes:
`Notes:
`
`ul
`
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`

`

`Contents
`
`Section 1. System Overview
`. . . . . . . . . . . . . . . . . . . . . . . . 1-1
`Description
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
`System Board Devices and Features ................... 1-3
`System Board 1/0 Address Map ...................... 1-4
`Micro Channel Compatibility ........................ 1-4
`Specifications
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
`Power Supply ................................... 1-8
`Outputs
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
`Voltage Sequencing
`............................ 1-9
`Power Supply Connectors
`. . . . . . . . . . . . . . . . . . . . . . . 1-10
`
`Section 2. Programmable Option Select . . . . . . . . . . . . . . . . . 2-1
`Description
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
`POS Address Map ................................ 2-3
`Card Selected Feedback ........................... 2-4
`System Board Setup
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
`System Board Enable/Setup Register (Hex 0094) ......... 2-4
`System Board POS Register 2 (Hex 0102) .............. 2-5
`System Board POS Register 3 (Hex 0103) .............. 2-6
`System Board POS Registers 4 (Hex 0104)
`. . . . . . . . . . . . . 2-7
`System Board POS Register 5 (Hex 0105) .............. 2-8
`Diskette Drive POS Registers 4 (Hex 0104) ............. 2-9
`Adapter Enable/Setup Register (Hex 0096)
`. . . . . . . . . . . . 2-10
`Selectable Boot Sequence
`. . . . . . . . . . . . . . . . . . . . . . . . . 2-11
`
`Section 3. System Board
`. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
`Description
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
`Diskette Drive Connector
`. . . . . . . . . . . . . . . . . . . . . . . . . 3-2
`System Board Memory Connectors
`. . . . . . . . . . . . . . . . . . 3-3
`Real-Time Clock/Complementary Metal-Oxide Semiconductor
`RAM ...................................... 3-5
`Miscellaneous System Functions . . . . . . . . . . . . . . . . . . . . . 3-17
`Nonmaskable Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
`System Control Port B (Hex 0061)
`. . . . . . . . . . . . . . . . . . 3-17
`System Control Port A (Hex 0092)
`. . . . . . . . . . . . . . . . . . 3-19
`Power-On Password
`. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
`Hardware Compatibility
`. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
`Error Codes
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23
`
`Section 4. Processor Complex
`. . . . . . . . . . . . . . . . . . . . . . . 4-1
`Type 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
`Type 2 ........................................ 4-5
`
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`1/0 Address Map ................................ 4-7
`Optional Cache
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
`Micro Channel
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
`Central Arbiter
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
`Central Arbiter Programming ...................... 4-9
`Memory Subsystem
`............................. 4-11
`Memory Presence Detect
`. . . . . . . . . . . . . . . . . . . . . . . . 4-11
`Memory Controller Registers
`. . . . . . . . . . . . . . . . . . . . . 4-12
`Processor Cache Address Map
`. . . . . . . . . . . . . . . . . . . . . . 4-28
`Read-Only Memory Subsystem
`. . . . . . . . . . . . . . . . . . . . 4-29
`
`Index ........................................ X-1
`
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`

`Figures
`
`1-1. System Board Devices and Features ............. 1-3
`1-2. System Board 1/0 Address Map ................ 1-4
`1-3. Physical Specifications
`. . . . . . . . . . . . . . . . . . . . . . 1-6
`1-4. Acoustical Readings
`. . . . . . . . . . . . . . . . . . . . . . . . 1-7
`1-5. System-Provided Power ..................... 1-8
`1-6. Load Current for Micro Channel Adapter Connector . . . 1-9
`1-7. Voltage Assignments for the Internal Drive
`Power-Supply Connectors
`. . . . . . . . . . . . . . . . . . . 1-10
`2-1. POS 1/0 Address Map ....................... 2-3
`2-2. Card Selected Feedback Register (Hex 0091) ....... 2-4
`2-3. System Board Enable/Setup Register (Hex 0094)
`. . . . . 2-4
`2-4. System Board POS Register 2 (Hex 0102) .......... 2-5
`2-5. Parallel Port Select Bits
`. . . . . . . . . . . . . . . . . . . . . 2-6
`2-6. System Board POS Register 3 (Hex 0103) - Write .... 2-6
`2-7. System Board POS Register 3 (Hex 0103) - Read .... 2-7
`2-8. System Board POS Register 4 (Hex 0104) .......... 2-7
`2-9. System Board POS Register 5 (Hex 0105) .......... 2-8
`2-10. Serial Port Address Select Bits ................. 2-8
`2-11. Diskette Drive POS Register 4 (Hex 0104)
`. . . . . . . . . . 2-9
`2-12. Adapter Enable/Setup Register (Hex 0096)
`. . . . . . . . 2-10
`3-1. Diskette Drive Connector
`. . . . . . . . . . . . . . . . . . . . . 3-2
`3-2. Memory Connector Numbering
`. . . . . . . . . . . . . . . . . 3-3
`3-3. System Board Memory Connector . . . . . . . . . . . . . . . 3-4
`3-4. RT/CMOS RAM Address Map .................. 3-5
`3-5. RT/CMOS Address Register and NMI Mask (Hex 0070)
`. 3-6
`3-6. RT/CMOS Data Register (Hex 0071) .............. 3-6
`3-7. Real-Time Clock Bytes ...................... 3-8
`3-8. Status Register A
`. . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
`3-9. Status Register B
`. . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
`3-10. Status Register C
`. . . . . . . . . . . . . . . . . . . . . . . . . 3-11
`3-11. Status Register D ......................... 3-11
`3-12. Diagnostic Status Byte ..................... 3-12
`3-13. Diskette Drive Type Byte .................... 3-13
`3-14. Diskette Drive Type Byte (Bits 7-4) ............ 3-13
`3-15. Diskette Drive Type Byte (Bits 3-0) ............ 3-13
`3-16. Equipment Byte
`. . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
`3-17. Equipment Byte (Bits 7, 6)
`. . . . . . . . . . . . . . . . . . . 3-15
`3-18. Equipment Byte (Bits 5, 4) ................... 3-15
`3-19. System Control Port B (Hex 0061) - Write ........ 3-18
`3-20. System Control Port B (Hex 0061) - Read ........ 3-18
`3-21. System Control Port A (Hex 0092)
`. . . . . . . . . . . . . . 3-19
`3-22. POST Error Message Table
`. . . . . . . . . . . . . . . . . . 3-24
`
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`

`. . . . . . . . . . . . . . . . . . . 4-2
`4-1. Model and Submode! Bytes
`4-2. Type 1 Processor Complex Feature and Devices
`. . . . . 4-3
`4-3. System Performance Specifications, Type 1 Processor
`Complex
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
`4-4. Memory Performance Specifications, Type 1 Processor
`Complex
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
`4-5. Type 2 Processor Complex Feature and Devices ..... 4-5
`4-6. System Performance Specifications, Type 2 Processor
`Complex
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
`4-7. Memory Performance Specifications, Type 2 Processor
`Complex
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
`4-8. Processor Complex 1/0 Address Map
`. . . . . . . . . . . . 4-7
`4-9. Arbitration Bus Priority Assignments
`. . . . . . . . . . . . . 4-8
`4-10. Arbitration Register (Hex 0090)-Write
`. . . . . . . . . . . 4-9
`4-11. Arbitration Register (Hex 0090) - Read
`. . . . . . . . . . . 4-9
`4-12. Presence-Detect Bits ...................... 4-11
`4-13. Memory Controller Register Assignments
`. . . . . . . . 4-12
`4-14. Memory Control .......................... 4-14
`4-15. Memory Bank Base Address Register (Index Hex
`90-9F) ................................ 4-15
`4-16. Split Address Register (Index Hex AO) ........... 4-15
`4-17. Memory Encoding Register (Index Hex A1) ........ 4-16
`4-18. Cache/Timer Control Register (Index Hex A2) ...... 4-18
`4-19. Boundary O Cache Control Register (Index Hex A3)
`. . 4-19
`4-20.
`Lower Boundary 1 Cache Control Register (Index Hex
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
`A4)
`4-21. Upper Boundary 1 Cache Control Register (Index Hex
`AS) ................................... 4-20
`. . . . 4-21
`4-22. Memory Bank Enable Register 1 (Index Hex A6)
`4-23. Memory Bank Enable Register 2 (Index Hex A7)
`. . . . 4-22
`. . . . . . . . . . . . . . . 4-25
`4-24. Parity Trap Register (Hex OOE1)
`4-25. Cache Control Register (Hex OOE2)
`. . . . . . . . . . . . . 4-26
`4-26. Cache Status Register (Hex OOE3)
`. . . . . . . . . . . . . . 4-27
`4-27. Cache Address Map Summary
`. . . . . . . . . . . . . . . . 4-28
`
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`

`

`Section 1. System Overview
`
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
`Description
`System Board Devices and Features ................... 1-3
`System Board 1/0 Address Map ...................... 1-4
`Micro Channel Compatibility
`. . . . . . . . . . . . . . . . . . . . . . . . 1-4
`Specifications
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
`Power Supply ................................... 1-8
`Outputs
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
`Output Protection
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
`Voltage Sequencing ............................ 1-9
`Power Supply Connectors
`. . . . . . . . . . . . . . . . . . . . . . . 1-10
`
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`Description
`
`The IBM· Personal System/2* Model 95 is floor-standing computer
`system with a keyboard. The system can support up to four
`removable-media DASO devices (diskette, tape, optical) and three
`nonremovable-media DASO devices.
`
`All Model 95 systems use the same system board. This system board
`has:
`
`• Eight Micro Channel* connectors
`
`• Eight connectors for memory
`• Parallel port, serial port, and diskette drive controllers
`
`• Processor complex connector
`
`• Real-time clock.
`
`The processor complex determines system performance and the
`model/submode! byte information. The major components on the
`processor complex are:
`
`• System microprocessor
`• DMA controller
`
`• Memory controller.
`
`IBM, Personal System/2, PS/2, and Micro Channel are trademarks of the
`International Business Corporation.
`
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`System Board Devices and Features
`
`The following table lists the system board devices and features. The
`Hardware Interface Technical Reference - Common Interfaces
`describes devices common to PS/2 products by type number.
`
`Device
`MlcroproceHor
`System Timers
`
`RAM Subsystem
`
`CMOS RAM
`Subsystem
`
`Audio Subsystem
`
`Interrupt Controller
`
`Keyboard/ Auxlllary
`Device Controller
`
`Diskette Drive
`Controller
`
`Serial Controller
`
`Parallel Controller
`
`Micro Channel
`
`Type
`
`2
`
`2
`
`3
`
`3
`
`Features
`Connector for processor complex
`Channel 0 - System timer
`Channel 2 - Tone generation for speaker
`Channel 3 - Watchdog timer
`Eight connectors on system board
`Refer to the processor complex for
`more information
`64-byte CMOS RAM with
`real-time clock/calendar
`8KB CMOS RAM extension (KB= 1,024 bytes)
`Battery backup
`Driven by:
`- System-timer channel 2
`- The 'audio sum node' signal.
`16 levels of system interrupts
`Interrupts are level-sensitive
`Keyboard connector
`Auxiliary device connector
`Password security
`Supports:
`- 3.5-in. diskette drive (1.44MB)
`- 5.25-in. diskette drive (360KB and 1.2MB)
`RS-232C interface
`Programmable as serial port 1 - 8
`OMA, FIFO, and character modes
`Supports DMA operation
`Programmable as parallel port 1 - 4
`Supports bidirectional input and output
`Supports OMA operation
`Eight connectors for Type 3 adapters:
`- One 32-bit connector with auxiliary
`video extension
`- One 32-bit connector with base video
`extension
`- Six 32-bit connectors with matched
`memory extension
`One connector contains a fixed disk adapter
`One connector contains a video adapter
`
`Figure 1-1. System Board Devices and Features
`
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`System Board 1/0 Address Map
`
`Hex Addreasea
`0020,0021
`0040, 0042-0044, 0047
`0060
`0061
`0064
`0070,0071
`0091
`0092
`0094
`0096
`00A0-00A1
`0100-0107
`0108-010F
`0278-027D
`02F8-02FF
`0378-037D
`03BC-03BF
`03F0-03F7
`03F8-03FF
`1278-127D
`1378-1370
`3220-3227
`3228-322F
`4220-4227
`4228-422F
`5220-5227
`5228-522F
`83F8-83FF
`82F8-82FF
`8220-8227
`B228-B22F
`C220-C227
`C228-C22F
`D220-D227
`D228-D22F
`
`Device
`Interrupt Controller (Master)
`System Timers
`Keyboard, Auxiliary Device
`System Control Port B
`Keyboard, Auxiliary Device
`RT/CMOS and NMI Mask
`Card Selected Feedback Register
`System Control Port A
`System Board Enable/Setup Register
`Adapter Enable/Setup Register
`Interrupt Controller (Slave)
`Programmable Option Select
`Information Panel
`Parallel Port 3
`Serial Port 2
`Parallel Port 2
`Parallel Port 1
`Diskette Drive Controller
`Serial Port 1
`Parallel Port 1 (DMA mode)
`Parallel Port 4
`Serial Port 3
`Serial Port 4
`Serial Port 5
`Serial Port 6
`Serial Port 7
`Serial Port 8
`Serial Port 1 (DMA mode)
`Serial Port 2 (DMA mode)
`Serial Port 3 (DMA mode)
`Serial Port 4 (DMA mode)
`Serial Port 5 (DMA mode)
`Serial Port 6 (DMA mode)
`Serial Port 7 (DMA mode)
`Serial Port 8 (DMA mode)
`
`Figure 1-2. System Board /10 Address Map
`
`Micro Channel Compatibility
`
`Following is a description of restrictions in the support of certain
`Micro Channel Procedures.
`
`Streaming Data
`The system board supports 10 MHz-streaming data
`procedures involving transfers between adapters.
`
`Devices on the system board and the processor complex
`work with streaming-data adapters; however, they do not
`
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`

`use the streaming data procedure. Transfers default to the
`basic transfer procedure.
`
`Data Parity
`The system board supports data-parity procedures
`involving transfers between adapters.
`
`Devices on the system board and the processor complex
`work with adapters that support data parity; however, they
`do not use the data parity option. Transfers default to the
`basic transfer procedure.
`
`Address Parity
`The system board supports address-parity procedures
`involving transfers between adapters.
`
`Devices on the system board and the processor complex
`work with adapters that support address parity; however,
`they do not use the address parity option. Transfers default
`to the basic transfer procedure.
`
`Select Feedback Return Slgnal
`The system board and the processor complex support the
`'selected feedback return' signal except for 1/0 devices at
`addresses below hex 0110. These devices are controlled
`by the system master only and should not be accessed by
`bus masters.
`
`Synchronous Channel Check
`Synchronous channel checks for errors other than Micro
`Channel data-parity errors or Micro Channel address-parity
`errors are not supported in this system.
`
`Synchronous channel checks for data-parity or
`address-parity errors, typically issued by slaves, are the
`responsibility of the master that owned the channel and
`issued the access to the slave. However, in this system,
`these channel checks can also be detected by logic on the
`system board, resulting in an NMI.
`
`In this system, the OMA controller supports OMA slaves
`with 8-bit or 16-bit data widths. Transfers are limited to the
`memory address space below 16MB.
`
`OMA
`
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`

`Specifications
`
`Size:
`Width
`Depth
`Height
`
`Weight:
`Minimum Configuration
`Maximum Configuration
`
`Cables:
`Power Cable
`Keyboard Cable
`
`Air Temperature:
`System On
`0 • 3000 ft
`3000 • 7000 ft
`System Off
`
`Humidity:
`
`Maximum Attitude
`
`Heal Output
`
`Acousllcal Readings
`See Figure 1-4 on page 1-7
`
`Electrlcal:
`Input Voltage:
`
`Low Range
`High Range
`
`Input Frequency:
`
`Maximum Current Draw:
`Low Range
`High Range
`
`Input in Kilovolt-Ampere (kVA):
`Minimum Configuration
`(as shipped)
`Maximum Configuration
`
`203 mm (8.0 in)
`508 mm (20.0 in)
`501 mm (19.75 in)
`
`22 kg (50 lb)
`30 kg (67 lb)
`
`1.8 m (6 ft)
`3.05 m (10 ft)
`
`10.0 to 35.0°C (50 to 95°F)
`10.0 to 32.2°C (50 to 90°F)
`10.0 lo 43.00C (50 lo 110°F)
`
`8% to 80%
`
`2134 m (7000 ft)
`
`515 W (1757 BTU per hour)
`
`Range is switch selected.
`Sinewave input required
`90 (min)-137 (max) Vac
`180 (min) - 265 (max) Vac
`
`50 ± 3Hz or 60 ± 3Hz
`
`9.2A
`4.6A
`
`0.18 kVa
`
`0.78 kVa
`
`Electromagnellc Compatlblllly
`
`FCC Class B
`
`Figure 1-3. Physical Specifications
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 16 of 92
`
`

`

`De1erlptlon
`
`Model 95
`
`LwAd In bela
`Operate
`Idle
`
`LpAm In dB
`Operate
`Idle
`
`<LpA>m In dB
`Operate
`Idle
`
`5.3
`
`5.3
`
`33
`
`33
`
`36
`
`36
`
`Notes:
`
`LwAd
`
`is the declared sound power level for the random sample of machines.
`
`is the mean value of the A-weighted sound pressure levels at the
`operator position (if any) for the random sample of machines.
`
`is the mean value of the A-weighted sound pressure levels at the
`<LpA>m
`one-meter positions for the random sample of machines.
`
`All measurements made in accordance with ANSI S12.10, and reported in
`conformance with ISO DIS 9296.
`
`The measurements are preliminary data and subject to change.
`
`Figure 1-4. Acoustical Readings
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 17 of 92
`
`

`

`Power Supply
`
`The power supply requires a sinewave input and converts the ac
`input voltage to three de output voltages. The switch near the power
`cord is used to select the input-voltage range. The power supply
`provides power for the following:
`
`• System board
`• Processor complex
`• Micro Channel adapters
`•
`Internal diskette drives
`Internal fixed disk drives
`•
`• Auxiliary device
`• Keyboard.
`
`The power switch and one light-emitting diode (LED) are on the front
`of the system unit. The power supply is operating properly when the
`LED is lit.
`
`Outputs
`
`The power supply provides separate voltage sources for the system
`board and the drives. The system-board voltages are +5 Vdc, + 12
`Vdc, and -12 Vdc. The voltages for the internal drives are + 5 Vdc
`and + 12 Vdc. The following is a list of the power provided for system
`components.
`
`System Component
`
`Internal Fixed Disk Drives •
`Total of Fixed Disk Drives
`Auxiliary Device
`Keyboard
`
`• Per power supply connector
`Figure 1-5. System-Provided Power
`
`Malxmum Current
`+12
`+s
`2.5A
`1.5A
`7.5A
`4.6A
`300mA
`275 mA
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 18 of 92
`
`

`

`The following are the load currents allowed for the connectors for the
`Type 3 adapters. The formulas used to determine the power
`requirements and the definition of adapter types can be found in the
`section of the Hardware Interface Technical Reference -
`Architectures that describes the Micro Channel architecture.
`
`Supply VoHage
`
`+ 5.0Vdc
`+12.0 Vdc
`-12.0 Vdc
`
`Maximum Current
`2.0A
`0.175 A
`0.040 A
`
`Figure 1-6. Load Current for Micro Channel Adapter Connector
`
`Output Protection
`
`A short circuit placed on any de output (between outputs or between
`an output and de return) latches all de outputs into a shutdown state
`with no damage to the power supply.
`
`If an overvoltage fault occurs (internal to the power supply), the
`power supply latches all de outputs into a shutdown state before any
`output exceeds 130% of its nominal value.
`
`If either of these shutdown states is actuated, the power supply
`returns to normal operation only after the fault has been removed and
`the power switch has been turned off for at least one second.
`
`Voltage Sequencing
`
`At power-on time, the output voltages track within 50 milliseconds of
`each other when measured at the 50% points.
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 19 of 92
`
`

`

`Power Supply Connectors
`
`The power supply provides three 4-pin connectors for internal
`devices. The connectors can be extended to provide power to more
`than one internal drive as long as the total power for all connectors
`does not exceed the connector specifications shown in Figure 1-5 on
`page 1-8.
`r@@@ @J
`t t t t
`
`1 2 3 4
`
`Pin
`1
`2
`
`Slgnal
`
`+ 12 Vdc
`DC Return
`
`Pin
`
`Slgnal
`
`3
`4
`
`DC Return
`+5Vdc
`
`Figure 1-7. Voltage Assignments for the Internal Drive Power-Supply
`Connectors
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 20 of 92
`
`

`

`Section 2. Programmable Option Select
`
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
`Description
`POS Address Map ................................ 2-3
`Card Selected Feedback
`. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
`System Board Setup
`. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
`System Board Enable/Setup Register (Hex 0094)
`. . . . . . . . . 2-4
`System Board POS Register 2 (Hex 0102) .............. 2-5
`System Board POS Register 3 (Hex 0103) .............. 2-6
`System Board POS Registers 4 (Hex 0104) ............. 2-7
`System Board POS Register 5 (Hex 0105)
`. . . . . . . . . . . . . . 2-8
`Diskette Drive POS Registers 4 (Hex 0104)
`. . . . . . . . . . . . . 2-9
`Adapter Enable/Setup Register (Hex 0096)
`. . . . . . . . . . . . 2-10
`. . . . . . . . . . . . . . . . . . . . . . . . . 2-11
`Selectable Boot Sequence
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 21 of 92
`
`

`

`Description
`
`Programmable Option Select (POS) eliminates the need for switches
`by replacing their function with programmable registers. This section
`describes the POS information used on the Model 95 system board.
`For additional POS information, refer to the Hardware Interface
`Technical Reference.
`
`Warning:
`•
`IBM recommends that programmable options be set only through
`the System Configuration utilities. Directly setting the POS
`registers or CMOS RAM POS parameters can result in multiple
`assignment of the same system resource, improper operation of
`the feature, loss of data, or possible damage to the hardware.
`
`• Application programs should not use the adapter identification
`(ID) unless absolutely necessary. Compatibility problems can
`result.
`
`•
`
`If an adapter and the system board are in setup mode at the same
`time, bus contention will occur, no useful programming can take
`place, and damage to the hardware can occur.
`• After setup operations are complete, the Adapter Enable/Setup
`register (hex 0096) should be set to hex 00, and the System Board
`Enable/Setup register (hex 0094) should be set to hex FF.
`
`• Bit 7 (channel reset) in the Adapter Enable/Setup register must
`be O to program the adapters.
`
`• Only 8-bit instructions are supported for setup operations. Using
`32- or 16-bit 1/0 instructions on 8-bit POS registers will cause
`erroneous data to be written or read.
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 22 of 92
`
`

`

`Setup functions respond to 1/0 addresses hex 0100 through 0107 only
`when their unique setup signal is active. The following precautions
`must be taken before setting individual bits in the PCS registers.
`
`Adapter Setup:
`
`• Bit 3 in the Adapter Enable/Setup register must be set to 1 to
`allow adapter setup.
`• Bits 7 -0 in the System Board Enable/Setup register must be set
`to 1 to avoid driving a 'setup' signal to a system board function.
`
`System Board Setup:
`
`• Bits 7 and 6 in the System Board Enable/Setup register must be
`set to 0 individually while other bits are set to 1 to setup
`corresponding system board functions.
`• Bit 3 in the Adapter Enable/Setup register must be set to Oto
`avoid driving a 'setup' signal to an adapter.
`
`POS Address Map
`
`The following table shows the organization of the 1/0 address space
`used by PCS. Bit 0 of PCS Register 2 and bits 6 and 7 of PCS
`Register 5 are fixed. All other bits in PCS Registers 2 through 5 are
`free-form.
`
`Address
`{Hex)
`
`0094
`0096
`0100
`0101
`0102
`
`0103
`0104
`0105
`0106
`0107
`
`Function
`System Board Enable/Setup Register
`Adapter Enable/Setup Register
`POS Register 0-Adapter Identification Byte (Low Byte)
`POS Register 1-Adapter Identification Byte (High Byte)
`POS Register 2-0ption Select Data Byte 1
`Bit O is Card Enable.
`POS Register 3-0ption Select Data Byte 2
`POS Register 4-0ption Select Data Byte 3
`POS Register 5-0ption Select Data Byte 4
`Reserved
`Reserved
`
`Figure 2-1. POS 110 Address Map
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 23 of 92
`
`

`

`Card Selected Feedback
`
`When an adapter is addressed, it responds by setting the '-card
`selected feedback' signal (-CD SFDBK) to active. -CD SFDBK is derived
`from the address decode and driven by a totem pole driver. It is
`latched by the system board and can be read through the Card
`Selected Feedback register at address hex 0091.
`
`The Card Selected Feedback register is a read-only register at
`address hex 0091. It allows programs to monitor-CD SFDBK and
`thereby determine if the system board 1/0 or an adapter is addressed
`and functioning.
`
`Bit
`7-1
`0
`
`Function
`Reserved
`-Card Selected Feedback
`
`Figure 2-2. Card Selected Feedback Register (Hex 0091)
`
`Bits 7 -1 These bits are reserved.
`
`Bit O
`
`This bit is set to 1 whenever -CD SFDBK was active on a
`previous cycle or whenever the system board 1/0
`functions (diskette drive, serial, or parallel interfaces) are
`accessed by an 1/0 or DMA cycle. Reading this register
`resets the bit to 0.
`
`System Board Setup
`
`The integrated 1/0 functions on the system board use POS
`information during setup. The diskette drive controller, serial port,
`and parallel port are treated as a single device. The System Board
`Enable/Setup register is used to place the system board into the
`setup mode.
`
`System Board Enable/Setup Register (Hex 0094)
`
`This is a read/write register; all bits in this register default to 1
`(enabled). Setup functions should only be accessed one at a time.
`
`Petitioners Ex. 1027
`IPR USP 7,834,586
`Page 24 of 92
`
`

`

`BIi
`7
`6
`5-0
`
`Function
`
`Enable/-Setup System Board Functions
`Enable/-Setup Diskette Drive Functions
`Reserved
`
`Figure 2-3. System Board Enable/Setup Register (Hex 0094)
`
`Bit 7
`
`When this bit is set to 0, various system board 1/0
`functions are placed in the setup mode. The diskette drive
`controller, serial port, and parallel port are controlled
`through System Board POS Register 2 (hex 0102).
`
`When this bit is set to 1, the system board function is
`enabled.
`
`Bit 6
`
`Additional setup for diskette drive. When this bit is set to
`0, these setup functions are available through the
`Diskette Drive POS Register 4.
`
`Bits 5 - 0 These bits are reserved.
`
`System Board POS Register 2 (Hex 0102)
`
`When the system board is in the setup mode, the diskette drive
`controller, serial port, and parallel port are controlled by this
`read/write register. Reading this register returns the current state of
`these system board functions.
`
`Bit
`7
`6, 5
`4
`3
`2
`1
`0
`
`Function
`
`Disable Parallel Port Extended Mode
`Parallel Port Select
`Enable Parallel Port
`Serial Port IRQ Select
`Enab