`(12) Patent Application Publication (10) Pub. No.: US 2005/0083270 A1
`Miyazawa
`(43) Pub. Date:
`Apr. 21, 2005
`
`US 20050O83270A1
`
`(54) ELECTRONIC CIRCUIT, METHOD OF
`DRIVING THE SAME, ELECTRONIC
`DEVICE, ELECTRO-OPTICAL DEVICE,
`ELECTRONIC APPARATUS, AND METHOD
`OF DRIVING THE ELECTRONIC DEVICE
`(75) Inventor: Takashi Miyazawa, Suwa-shi (JP)
`Correspondence Address:
`OLIFF & BERRIDGE, PLC
`P.O. BOX 19928
`ALEXANDRIA, VA 22320 (US)
`(73) Assignee: Seiko Epson Corporation, Tokyo (JP)
`21) Appl. No.:
`1092.1951
`(21) Appl. No
`1921,
`(22) Filed:
`Aug. 20, 2004
`
`(30)
`
`Foreign Application Priority Data
`
`Aug. 29, 2003 (JP)...................................... 2003-306804
`
`Jun. 29, 2004 (JP)...................................... 2004-191357
`
`Publication Classification
`
`(51) Int. Cl." ....................................................... G09G 3/30
`(52) U.S. Cl. ................................................................ 345/76
`
`(57)
`
`ABSTRACT
`
`A gate of a driving transistor is Set to a offset level corre
`sponding to the threshold of the driving transistor by an
`initializing current flowing between a Source and a drain of
`the driving transistor or a compensating transistor for the
`driving transistor. A conduction State of the driving transistor
`9.
`9.
`is Set according to a gate Voltage of the gate of the driving
`transistor that corresponds to a data Signal and the threshold
`of the driving transistor. A current of which a level corre
`sponds to the conduction State and of which the direction is
`opposite to the direction of the initializing current flows
`through driving transistor.
`
`
`
`CONTROL
`CIRCUIT
`
`COLUMN
`DIRECTION
`
`H
`D
`O
`
`CD
`C)
`2.
`2
`?h
`Z
`-
`CD
`2
`Z
`Z
`a.
`CD
`CfO
`
`Petitioner Samsung Ex. 1006 - Page 1 of 29
`
`
`
`Patent Application Publication Apr. 21, 2005 Sheet 1 of 11
`
`US 2005/0083270 A1
`
`
`
`
`
` CD SE -|
`
`20 O r– Q 20
` -0 O ± rn ZU |-
`
`
` TTT O O 2. -|
`2×
`
`
`
`
`Petitioner Samsung Ex. 1006 - Page 2 of 29
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`
`
`Patent Application Publication Apr. 21, 2005 Sheet 2 of 11
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`US 2005/0083270 A1
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`FIG. 2
`
`
`
`SEL1
`SEL2
`
`Petitioner Samsung Ex. 1006 - Page 3 of 29
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`
`
`Patent Application Publication Apr. 21, 2005 Sheet 3 of 11
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`US 2005/0083270 A1
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`FIG. 3
`
`1F.
`
`SEL1
`
`SE 2
`
`- Vdd
`V--|----------------------- Vss(or Vrvs)
`
`
`
`Vdata - - - -
`
`Petitioner Samsung Ex. 1006 - Page 4 of 29
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`
`
`Patent Application Publication Apr. 21, 2005 Sheet 4 of 11
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`US 2005/0083270 A1
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`
`
`FIG. 4A
`
`
`
`V1=VSS+Vth+o, - AVdata
`
`VSS
`
`VSS - Vodata
`
`C1
`
`FIG. 4B
`
`V2&WSS-Vth
`
`OLED
`
`
`
`
`
`Vdd
`
`Ioled
`
`FIG. 4C
`
`Petitioner Samsung Ex. 1006 - Page 5 of 29
`
`
`
`Patent Application Publication Apr. 21, 2005 Sheet 5 of 11
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`US 2005/0083270 A1
`
`FIG. 5
`
`
`
`Petitioner Samsung Ex. 1006 - Page 6 of 29
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`
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`Patent Application Publication Apr. 21, 2005 Sheet 6 of 11
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`US 2005/0083270 A1
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`FIG. 6
`
`...
`-
`
`SEL
`
`a L
`- Lb
`
`Y
`
`------------------
`
`Ti
`
`1
`
`I
`
`i
`
`X
`
`T2
`
`C2
`
`.
`
`T3
`N2
`
`OLED V N
`
`Petitioner Samsung Ex. 1006 - Page 7 of 29
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`
`
`Patent Application Publication Apr. 21, 2005 Sheet 7 of 11
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`US 2005/0083270 A1
`
`FIG. 7
`
`
`
`Petitioner Samsung Ex. 1006 - Page 8 of 29
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`
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`Patent Application Publication Apr. 21, 2005 Sheet 8 of 11
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`US 2005/0083270 A1
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`VSS
`WSS
`
`FIG. 8A
`
`V1=Vss+Vth
`
`La - - -
`
`VSS - Vodata
`
`VSS
`
`V1=Vss+Vthto AVdata
`C1
`
`T3
`
`FIG. 8B
`
`C2
`
`
`
`
`
`Vdd
`
`FIG. 8C
`
`Petitioner Samsung Ex. 1006 - Page 9 of 29
`
`
`
`Patent Application Publication Apr. 21, 2005 Sheet 9 of 11
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`US 2005/0083270 A1
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`FIG. 9
`
`SEL1
`
`SE;
`
`SEL4
`
`La
`
`EH-F
`IYY
`H-I-I-
`Yod
`- - - -
`---------
`C1
`
`- Ya
`
`T1
`
`C2
`
`I
`
`X
`
`T5 H T4 -
`
`OLED V/
`
`N
`
`Petitioner Samsung Ex. 1006 - Page 10 of 29
`
`
`
`Patent Application Publication Apr. 21, 2005 Sheet 10 of 11
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`US 2005/0083270 A1
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`FIG 10
`
`
`
`Petitioner Samsung Ex. 1006 - Page 11 of 29
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`
`
`Patent Application Publication Apr. 21, 2005 Sheet 11 of 11
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`US 2005/0083270 A1
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`FIG. 11
`
`
`
`SEL1
`SEL2
`
`Petitioner Samsung Ex. 1006 - Page 12 of 29
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`
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`US 2005/0083270 A1
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`Apr. 21, 2005
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`ELECTRONIC CIRCUIT, METHOD OF DRIVING
`THE SAME, ELECTRONIC DEVICE,
`ELECTRO-OPTICAL DEVICE, ELECTRONIC
`APPARATUS, AND METHOD OF DRIVING THE
`ELECTRONIC DEVICE
`
`BACKGROUND OF THE INVENTION
`0001) 1. Field of Invention
`0002 The present invention relates to an electronic cir
`cuit Suitable for driving a driven element Such as an electro
`optical element, a method of driving the electronic circuit,
`an electro-optical device, an electronic device, a method of
`driving the electronic device, and an electronic apparatus.
`0003 2. Description of Related Art
`0004 Recently, displays using an organic electrolumi
`nescent (EL) element have been drawing attention. The
`organic EL element is one of the current-driven elements
`whose brightness is Set according to a driving current
`flowing therethrough. In an active matrix driving mode, in
`order to accurately obtain the brightness, it is necessary to
`compensate the different characteristics of transistors con
`Stituting pixel circuits. As a method of compensating the
`different characteristics, a Voltage programmed mode and a
`current programmed mode have been Suggested.
`0005 Moreover, in Japanese Unexamined Patent Appli
`cation Publication No. 2002-255251, which is earlier filed
`by the present applicants, a compensation method of Vth is
`disclosed.
`
`SUMMARY OF THE INVENTION
`0006. It is an object of the present invention to provide a
`novel electronic device capable of compensating character
`istics of transistors.
`0007 Further, it is another object of the present invention
`to enhance the flexibility of operational design by compen
`Sating Vth compensation and by applying a reverse bias in
`one operation proceSS in Such an electronic device.
`0008 A first method of driving an electronic circuit
`according to an aspect of the present invention, the method
`including a first Step of generating a potential difference
`between a first terminal and a Second terminal of a driving
`transistor having a channel region arranged between the first
`terminal and the Second terminal, Such that the first terminal
`functions as a drain of the driving transistor, in a State in
`which a gate and the first terminal of the driving transistor
`are electrically coupled to each other; and a Second step of
`Supplying a driven element with a driving Voltage and/or a
`driving current according to a conduction State of the driving
`transistor which is Set by Supplying the gate of the driving
`transistor with a data Signal, Such that the Second terminal
`functions as the drain of the driving transistor.
`0009. In the above-mentioned method of driving the
`electronic device, a relative potential relation between the
`first terminal and the Second terminal is changed according
`to steps. However, Since a forward bias and a reverse bias (or
`a non-forward bias) are applied to the driving transistor, it is
`possible to Suppress change or deterioration in characteristic
`of the driving transistor.
`0.010
`Here, the term “drain is defined by a conduction
`type and a relative potential relation of terminals of a
`
`transistor. For example, if the transistor is a n-type, a high
`potential terminal of two terminals with the channel region
`interposed therebetween becomes a drain. Meanwhile, if
`the transistor is a p-type, a low potential terminal of two
`terminals with the channel region interposed therebetween,
`becomes a drain.
`0011. In the above-mentioned method of driving an elec
`tronic device, after generating the potential difference, an
`initializing current may flow between the first terminal and
`the Second terminal, and the gate Voltage of the driving
`transistor may be set to an offset level according to the
`threshold value of the driving transistor.
`0012 Here, the term “after generating the potential dif
`ference means that the generation of the potential difference
`is performed as an initial operation, and a process of Setting
`the offset level may be performed after generating the
`potential difference or during generating the potential dif
`ference.
`0013 In the above-mentioned method of driving an elec
`tronic device, the electronic device may comprise a capaci
`tor having a first electrode and a Second electrode with a
`capacitance formed therebetween, in which the gate is
`coupled to the first electrode, and after generating the
`potential difference, the conduction State may be set by
`making the gate So as to be in a floating State and by
`Supplying the gate with the data Signal by means of capaci
`tive coupling via the capacitor.
`0014.
`In the above-mentioned method of driving an elec
`tronic device, during at least a part of the period in which
`Supply of the driving Voltage and/or driving current is
`performed, the first terminal and the gate of the driving
`transistor may be electrically disconnected from each other.
`0015. Here, the term “electrically disconnected means
`that a conduction State between the first terminal and the gate
`is removed, and a capacitor may be interposed between the
`first terminal and the gate.
`0016. In the above-mentioned method of driving an elec
`tronic device, the driven element may include an operating
`electrode coupled to the first terminal, a counter electrode,
`and a functional layer arranged between the operating elec
`trode and the counter electrode, and during at least a period
`in which the generation of the potential difference and the
`Supply of the driving Voltage and/or driving current are
`performed, the Voltage of at least the counter electrode may
`be fixed to a predetermined Voltage level.
`0017. In the above-mentioned method of driving an elec
`tronic device, during at least a part of a period in which the
`generation of the potential difference is performed, the
`Voltage of the Second terminal may be set to be lower than
`the predetermined Voltage level. Thus, it is possible to apply
`a non-forward bias to, for example, the driving transistor or
`the driven element.
`0018. The above-mentioned method of driving an elec
`tronic device may further including Setting a Voltage level of
`the first terminal to a level lower than the predetermined
`Voltage level, and during a period in which the Setting of the
`Voltage level is performed, a Voltage of the counter electrode
`may be fixed to the predetermined voltage level. Thus, it is
`possible to apply a non-forward bias to, for example, the
`driven element.
`
`Petitioner Samsung Ex. 1006 - Page 13 of 29
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`US 2005/0083270 A1
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`Apr. 21, 2005
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`0019. There is a method of driving an electronic device
`according to another aspect of the present invention, the
`electronic circuit includes a driving transistor having a first
`terminal, a Second terminal, and a channel region arranged
`between the first terminal and the Second terminal, and a
`compensating transistor having a third terminal, a fourth
`terminal, and a channel region arranged between the third
`terminal and the fourth terminal, in which its gate and the
`third terminal are coupled to each other.
`0020. The method includes generating a potential differ
`ence between the third terminal and the fourth terminal, Such
`that the third terminal functions as a drain of the compen
`Sating transistor, and Supplying a driven element with a
`driving Voltage and/or a driving current according to a
`conduction State of the driving transistor which is Set by
`Supplying the gate of the driving transistor with a data
`Signal, wherein the Voltage level of the fourth terminal
`during at least a part of the period in which the Supply of the
`driving Voltage and/or driving current is performed is Set to
`be different from the voltage level of the third terminal
`during at least a part of a period in which the generation of
`potential difference is performed.
`0021. In the above-mentioned method of driving an elec
`tronic device, after generating the potential difference, an
`initializing current may flow between the third terminal and
`the fourth terminal, and the gate of the driving transistor may
`be set to an offset level according to the threshold value of
`the compensating transistor.
`0022 Here, the initializing current may flow during the
`generation of the potential difference is performed as an
`initial operation, and a process of Setting the offset level may
`be performed after generating the potential difference or
`during generating the potential difference.
`0023. In the above-mentioned method of driving an elec
`tronic device, during at least a part of the period in which the
`Supply of the driving Voltage and/or the driving current is
`performed, the third terminal and the fourth terminal may be
`Substantially electrically disconnected from each other.
`Thus, it is possible to make the gate of the driving transistor
`in a floating State, and it is also possible to maintain the gate
`Voltage of the gate at a Voltage level according to the data
`Signal.
`In the above-mentioned method of driving an elec
`0024.
`tronic device, preferably, during at least a part of the period
`in which the generation of the potential difference is per
`formed, the voltage level of the first terminal is set to be
`higher than the Voltage level of the Second terminal, and
`during at least a part of the period in which the Supply of the
`driving Voltage and/or the driving current is performed, the
`Voltage level of the Second terminal is Set to be higher than
`the voltage level of the first terminal.
`0.025
`In the above-mentioned method of driving an elec
`tronic device, the driven element may comprise an operating
`electrode coupled to the first terminal, a counter electrode,
`and a functional layer arranged between the operating elec
`trode and the counter electrode, and during at least a period
`in which the generation of the potential difference and the
`Supply of the driving Voltage and/or the driving current are
`performed, the Voltage level of the counter electrode may be
`fixed to a predetermined Voltage level.
`0026. In the above-mentioned method of driving an elec
`tronic circuit, during at least a part of the period in which the
`
`generation of the potential difference is performed, the
`voltage level of the second terminal is preferably set to be
`lower than the predetermined Voltage level.
`0027 Preferably, the above-mentioned method of driving
`an electronic circuit further includes Setting the Voltage level
`of the first terminal to a voltage level lower than the
`predetermined Voltage level, and during the period in which
`the Setting of the Voltage level is performed, the Voltage of
`the counter electrode is fixed to the predetermined Voltage
`level.
`0028. In the above-mentioned method of driving an elec
`tronic circuit, the Voltage level of the fourth terminal may be
`Set to be the same Voltage level as the Second terminal in the
`generation of the potential difference and the Supply of the
`driving Voltage and/or the driving current.
`0029. There is an electronic circuit that drives a driven
`element according to another aspect of the present invention,
`the electronic circuit includes a driving transistor having a
`first terminal, a Second terminal and a channel region
`arranged between the first terminal and the Second terminal;
`a first capacitor having a first electrode and a Second
`electrode with a capacitance formed therebetween; and a
`first transistor arranged between the first terminal and a gate
`of the driving transistor to control the electrical coupling
`between the first terminal and the gate, wherein the first
`electrode is coupled to the gate, and the Second electrode is
`coupled to the first terminal.
`0030 The above-mentioned electronic circuit may fur
`ther include a Second capacitor having a third electrode and
`a fourth electrode with a capacitance formed therebetween,
`and a Second transistor having a third terminal, a fourth
`terminal and a channel region arranged between the third
`terminal and the fourth terminal, in which the gate of the
`driving transistor may be coupled to the third electrode, and
`the third terminal may be coupled to the fourth electrode.
`0031. In the above-mentioned electronic circuit, during at
`least a part of a first period in which the first terminal and the
`gate of the driving transistor are electrically coupled to each
`other via the first transistor, a voltage level of the first
`terminal and/or the Second terminal may be set Such that the
`first terminal functions as a drain of the driving transistor,
`and during at least a part of a Second period in which the first
`terminal and the gate of the driving transistor are electrically
`disconnected from each other, the Voltage level of the first
`terminal and/or the Second terminal may be set Such that the
`Second terminal functions as a drain of the driving transistor.
`0032. There is an electronic circuit that drives a driven
`element according to another aspect of the present invention,
`the electronic circuit includes a driving transistor having a
`first terminal, a Second terminal and a channel region
`arranged between the first terminal and the Second terminal,
`and a first transistor arranged between the first terminal and
`a gate of the driving transistor to control the electrical
`coupling between the first terminal and the gate, wherein
`during at least a part of a first period in which the first
`terminal and the gate of the driving transistor are electrically
`coupled to each other via the first transistor, the Voltage level
`of the first terminal and/or the Second terminal is Set Such
`that the first terminal functions as a drain of the driving
`transistor, and during at least a part of a Second period in
`which the first terminal and the gate of the driving transistor
`
`Petitioner Samsung Ex. 1006 - Page 14 of 29
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`US 2005/0083270 A1
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`Apr. 21, 2005
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`are electrically disconnected from each other, the Voltage
`level of the first terminal and/or the second terminal is set
`Such that the Second terminal functions as a drain of the
`driving transistor.
`0033. In the above-mentioned electronic circuit, after the
`first period, the Voltage level of the gate of the driving
`transistor may be set to an offset Voltage level according to
`the threshold Voltage of the driving transistor, and during at
`least a part of the Second period, a driving Voltage or a
`driving current of which a level corresponds to the conduc
`tion State of the driving transistor may be Supplied to the
`driven element.
`0034.
`Here, a process of setting the offset level may be
`performed after the first period or during the first period.
`0035. There is provided an electronic circuit that drives a
`driven element according to another aspect of the present
`invention, the electronic circuit includes a driving transistor
`having a first terminal, a Second terminal and a channel
`region arranged between the first terminal and the Second
`terminal; and a compensating transistor a third terminal, a
`fourth terminal and a channel region arranged between the
`third terminal and the fourth terminal, in which the third
`terminal and its gate are coupled to each other, wherein the
`third terminal or the fourth terminal is coupled to the gate of
`the driving transistor, and Voltages of the third terminal and
`the fourth terminal are respectively Settable to a plurality of
`voltage levels.
`0036). In the above-mentioned electronic circuit, during
`the first period, a voltage level of the third terminal and/or
`the fourth terminal may be set such that the third terminal
`functions as a drain of the compensating transistor, during
`the Second period, the Voltage level of the third terminal
`and/or the fourth terminal may be set such that the third
`terminal and the fourth terminal are electrically discon
`nected from each other, during at least a part of the Second
`period, a driving Voltage or a driving current of which a level
`corresponds to a conduction State of the driving transistor
`may be Supplied to the driven element, and the Voltage level
`of the fourth terminal during the first period and the Voltage
`level of the fourth terminal during the second period may be
`to be different from each other.
`0037 Preferably, the above-mentioned electronic circuit
`further includes a capacitor having a first electrode and a
`Second electrode with a capacitance formed therebetween, in
`which the first electrode is coupled to the gate of the driving
`transistor, and after the first period, an initializing current
`flows between the third terminal and the fourth terminal of
`the compensating transistor, Such that the Voltage level of the
`gate of the driving transistor is set to an offset level accord
`ing to the threshold Voltage of the compensating transistor,
`and then by means of capacitive coupling via the capacitor
`to be generated when a data Voltage corresponding to the
`data Signal is applied to the Second electrode, the gate of the
`driving transistor is Set to a Voltage level corresponding to
`the data voltage on the basis of the offset level, such that the
`conduction State is Set.
`0.038. In the above-mentioned electronic circuit, the volt
`age level of the fourth terminal or the third terminal is
`preferably Set to the same Voltage level as the Voltage level
`of the Second terminal during the first and Second periods.
`
`0039 There is provided an electronic device includes a
`plurality of electronic circuits described above, and driven
`elements provided in the corresponding electronic circuits.
`0040. There is provided an electro-optical device accord
`ing to another aspect of the present invention, the electro
`optical device includes a plurality of data lines, a plurality of
`Scanning lines, a plurality of first power lines, and a plurality
`of pixel circuits provided corresponding to interSections of
`the plurality of data lines and the plurality of Scanning lines,
`each of the plurality of pixel circuits includes an electro
`optical element, a driving transistor having a first terminal,
`a Second terminal and a channel region arranged between the
`first terminal and the Second terminal, and a first Switching
`transistor arranged between the first terminal and a gate of
`the driving transistor to control the electrical coupling
`between the first terminal and the gate, wherein a conduction
`State of the driving transistor is Set according to a data Signal
`which is Supplied via one data line of the plurality of data
`lines, a driving Voltage or a driving current according to the
`conduction State of the driving transistor is Supplied to the
`electro-optical element, wherein during at least a part of a
`period in which the first terminal and the gate of the driving
`transistor are electrically coupled to each other via the first
`Switching transistor, the Voltage level of the first terminal
`and/or the Second terminal is Set Such that the first terminal
`functions as a drain, and wherein during at least a part of a
`period in which the driving Voltage or the driving current is
`Supplied to the electro-optical element, the Voltage level of
`the first terminal and/or the Second terminal is Set Such that
`the Second terminal functions as the drain.
`0041. In the above-mentioned electro-optical device,
`each of the plurality of pixel circuits may further include a
`first capacitor having a first electrode and a Second electrode
`with a capacitance formed therebetween; and a Second
`Switching transistor that controls the electrical coupling
`between the one data line and the Second electrode, in which
`the gate of the driving transistor may be coupled to the first
`electrode, during at least a part of the period in which the
`first terminal functions as the drain of the driving transistor,
`an initializing current may flow between the first terminal
`and the Second terminal, and the gate of the driving tran
`Sistor may be set to an offset level according to the threshold
`value of the driving transistor, and then by a capacitive
`coupling via the first capacitor when the data Signal is
`Supplied via the Second Switching transistor, the gate Voltage
`of the driving transistor may be set to a Voltage level
`according to the data Signal and the offset level.
`0042. In the above-mentioned electro-optical device,
`each of the plurality of pixel circuits may include a Second
`capacitor having a third electrode and a fourth electrode with
`a capacitance formed therebetween, in which the third
`electrode may be coupled to the gate of the driving transis
`tor, and the fourth electrode may be coupled to the first
`terminal. Thus, it is possible to automatically adjust the
`Voltage level of the gate of the driving transistor with respect
`to change in Voltage level of the first terminal by a capacitive
`coupling via the Second capacitor.
`0043. In the above-mentioned electro-optical device,
`preferably, the Second terminal is coupled to one power line
`of the plurality of power lines, and the one power line is
`Settable to a plurality of Voltage levels.
`0044 An electro-optical device according to another
`aspect of the present invention includes a plurality of data
`
`Petitioner Samsung Ex. 1006 - Page 15 of 29
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`US 2005/0083270 A1
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`Apr. 21, 2005
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`lines, a plurality of Scanning lines, a plurality of power lines,
`and a plurality of pixel circuits provided corresponding to
`interSections of the plurality of data lines and the plurality of
`Scanning lines, each of the plurality of pixel circuits includes
`an electro-optical element, a driving transistor having a first
`terminal, a Second terminal and a channel region arranged
`between the first terminal and the Second terminal, and a
`compensating transistor having a third terminal, a fourth
`terminal and a channel region arranged between the third
`terminal and the fourth terminal, in which the third terminal
`and its gate are coupled to each other, wherein a conduction
`State of the driving transistor is Set according to a data Signal
`Supplied via one data line of the plurality of data lines, the
`third terminal or the fourth terminal is coupled to one power
`line of the plurality of power lines, a driving Voltage or a
`driving current according to the conduction State of the
`driving transistor is Supplied to the electro-optical element,
`and the one power line is Settable to a plurality of Voltage
`levels.
`0.045. In the above-mentioned electro-optical device, dur
`ing at least a part of a period in which the third terminal
`functions as a drain of the compensating transistor, the
`Voltage level of the one power line may be set to a first
`Voltage level, and during at least a part of a period in which
`the driving Voltage or the driving current is Supplied to the
`electro-optical element, the Voltage of the one power line
`may be set to a Second Voltage level, and the first voltage
`level is different from the second voltage level.
`0046. In the above-mentioned electro-optical device, dur
`ing at least a part of the period in which the third terminal
`functions as a drain of the compensating transistor, the
`Voltage level of the gate of the driving transistor may be Set
`to an offset level according to the threshold voltage of the
`compensating transistor.
`0047. In the above-mentioned electro-optical device, the
`fourth terminal may be coupled to the one data line, and the
`first voltage level may be set to be lower than the second
`Voltage level.
`0.048. In the above-mentioned electro-optical device, the
`first terminal or the Second terminal may be coupled to the
`one power line.
`0049. Thus, it is possible to reduce the number of wiring
`lines per one pixel circuit.
`0050. In the above-mentioned electro-optical device, the
`first terminal or the Second terminal may be coupled to a
`power line of the plurality of power lines other than the
`Single power line.
`0051. In the above-mentioned electro-optical device, the
`plurality of power lines preferably extends in a direction
`interSecting the plurality of data lines.
`0.052
`In the above-mentioned electro-optical device,
`transistors included in each of the plurality of pixel circuits
`preferably include only three transistors.
`0.053 Thus, it is possible to enhance the aperture ratio.
`0.054 An electronic apparatus may include an electro
`optical device described above.
`0.055 Amethod of driving an electronic device according
`to another aspect of the present invention include Setting the
`Voltage of a node coupled to a gate of a driving transistor to
`
`an offset level according to the threshold value of the driving
`transistor by connecting electrically the gate and one of a
`Source and a drain of the driving transistor to each other and
`applying a non-forward bias between the Source and the
`drain of the driving transistor, writing data on the basis of the
`offset level in a capacitor coupled to the node by Supplying
`a data line capacitively coupled to the node with a Voltage
`from with a variable Voltage Source, and generating a current
`according to the data Stored in the capacitor by applying a
`forward bias between the source and the drain of the driving
`transistor, and Supplying a current detection circuit with the
`Current.
`0056. There is provided a method of driving an electronic
`device according to another aspect of the present invention
`having a driving transistor that has a first terminal, a Second
`terminal and a channel region arranged between the first
`terminal and the Second terminal.
`0057 The method include setting a voltage level of the
`first terminal to be higher than a Voltage level of the Second
`terminal during at least a part of a period in which compen
`sation of characteristics of the driving transistor is per
`formed, and Setting a Voltage level of the first terminal to be
`lower than a Voltage level of the Second terminal during at
`least a part of a period in which at least one of a driving
`Voltage and a driving current according to a conduction State
`of the driving transistor is Supplied to driven element.
`0058. In the above-mentioned method of driving an elec
`tronic device, in a State in which the first terminal and the
`gate of the driving transistor are coupled to each other, the
`compensation Step is preferably performed.
`0059. There is a method of driving a pixel circuit accord
`ing another aspect of the present invention, the method
`comprising: Setting the Voltage of a node coupled to a gate
`of a driving transistor to an offset level according to the
`threshold value of the driving transistor by coupling the gate
`and one terminal of the driving transistor to each other and
`applying a non-forward bias to the driving transistor, writing
`data based on the offset level in a capacitor coupled to the
`node by Supplying a data line capacitively coupled to the
`node with a data Voltage defining the grayScale of a pixel,
`and generating a driving current according to data Stored in
`the capacitor by applying a forward bias to the driving
`transistor, and Supplying an electro-optical element coupled
`to the driving transistor with the driving current, Such that
`the brightness of the electro-optical element is Set.
`0060. In the above-mentioned method of driving a pixel
`circuit, the other terminal of the driving transistor may be
`coupled to a power line whose Voltage of a node is variably
`Set. In this case, preferably, the Setting the Voltage includes
`Setting the Voltage of the power line to a first voltage, and
`generation of the driving current includes Setting the Voltage
`of the power line to a Second Voltage higher than the first
`Voltage. Further, writing data preferably includes Setting the
`Voltage of the power line to the first voltage.
`0061. In the above-mentioned method of driving a pixel
`circuit, preferably, the first Voltage is lower than the Voltage
`of one terminal of the driving transistor when a non-forward
`bias is applied, and the Second Voltage is higher than the
`Voltage of one terminal of the driving transistor when a
`forward bias is applied. Further, preferably, to a counter
`electrode of the electro-optical element, a predetermined
`Voltage is fixedly applied.
`
`Petitioner Samsung Ex. 1006 - Page 16 of 29
`
`
`
`US 2005/0083270 A1
`
`Apr. 21, 2005
`
`0062) The above-mentioned method of driving a pixel
`circuit may further comprise applying a non-forward bias to
`the electro-optical element by Setting the Voltage of the
`power line to a third Voltage lower than the predetermined
`Voltage. Further, the above-mentioned method of driving a
`pixel circuit may further comprise applying a non-forward
`bias to the electro-optical element by applying the third
`Voltage lower than the predetermined Voltage to the node
`th