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`"Express Mail" mai1mg label number --=EJ'--05 __ 8""'15"'2"""04 .... 4U " "S ' - - - - - - - - - - - -
`;2..- J- 0 I
`Date of Madmg
`I hereby certify that the documents indicated below are bemg depo51ted with the United Stales Postal Service under 37
`CFR 1 10 on the date md1cated above and are addressed to Box Patent Apphcat1on, Assistant CorrnrnsslOner for Patents,
`Washington, DC 20231, and mailed on the above Date ofMatlmg with the above "Express Mail" ma,hng label number
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`BOX PATENT APPLICATION
`ASSISTANT COMMISSIONER FOR PATENTS
`WASHINGTON, D. C. 20231
`
`Sir:
`
`DOCKET NUMBER: 16312-P00SUS
`
`Transmit1ed herewith for filing is the Patent Application of'
`Eric G. Suder et al
`Inventor:
`QUALITY OF SERVICE IN A VOICE OVER IP TELEPHONE SYSTEM
`
`For:
`Enclosed are:
`Patent Spec1ficat1on
`.Jl_ sheets of drawing(s)
`An assignment of the mventJon to Estech Systems, Inc. (includes Recordation Form Cover Sheet).
`A certified copy of a_ apphcation.
`An associate power of attorney
`Information Disclosure Statement, PTO 1449 and copies of references.
`Applicant claims small entity status (37 C.F R 1.27).
`Request Not to Pubhsh (35 U.S.C. 122(b)(2)(B)(1)
`Ill
`The filing fee has been calculated as shown below:
`
`l8J
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`Ill
`(cid:143)
`(cid:143)
`(cid:143)
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`Ill
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`Ill
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`For
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`Basic Fee
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`Total Claims
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`Indep. Claims
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`Number
`FIied
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`77
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`5
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`20
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`3
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`o MULTIPLE DEPENDENT CLAIM(S) PRESENTED
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`Number
`Extra
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`Rate
`Small Entity
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`Fee
`Small Entity
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`57
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`2
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`X 9=
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`x40
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`+ 135 =
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`TOTAL
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`$
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`$
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`$
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`355 00
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`513 00
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`80 00
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`948 00
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`l8l
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`Ill
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`ts enclosed for the filmg fee.
`A check m the amount of$ 948.00
`The Assistant Commissioner IS hereby authonzed to charge payment of the following fees associated Wlth this commumcation or credit any
`overpayment to Deposit Account No 23-2426 (16312-P00SUS). A duplicate copy of this sheet is enclosed.
`Any additional filmg fees required under 37 CFR § 1.16
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`
`Ill
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`l8l
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`::ODMA\?CDOCS\AUSTIN_l\157648\l
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`PTO/SB/35 (11-00)
`Approved for use through 10/31/2002 0MB 0651-0031
`U S Patent and Trademark Office, U S. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of 1nformatron unless 11 displays a valid 0MB control number
`
`REQUEST AND CERTIFICATION
`UNDER
`35 U.S.C. 122 (b)(2){B){i)
`
`First Named Inventor I Eric G. Suder et al.
`Title I QUALITY OF SERVICE IN A VOICE OVER IP
`Atty Docket Number I 16312-P005US
`
`TELEPHONE SYSTEM
`
`I hereby certify that the invention disclosed in the attached application has not and will not
`be the subject of an application filed in another country, or under a multilateral agreement,
`I hereby request that the attached
`that requires publication at eighteen months after filing.
`application not be published under 35 U.S.C. 122(b).
`
`a./1)01
`
`1 1
`Date
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`Kelly K Kordz1k
`Reg No 36,571
`
`Typed or printed name
`
`This request must be signed in compliance with 37 CFR 1.33(b) and submitted with the
`application upon filing.
`
`If applicant rescinds a
`Applicant may rescind this nonpublication request at any time.
`request that an application not be published under 35 U.S.C. 122(b), the application will be
`scheduled for publication at eighteen months from the earliest claimed filing date for which a
`benefit is claimed.
`If applicant subsequently files an application directed to the invention disclosed in the
`attached application in another country, or under a multilateral international agreement, that
`requires publication of applications eighteen months after filing, the applicant must notify the
`United States Patent and Trademark Office of such filing within forty-five (45) days after the date
`of the filing of such foreign or international application. Failure to do so will result in
`abandonment of this application (35 U.S.C. 122(b)(2)(B)(iii)).
`
`Burden Hour Statement This collect1on of information Is required by 37 CFR 1 213(a) The ,nformat1on 1s used by the public to requires that an application not be
`published under 35 USC 122(b) (and the PTO to process that request) Conf1dent1ahty Is governed by 35 USC 122 and 37 CFR 1 14 This form Is estimated
`to
`to take 6 minutes to complete This ume will vary depending upon the needs of the rnd1v1dual case Any comments on the amount of time you are
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`complete this form should be sent to the Chief lnfonnat1on Officer, U.S Patent and Trademark Office, Washington, DC 20231 DO NOT SEND
`COMPLETED FORMS TO THIS ADDRESS SEND TO. Assistant Cornm1ss1oner for Patents, Washington. DC 20231
`
`PTO/S8/35 (11/00)
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`QUALITY OF SERVICE IN A
`VOICE OVER IP TELEPHONE SYSTEM
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`TECHNICAL FIELD
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`The present invention relates in general to information processing systems,
`and in particular, to the use of Voice over IP technology to transmit voice
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`conversations.
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`BACKGROUND INFORMATION
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`Voice over IP ("VoIP") is a relatively recent development that is utilized to
`transmit voice conversations over a data network using the Internet Protocol ("IP").
`Internet Protocol is a part of the TCP/IP family of protocols described in software that
`tracks the Internet address of nodes, routes outgoing messages, and recognizes
`incoming messages. Such a data network may be the Internet or a corporate intranet,
`or any TCP/IP network. There are several potential benefits for moving voice over a
`data network using IP. First, there is a savings in money compared to the need to use
`traditional tolled telecommunications networks. Additionally, Voice over IP enables
`the management of voice and data over a single network. And, with the use of IP
`phones, moves, adds and changes are easier and less expensive to implement.
`Moreover, additional and integrated new services, including integrated messaging,
`bandwidth on demand, voice e-mails, the development of "voice portals" on the Web,
`simplified setting up and tearing down, and transferring of phone calls are capable.
`Using Voice over IP technology, phone systems can communicate with each
`other over existing TCP/IP data networks typically present between remote offices.
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`This feature alone can eliminate the need for expensive, dedicated circuits between
`facilities. The shared bandwidth can also be used for voice calls and data
`communication simultaneously; no bandwidth is dedicated to one or the other.
`Another advantage of a Voice over IP system is the ability to implement a
`phone system over an existing data network that is already connecting workstations
`within a local area network, such as over an Ethernet. An Ethernet operates over
`twisted wire and over coaxial cable for connecting computers, printers, workstations,
`terminals, servers, etc., within the same building or a campus. The Ethernet utilizes
`frame packets for transmitting information. Voice over IP can utilize such packet
`switching capabilities to connect IP phones onto the Ethernet. However, the
`implementation of Voice over IP onto an Ethernet has proven to have some
`difficulties. Data networks were originally designed to allow for latency (delays) in
`the delivery of packets between sources and destinations. If a packet became lost,
`then the Ethernet would go through a re-send protocol ta have the packet sent again
`from the source to the destination, and the data then reassembled at the destination
`end. With voice ( or for that matter, video or any other real-time application), such
`delays present problems. Real-time applications cannot tolerate significant delays or
`they no longer become real-time applications. Such quality of service ("QOS ")
`concerns are especially amplified when attempting to implement Voice over IP onto
`an Ethernet, which utilizes a 10/100 Base T protocol, since it can be affected by bursts
`of data transfers among the workstations and servers, etc. For example, a large print
`job or a file access can significantly occupy the bandwidth on such an Ethernet, thus
`greatly degrading the ability to transmit any real-time information during that data
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`burst. This problem worsens as more and more Voice over IP telephones are added to
`the network.
`Therefore, there is a need in the art for an improved information processing
`system that can handle multimedia traffic in conjunction with typical bursty data
`transmissions.
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`SUMMARY OF THE INVENTION
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`The present invention addresses the foregoing need by providing an
`information processing system whereby an IP telephony system is designed to share a
`network with data devices communicating with a network operating system. In one
`embodiment, the network is an Ethernet local area network. Because these systems
`share a common hardware media, there is a possibility to saturate the network.
`Multimedia traffic can be adversely affected by jitter and latency, while data traffic is
`typically immune to these types of disruptions. This bandwidth contention requires a
`suitable quality of service arrangement to give the multimedia traffic priority during
`peak traffic loads.
`More specifically, an IP telephony device will contain two separate media
`access controllers ("MACs") configured to provide a two-port, layer 2 Ethernet
`switch. This approach permits one MAC to be connected to the network, while the
`other MAC is dedicated to a connected network device. This allows all traffic
`flowing between MACs to be manipulated by a hardware/software approach within
`the IP telephony device. The quality of service algorithm of the present invention
`uses this configuration to restrict data traffic to/from the network device during peak
`traffic conditions, thus providing increased multimedia traffic bandwidth when
`needed.
`In one embodiment of the present invention, voice jitter buffers within each IP
`telephony device are used to minimize the effects of jitter and latency by providing a
`buffer of three voice packets. If the bandwidth usage of the Ethernet link becomes too
`great, the jitter buffer will start to deplete. The IP telephony device will detect this
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`condition and report it to a quality of service task running within a multimedia server
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`coupled to the Ethernet.
`If any of the IP telephony devices report to the multimedia server that their
`jitter buffers have hit a specified threshold, the multimedia server will issue a
`command to all ( or selected) IP telephony devices simultaneously to begin a flow
`control process between their respective network devices and the network. If, after a
`programmable interval, the multimedia server ceases receiving quality of service
`messages from the IP telephony devices, the multimedia server will issue a command
`to stop the flow control process.
`In an embodiment of the present invention, the command that the multimedia
`server issues to instruct the IP telephony devices to start the flow control process will
`contain a parameter used to signify how aggressively the IP telephony devices should
`flow control their respective data paths. For example, the multimedia server would
`first send the most aggressive value. Once the quality of service messages cease from
`the IP telephony devices, the multimedia server would then send a next lower
`aggressive parameter value. If no quality of service messages are received, the
`multimedia server will tum off the quality of service algorithm. If, however, during
`any stage if the quality of service messages are received from the IP telephony
`devices, the multimedia server will reissue the next higher flow control value.
`In one embodiment ofthe present invention, during the quality of service flow
`control processes, the IP telephony devices may flood the private network between the
`IP telephony devices and the network devices with idle patterns (jabber). The various
`levels of flow control needed could be achieved by a jabber duty cycle. For example,
`a most aggressive value may have an eighty percent duty cycle, while a least
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`aggressive value may have a twenty percent duty cycle. During the jabber process,
`communication between the network device and server is disrupted, allowing more
`bandwidth for the voice packets between the IP telephony devices and the multimedia
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`server.
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`The foregoing has outlined rather broadly the features and technical
`advantages of the present invention in order that the detailed description of the
`invention that follows may be better understood. Additional features and advantages
`of the invention will be described hereinafter which form the subject of the claims of
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`the invention.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`For a more complete understanding of the present invention, and the
`advantages thereof, reference is now made to the following descriptions taken in
`conjunction with the accompanying drawings, in which:
`FIGURE 1 illustrates an information processing system configured in
`accordance with the present invention;
`FIGURE 2 illustrates a wide area network configuration of the present
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`invention;
`FIGURE 3 illustrates another embodiment of a wide area network
`configuration of the present invention;
`FIGURE 4 illustrates a block diagram of a configuration of the present
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`invention;
`FIGURE 5 illustrates a block diagram of a network card configured in
`accordance with the present invention;
`FIGURE 6 illustrates a block diagram of the main board of the present
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`invention;
`FIGURE 7 illustrates a block diagram of a peripheral card configured in
`accordance with the present invention;
`FIGURE 8 illustrates a block diagram of a telephony device configured in
`accordance with the present invention;
`FIGURE 9 illustrates a flow diagram of a station-to-station telephone call;
`FIGURES 10, 11, 12A and 12B illustrate flow diagrams configured in
`accordance with the present invention; and
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`FIGURE 13 illustrates functions implemented in the processing means of the
`main board.
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`DETAILED DESCRIPTION
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`In the following description, numerous specific details are set forth such as
`specific network configurations, network devices, types of multimedia traffic, etc. to
`provide a thorough understanding of the present invention. However, it will be
`obvious to those skilled in the art that the present invention may be practiced without
`such specific details. In other instances, well-known circuits have been shown in
`block diagram form in order not to obscure the present invention in unnecessary
`detail. For the most part, details concerning timing considerations and the like have
`been omitted in as much as such details are not necessary to obtain a complete
`understanding of the present invention and are within the skills of persons of ordinary
`skill in the relevant art.
`Refer now to the drawings wherein depicted elements are not necessarily
`shown to scale and wherein like or similar elements are designated by the same
`reference numeral through the several views.
`FIGURE 1 illustrates an information processing system configured in
`accordance with the present invention. FIGURE 1 essentially illustrates a local area
`network ("LAN"), which in one configuration could be implemented with an Ethernet
`protocol. However, the present invention is not limited to use with any particular data
`transfer protocol. Workstation PC 106, network hub 103 and server l 04 coupled to
`each other illustrate a typical LAN configuration where data is communicated
`between the workstation 106 and the server 104. Naturally, other workstations and
`servers could also be coupled to the LAN through hub 103, including the use of
`additional hubs. Hub 103 may be a 10 Base T or 10/100 Base T Ethernet hub. In an
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`alternative embodiment, the hub 103 and server 104 may be implemented in the same
`data processing system. Herein, the term "workstation" can refer to any network
`device that can either receive data from a network, transmit data to a network, or both.
`To add in the voice communication capabilities, an IP multimedia server 101
`is coupled to hub 103 and an IP telephony device 105 is connected between the
`workstation 106 and the hub 103. The IP multimedia server 101 is coupled to a
`central office ("CO") 102 so that telephony device 105 can communicate to other
`telecommunications networks, such as the public switched telephone network
`("PSTN"). Naturally, additional IP telephony device 105 can be coupled to hub 103,
`including having workstations coupled to hub 103 through such IP telephony devices.
`Further details on multimedia server 101 and IP telephony device 105 are described
`below. An IP telephone, or telephony device, is any apparatus, device, system, etc.,
`that can communicate multimedia traffic using IP telephony technology. IP telephony
`is defined within Newton's Telecom Dictionary, Harry Newton, Sixteenth Edition,
`page 454, which is hereby incorporated by reference herein.
`Information, or data, on the network includes both the voice and data
`information, and any other multimedia traffic. Traffic as a result of the data
`transmissions between workstation 106 and server 104 affects the bandwidth
`available for communications between telephony device 105 and multimedia
`server 101. However, as discussed above, because the multimedia traffic is real-time,
`it must be transferred with no or minimum latency. An embodiment of the present
`invention provides a protocol for ensuring that the multimedia data is transferred
`within a specified minimum or no latency by having the data information pass
`through the IP telephony device 105 as it is being transferred to/from workstation 106.
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`This configuration, as will be subsequently discussed in further detail, permits the IP
`telephony device 105 to throttle the data to/from workstation 106, effectively giving
`the IP telephony device 105 priority on the network.
`FIGURE 2 illustrates how the information processing system of the present
`invention as noted above with respect to FIGURE 1 can be implemented across a
`wide area network ("WAN") 201 where the multimedia server 101 of FIGURE 1 is
`coupled to another multimedia server 202 across LAN 201. Note that the other items
`described above in FIGURE 1 have been omitted in FIGURE 2 for the sake of
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`simplicity.
`FIGURE 3 illustrates further detail of a configuration of the present invention
`over a WAN 201. Note that such a WAN may implement the TCP/IP protocol, and
`could be a public WAN, such as the Internet, a private data network, an intranet, or a
`Virtual Private Network ("VPN").
`FIGURE 3 illustrates an exemplary system where WAN 201 couples an
`information processing system 301 in Dallas, Texas to another information processing
`system 302 in Detroit, Michigan, while also permitting a remote system 303 to couple
`to both systems 301 and 302 through WAN 201, such as from a telecommuter's home.
`System 301 is similar to the system described above with respect to
`FIGURE 1. System 301 is coupled to WAN 201 through router 304.
`System 302 is similar to system 301 with the exception that a data server is
`not implemented within system 302. Router 305 is similar to router 304, multimedia
`server 306 is similar to multimedia server 101, hub 307 is similar to hub 103, IP
`telephony device 308 is similar to IP telephony device 105, and workstation 309 is
`similar to workstation 106.
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`Remote system 303 is coupled to WAN 201 using a modem 310, such as an
`ADSL (asymmetric digital subscriber line) modem. A NAT (Network Address
`Translation) router/hub 311 then couples a workstation PC 312 and an IP telephony
`device 313 to the modem 310. Not only can data be transferred across WAN 201
`between systems 301-303, but also anyone oftelephonydevices 105,308 and 313
`can communicate with each other and with the PSTN (not shown) over CO lines
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`coupled to either of systems 301 and 302.
`FIGURE 4 illustrates further details of system 301. As noted above, system
`301 is coupled to WAN 201 through IP router 304, which is coupled by line 413 to
`Ethernet hub 103. Ethernet hub 103 is connected by line 414 to fast Ethernet
`telephony device 105, which is coupled by line 415 to workstation 106. Ethernet
`hub 103 is coupled to IP network card 402 by connection 416, which may be a 10/100
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`Base T connector.
`Multimedia server 101 is comprised of main board 401, network card 402,
`hard drive 403, backplane 404 and peripheral cards 405. network card 402 is further
`discussed below in more detail with respect to FIGURE 5. network card 402 is
`coupled by ribbon cable 409 to main board 401, which is further described below in
`more detail with respect to FIGURE 6. multimedia server 101 is powered through
`power pack 407. IDE (Integrated Drive Electronics) HDD (hard disk drive) 403 is
`coupled by ribbon cable 410 to network card 402 and main board 401, while network
`card 402 is coupled to backplane 404 through ribbon cable 411. Backplane 404
`provides capacity for several peripheral cards (P-cards) 405, which are of a typical
`configuration for enabling a telephone system to connect to a central office (CO), Tl
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`lines, analog central office trunks and analog telephones 406. Alternatively, ribbon
`cable 411 could be coupled to one of the peripheral cards 405 directly.
`Referring next to FIGURE 5, there is illustrated a block diagram of network
`card 402. Network card 402 is responsible for communicating with all IP telephones,
`remote telephones and remote sites via a 10/100 Base T connection. The higher-level
`communication protocol used may be a standard UDP/IP (User Datagram
`Protocol/Internet Protocol) protocol. In addition, network card 402 communicates
`with the main board 401 for overall system control. Network card 402 has effectively
`replaced individual electronic key telephone circuits with a single Ethernet interface,
`and network card 402 now acts as the central distribution point for all peripheral
`cards 405, which can plug into backplane 404.
`Ribbon cable 410 from hard drive 403 is received at I/0 501 coupled to bus
`502. Bus 502 is coupled to ECP (Enhanced Call Processing) microcontroller 503,
`DRAM 504, DSPs 505 and 506, DSP farm expansion connector 507, digital
`cross-point switch 509, and I/0 and buffers 512. ECP 503 is a microcontroller
`responsible for overall communications between network card 402 and main board
`401. ECP 503 directly interfaces the DSPs 505, 506 via the host port interface. The
`host port interface is a parallel (8 bit) interface between the DSPs and the host
`processor. This interface can be used to directly manipulate the DSP memory by a
`host processor. I/0 501 is a mailbox type parallel communication channel, which is
`multiplexed between communication with the IDE disk drive 403 and I/0
`501 allowing direct control for functions such as firmware download and message
`passing. ECP 503 is based on a 16-bit Hitachi H8 family processor with built-in flash
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`memory.
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`DSPs 505 and 506 can be implemented using Texas Instrument 5410 DSPs
`that perform packet encoding/decoding, jitter buffer management and UDP/IP
`protocol stacked functions. DSPs 505, 506 are connected to an external SRAM 511
`and ASIC (FPGA) 513 that performs a PCI bridge function between bus 508 and
`bus 514, which is coupled to connectors 517 and 416 via 10/100 MAC/PHY
`devices 515 and 516. DSPs 505,506 communicate with peripherals 405 via bus 502.
`DSP firmware is downloaded via the host port interface 501. I/O 501 allows
`communication with the main board 401 and the hard drive 403. Additionally, EPC
`503 can directly control a daughter card containing additional DSPs through
`expansion connector 507 for functions such as speech compression.
`Digital cross-point switch 509 is used to connect system voice conversations
`as needed between peripherals. Main board 401 houses the master cross-points with
`616 discussed below with respect to FIGURE 6. The peripheral cards 405 share a
`pool of 160 time slots. Cross-point switch 509 is primarily responsible for connecting
`the packet-switched voice connections of the IP telephones or remote systems to the
`circuit switchboard. The FPGA/PCI bridge 513 performs the functions required to
`connect the 10/100 Base T Ethernet MAC/PHY devices 515, 516. Since devices
`515,516 are designed to communicate via a standard PCI bus 514, the FPGA 513
`implements a minimal PCI bus implementation. In addition, the FPGA 513
`implements I/O latches and buffers as required.
`The 10/100 Base T devices 515,516 are stand-alone Ethernet devices, which
`perform the media access control ("MAC") and the PHY sical layer functions in a
`single, low-cost chip. Devices 515, 516 communicate to the host processor via a
`standard PCI bus 514, and communicate to the network via a pulse transformer
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`coupled RJ-45 connection 517,416. These devices contain FIFOs to minimize lost
`packets during traffic peaks. Per the PCI bus mastering specification, devices 515,
`516 take control of the DSP bus and DMA data directly to SRAM 511. Conversely,
`the DSP 505, 506 writes data to be sent into the SRAM 511 and the devices 515, 516
`DMA data via the PCI bus 514 to the network (LAN).
`Referring next to FIGURE 6, there is illustrated, in block diagram form, main
`board 401 for integrating call processing and voice processing using a single
`processing means, which in this example is one microprocessor 601.
`Microprocessor 601, which may be a Motorola 68000 class microprocessor,
`communicates with hard disk 607 using driver circuitry 602. Hard disk 607 stores
`program data, voice prompts, voice mail messages, and all other types of speech used
`within main board 401.
`Microprocessor 601 also includes watchdog timer 603 and real-time clock
`source 604.
`Microprocessor 601 is coupled via bus 608 to flash memory 605 and dynamic
`random access memory ("DRAM") 606. Flash memory 605 is used to store bootstrap
`data for use during power up of main board 401. DRAM 606 stores the program
`accessed by microprocessor 601 during operation of main board 401.
`Bus 608 also couples microprocessor 601 to signal processing circuitry, which
`in this example is digital signal processor ("DSP") 615. Digital signal processor 615
`implements a number of functions traditionally implemented by discrete analog
`components.
`Referring next to FIGURE 13, there are illustrated some of the primary
`functions implemented in DSP 615. DTMF receivers 1301 are implemented using
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`frequency domain filtering techniques. DTMF receivers 1301 detect all 16 standard
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`DTMF (touch-tone) digits.
`Automatic gain control ("AGC") 1302 is a closed-loop gain control system
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`which normalizes received audio levels during recording.
`Recording buffers 1303, which are coupled to AGC 1302, receive and store
`speech samples after they have passed through AGC block 1302. These speech
`samples are converted to µ-law PCM (Pulse Code Modulation) and double buffered
`(several samples per buffer). Microprocessor 601 copies the record data out ofDSP
`buffers 1303 into RAM buffers (not shown), which are located in the
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`microprocessor 601 data RAM area.
`Fax tone detector 1304 is implemented using frequency domain filtering
`techniques. Fax tone detector 1304 detects the standard 1100 Hz FAX CNG tone
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`(also referred to as the Calling Tone).
`Caller ID modems 1305 are 1200 baud FSK modems similar to Bell 202-type
`modems. Caller ID modems 1305 are implemented as a frequency discriminator
`where a time delayed (quadrature) signal is multiplied by the original signal, low pass
`filtered, then sliced, which produce the square wave caller ID data stream.
`Call processing tone generators 1307 are free running oscillators which
`generate the appropriate tones (and tone pairs) which make up the industry standard
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`call processing tones. These tones include:
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`dial tone
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`busy/reorder tone
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`ring back tone
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`single frequency ( 440 Hz) tone
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`DTMF dialer tones
`Play buffers 1308 replay data from hard disk 607 through microprocessor 601
`and place this play data in buffers 1308. This data is converted from an 8-bit µ-law
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`PCM signal to 14-bit linear data.
`Conference bridges 1306 allow multiple conference bridges to mix together
`conferees into a multi-party conference. These conferees may be a mixture of inside
`and outside parties. A combination of "loudest speaker" and "summing" is utilized.
`DSP 615 communicates with microprocessor 601 via a host interface port
`("HIP") via bus 608. The HIP link supports a command-based protocol, which is used
`to directly read or write DSP memory locations. DSP 615 is a RAM-based part and
`has its program downloaded from microprocessor 601. Once downloaded and
`running, microprocessor 601 (the host) polls for events or receives interrupts
`indicating that data is available. DSP 615 speech connections are made over an
`industry standard 32-time slot, 2.048 megabits per second (Mb/s) digital serial
`link 618. Link 618 occupies one of the digital highways implemented by digital
`cross-point matrix 616. Each service ofDSP 615 occupies a single time slot. For
`example, DTMF receiver 1 occupies time slot O while conference bridge circuit 12
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`occupies time slot 31.
`Digital cross-point matrix 616 is also coupled to bus 608 and operates to
`connect any voice path to any other voice path. Digital cross-point matrix 616 is a
`VLSI (Very Large Scale Integration) integrated circuit. An example of digital
`cross-point matrix 616 is manufactured by MITEL Semiconductor Corporation as part
`No. 8980. Digital cross-point matrix 616 communicates with microprocessor 601 via
`a memory mapped input/output (I/0) scheme. A command/control protocol is used
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`for communication between microprocessor 601 and digital cross-point matrix 616
`via bus 608. Cross-point matrix 616 is coupled by highway 618 to DSP 615.
`Cross-point matrix 616 is coupled to highway 617.
`Digital cross-point matrix 616 is capable of making 256 simultaneous fully
`non-blocking connections. However, it may be upgraded by adding additional DSPs
`and/or cross-point matrices.
`Gate array 612 is an SRAM (Static Random Access Memory) based device.
`An example of gate array 612 is manufactured by XILINX. Gate array 612 is
`responsible for generating all system timing. A master clock signal is provided by
`microprocessor 601 at 16.384 MHz. This clock signal is divided down to provide a
`number of phase coherent system clocks such as 4.096 MHz, 2.048 MHz and 8 KHz
`(frame sync). In addition, a 5-bit time slot counter is implemented which allows all
`the system CODECs to detect the appropriate time slot to use (0-31 ). An additional
`divider chain is included to divide the system clock down to 20 Hz, which is used by
`the ringing generator power supply (not shown).
`Gate array 612 is downloaded at boot-up by system software. Gate array 612
`is based on an SRAM architecture. That is, the internal fusible links commonly found
`in programmable logic are actually stored in volatile SRAM. Because of this
`architecture, gate array 612 is downloaded after power-up. Also, note the added
`flexibility of being able to modify the logic by simply loading new sy