`[19]
`[11] Patent Number:
`6,132,564
`
`Licata
`[45] Date of Patent:
`Oct. 17, 2000
`
`U3006132564A
`
`[54]
`
`lN-SITU PRE-METALLIZATION CLEAN AND
`METALLIZATION 0F SEMICONDUCTOR
`WAFERS
`
`.
`Inventor: Thomas J. Llcata, Mesa, Anz.
`
`[75]
`
`[73] Assignee: Tokyo Electron Limited. Tokyo, Japan
`
`[21] App]. No.: 08/971,512
`
`NOV- 173 1997
`
`Filed:
`C23C 14/34
`Int Cl 7
`I.
`.
`:
`‘.
`..................................................... ‘
`“'5‘ 0' 704,197”704,192,03/179549682331,912,137;
`Fi Id 1‘;
`' h..- ‘ ‘
`’ " ”7'043‘97 '153’1-97fl7
`e
`o i care
`......................... _
`1‘
`_.
`. ,
`_.
`,
`204119225, 192.3, 298.25, 192.32, 192.13,
`298.35, 298.05; 438.582; 216/37
`
`[22]
`[51]
`.
`[52]
`[58]
`.
`
`[56]
`
`Re. 34.106
`3,594,295
`4,250,009
`4,464,223
`4.585.517
`4,844,775
`4,8b.3,549
`4.925.542
`4.999.096
`
`$178,739
`5.401.350
`5,431,799
`5,449,432
`5,468,296
`5540300
`5,540,824
`5,5h0,77o
`5.569.363
`5347334
`5,755,888
`5,834,371
`
`References Cited
`U,S_ PATENT DOCUMENTS
`10.11992 Ohmi .
`.
`7.11971 Meckel et al.
`211981 Cuomo et al. .
`811984 (iorin.
`4/1986 Slemple .................................. 156/643
`7/1989 Keeble.
`9/1989 (irunwald.
`5/1990 Kidd .
`3/1991 Nihf-‘i el al--
`
`.
`
`.
`
`“1993 ”am“ 3‘ al- -
`3’1995 Patrick et al.
`.
`711995 Mosely et al.
`9/1995 llanawa .
`11.9995 Patrick ct al.
`7/1996 Oian .
`,
`7/1996 Yin et a],
`10mm!) Sugai ct nl..
`1011996 Bayer et al.
`511993 Miyamom -
`5/1998 'l'orii ct al.
`11.11998 Amccn ct al. .
`
`.
`
`2/
`
`2;?
`
`1181719
`
`(1536664
`til—190070
`08176823
`
`FOREIGN PATENT DOCUMENTS
`.
`lmropcan Fat. 011. .
`4/1993
`Japan.
`811980
`J‘
`'
`.
`71990
`W"
`I
`Primary Examiner—Maria Nuzzolillo
`Assistant Examiner—Julian A. Mercado
`Attorney, Agent, or 1"irm—Wood, llerron & Evans, L.L.1’.
`[57]
`ABSTRACT
`
`A method is provided of cleaning device surfaces for the
`mctalli7ation thereof by treating the surfaces in a chamber
`cquippcd for ionized physical vapor deposition or other
`plasma-based metal deposition process. The surfaces are
`plasma etched, preferably in a chamber in which the next
`metal layer is to be deposited onto the surfaces. Also or in
`the alternative, the surfaces are plasma etched with a plasma
`containing, ions of the metal to be deposited. Preferably also,
`the etching process is followed by depositing a film of the
`metal, preferably by ionized physical vapor deposition, in
`the chamber. The metal may, for example, be titanium that
`is sputtered from a target within the chamber. The process of
`depositing the metal, where the metal is titanium, may, for
`example, be followed by the deposition of a titanium nitride
`layer. The process steps may be used topassivate the
`swims 10‘ "“1151“ 01 the substrate wmammg the (19?“
`surtaces through an oxygen or water vapor containing
`atmosphere or through another atmosphere containing
`potential contaminants such as through the transfer chamber
`of a cluster tool
`to which are connected CVD or other
`
`chemical processing modules. In the preferred embodiment,
`etching is achieved by maintaining a high ion fraction and
`high bombardment energy, for example, by applying a high
`negative bias to the substrate, operating the plasma in a net
`etching mode, then, by lowering the bombardment energy,
`for example by lowering the bias voltage, or by lowering the
`ion fraction, such as by increasing sputtering power, or
`decreasing plasma power, chamber pressure, a net deposi-
`tion of the meta] by [PVD is brought about.
`
`22 Claims, 2 Drawing Sheets
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`III/III]!ItIllllIll/lIII/ll/I/I/I/l/lll/tfl/IllI’ll/11111Ill/C
`
`Page 1 of 11
`
`APPLIED MATERIALS EXHIBIT 1010
`
`
`
`US. Patent
`
`Oct. 17, 2000
`
`Sheet 1 of 2
`
`6,132,564
`
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`US. Patent
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`Oct. 17, 2000
`
`Sheet 2 on
`
`6,132,564
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`
`
`Page 3 ofll
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`
`
`6,132,564
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`1
`lN-Sl’l‘U PIKE-METALLIZATION CLEAN AND
`
`
`
`
`METALLIZATION OF SEMICONDUCTOR
`
`
`WAFERS
`
`
`
`
`
`
`
`
`
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`This invention relates to the cleaning of electrical device
`surfaces in preparation for the deposition of a metallization
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`layer and to the deposit of the initial film of the metallization
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`layer thereon.
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`BACKGROUND OF THE INVENTION
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`The manufacture of semiconductor devices and integrated
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`circuits involves the blanket and selective deposition and
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`removal of many layers of conductive, insulating and semi—
`conductive materials on substrates that are usually in the
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`form of silicon wafers. The manufacturing processes typi-
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`cally include the formation of a series of metal interconnect
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`film stacks on a wafer by a plurality of sequential processes
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`performed in a series of processing chambers of one or more
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`multi-process vacuum processing tools. Between the forma-
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`tion of the various stacks of the series, wafers are typically
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`removed from a vacuum processing tool and a photo-resist
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`pattern is applied thereto. The application of the pattern is
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`followed by reactive etching processes that are rendered
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`selective by the pattern. By these processes, troughs and/or
`holes through insulating layers on the underlying stack are
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`formed, exposing contact areas on underlying conductors
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`that are to be connected to the conductors of devices of
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`subsequently applied overlying layers. Before such layers
`are applied, the masking layer may be removed.
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`Following selective etching and, in the case of the first
`layer also following an ion implantation process,
`metal
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`patterned wafers are reintroduced into a processing tool
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`where a subsequent stack of conductive layers is applied.
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`The lowermost layer of the new stack to be applied is usually
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`a layer of a reactive elemental metal such as titanium,
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`chromium or tantalum, but may also be a metal nitride,
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`silicide or alloy. One function of this lowermost metal layer
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`is to form a bond or contact with an exposed conductive
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`layer, such as silicon or metal, at the bottom of a contact hole
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`in the underlying insulator. The bond serves to form the
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`initial film portion of a conductive path between the under—
`lying layer and the conductor of a new layer of the new
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`stack.
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`Before the metallization layer is applied, however, it is
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`usually necessary to clean from the wafer native oxides and
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`other contaminants that characteristically formed on the
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`contacts during prior processes or when the wafer was
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`transferred through atmosphere from tool to tool. Even if
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`such wafers were transferred under vacuum, the vacuum is
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`not perfect so contaminating layers of atoms and molecules
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`usually have formed on the surfaces of the contacts in
`proportion to the exposure duration. Such contaminating
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`layers would, if not removed, interfere with the application
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`of the metallization layer, usually resulting in degraded
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`conductivity between the contact and the metallization layer.
`The standard approach to dealing with the problem of
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`contaminants on a contact surface is to subject the wafer to
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`an inductively coupled plasma (ICP) soft sputter etch step
`immediately before initiating the metallization process.
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`Such a soft etch step is typically carried out by first trans-
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`ferring the wafer, after placement into a vacuum processing
`tool in which the new stack is to be applied, into a soft etch
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`chamber. In the soft etch chamber, a plasma is formed of an
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`inert gas, usually argon. Then the plasma ions are electri-
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`cally accelerated toward the wafer, usually by applying a
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`bias to the wafer. The contaminant materials removed from
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`10
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`15
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`30
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`U.)Ln
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`4O
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`45
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`50
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`55
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`()0
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`65
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`2
`the contacts by sputtering redistribute through the process
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`chamber or onto the walls of high aspect ratio features,
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`where they do not interfere with the subsequent electrical
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`contact. Such a soft sputter etch is additionally beneficial in
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`that it produces a uniform repeatable surface that facilitates
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`the manufacturable deposition of PVD and CVD films.
`The argon soft etch is not an ideal cleaning process since
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`it cleans only by physical removal of contaminants afforded
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`by sputtering. Such sputtering can damage the structure to be
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`cleaned or the underlying device structures, either due to the
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`mechanical sputtering action or through the accumulation of
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`charge. Further, the argon is chemically inert and thus does
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`not react with or chemically reduce the native oxides and
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`other contaminant materials that are to be cleaned from the
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`wafer surface.
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`Additions of reactive gases to the soft etch plasma have
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`aided in the removal of contaminants from the contacts
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`during soft etch cleaning, but have generally been found
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`undesirable in other ways, particularly since these gases tend
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`to migrate out of the process area and contaminate other
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`portions of the process tool. Further, reactive components
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`such as hydrogen can damage collateral device structures
`since hydrogen and other commonly used reactive compo-
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`nents readily diffuse through the wafer.
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`In addition, freshly soft etched surfaces can be recontami-
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`nated in a processing tool by gases such as water vapor and
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`oxygen from normal outgassing and from gases originating
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`from CVD process modules. Further, the need for separate
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`etch and deposition modules adds to the product cost and to
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`the size of the processing equipment.
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`Accordingly, there is a need for a more effective and less
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`costly process for preventing oxides and other contaminants
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`from interfering with the metallization of surfaces at which
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`contacts on the lowermost layer of a stack or other inter—
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`connects are to be formed, for example, on intra-stack layers
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`that are otherwise prone to oxidation or contamination with
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`water vapor or other material prior to the metallization of the
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`such surfaces.
`
`
`SUMMARY OF THE INVENTION
`
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`Aprimary objective of the present invention is to provide
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`a method of cleaning the surface of a semiconductor wafer
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`prior to the metallization thereof that overcomes the disad-
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`vantages of process sequences of the prior art that employ
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`soft sputter or hard etch processes, or that have avoided
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`etch-based precleaning that would otherwise be beneficial. A
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`more particular objective of the present
`invention is to
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`provide an improved method of cleaning contacts of semi—
`conductor wafers for metallization. A still further objective
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`of the present invention is to improve the efficiency and
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`reduce the cost of semiconductor wafer processing.
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`According to principles of the present invention, cleaning
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`of contacts and other surfaces for metallization is carried out
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`in situ, that is, in the same chamber used for metal deposi—
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`tions in the following metallization process, without remov-
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`ing the wafer from the chamber between the cleaning and
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`coating processes and preferably without venting the cham-
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`ber to atmosphere. The cleaning is carried out by a soft
`sputter etch with ions of an inert gas such as argon.
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`Preferably, the cleaning is carried out by the use of a plasma
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`that includes ions of the material to be deposited in the
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`metallization process.
`According to further principles of the present invention,
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`the cleaning of the contacts or other surfaces for metalliza-
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`tion is carried out using a plasma formed in part at least by
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`the same material that is to be used for metallization of the
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`Page 4 ofll
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`Page 4 of 11
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`6,132,564
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`3
`contacts, preferably with the cleaning and metallization
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`being carried out in the same chamber, which is preferably
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`an ionized physical vapor deposition (IPVD) chamber in
`which metallization is carried out by IPVD.
`
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`the
`According to further principles of the invention,
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`cleaning of a substrate, particularly contacts or other sur-
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`faces thereon that are to be metallized, is carried out and then
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`those surfaces are capped by deposition of a layer of
`metallization material. For example, the contacts are soft
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`sputter etched with argon ions or argon and titanium ions
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`followed immediately by the deposition of titanium, such as
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`by IPVD, which may also be followed by a deposition of
`TiN, before the substrate is subjected to exposure to a
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`potentially contaminating environment, such as the atmo-
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`sphere of a transfer chamber of a CVD module, an external
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`ambient atmosphere or such other atmosphere from which
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`contamination could result.
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`Preferably, the surface of the substrate is first bombarded
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`with ionized metal at an energy level that results in a net
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`etching of the surface of the substrate, particularly the
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`contacts or other surfaces to be metallized. Then, a film of
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`the same metal is preferably deposited by an ionized physi-
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`cal vapor deposition (IPVD) process, following reduction of
`the energy level of the ions so that there is a net buildup of
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`the material on the surface.
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`In accordance with one preferred embodiment of the
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`invention,
`the surface to be cleaned for metallization is
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`bombarded with titanium ions in an IPVD chamber.
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`Preferably, the titanium is produced by the sputtering of a
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`titanium target with an argon plasma, and the titanium
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`particles that are ejected from the target surface are then
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`ionized by passing the sputtered titanium particles through a
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`dense inductively coupled plasma (ICP) or electron cyclo-
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`tron resonance (ECR) plasma, for example. While these
`methods of generating the material
`ionizing plasma are
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`preferred, helicon, hollow cathode and a number of other
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`methods of generating a plasma may also be employed. The
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`ionized titanium atoms and other ionized sputtered titanium
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`particles are then accelerated toward the substrate by elec-
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`trically biasing the substrate to a negative potential.
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`In the preferred method of the invention, the particles are
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`initially directed toward the substrate with a relatively high
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`ion fraction and relatively high bombardment energy so that
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`a net etching effect is achieved on the substrate surface. This
`etching removes native oxides, water and other contami-
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`nants that may have accumulated on the substrate prior to or
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`during transport into the IPVD chamber. Preferably follow-
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`ing etching with titanium ions, the energy of the titanium
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`ions is reduced, such as by reducing the biasing voltage, so
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`that a net deposition of a titanium film is produced on the
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`surface of the substrate. Alternately, the Ti ion fraction can
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`be reduced by other means including decreasing the ICP
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`power or Ar pressure or by increasing the metal sputter
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`cathode power. In effect, an ionized PVD of the titanium is
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`used to carry out a combination of a precleaning of the wafer
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`and the deposition of the first metal film.
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`In accordance with the preferred embodiment of the
`invention, the high energy titanium metal atoms simulta-
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`neously sputter clean and react with the surface contami-
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`nants. The process takes advantage of the fact
`the
`that
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`titanium, unlike neutral argon, reacts with and chemically
`reduces the oxides and as a film has a high solubility for the
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`oxygen. Further, the titanium atoms, which have a higher
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`atomic mass than atoms of argon, are particularly effective
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`for cleaning contacts at the bottoms of high aspect ratio
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`holes since they are scattered less by gas phase collisions
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`10
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`15
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`U.)Ln
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`40
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`45
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`50
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`55
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`60
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`65
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`4
`and therefor remain more closely aligned normal to the
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`surface of the wafer.
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`Alternatively, certain advantages of the invention can be
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`realized by controlling the bias voltage on the wafer or using
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`other techniques to direct the ions of the metal to the wafer
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`in such a way that the cleaning with the metal and coating
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`with the metal overlap or occur simultaneously. For
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`example, by reducing or eliminating the change in biasing
`voltage and rather using a voltage that balances the cleaning
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`and coating rates appropriate to the asperity of the feature to
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`be cleaned, elfective cleaning and coating with titanium or
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`titanium nitride can be achieved, However, sequentially
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`cleaning and then coating in the manner described above
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`effectively produces the advantages of the invention for
`most applications and is preferred for simplicity.
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`Preferably, the invention is carried out according to an
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`IPVD method and apparatus as disclosed in one or more of
`copending U.S. patent application Ser. Nos. 08/837,551,
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`08/844,756 and 08/844,757 filed Apr. 21, 1997 and U.S.
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`patent application Ser. No. 08/861,958 filed May 22, 1997,
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`all hereby expressly incorporated by reference herein. The
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`IPVD chamber may use a metal, such as titanium, titanium
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`nitride, tantalum or another metal or compound compatible
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`with the substrate and intended overlying materials, for both
`cleaning of the substrate and for the initial coating of the
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`substrate. The IPVD chamber is preferably provided as one
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`processing module of a cluster tool and arranged to connect
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`to the transfer module of the tool, to which is also connected
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`a processing module, such as a CVD module,
`for the
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`application of a metallization layer such as tungsten, alumi-
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`num or copper.
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`is resistant to
`A titanium nitride film, once deposited,
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`reaction with oxygen or water vapor, and is generally more
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`stable than the contacts which have been only soft etch
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`cleaned with an argon plasma. In addition, a titanium film
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`has a large capacity to buffer disadvantageous effects on
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`exposure to such substances. As a result, wafers can be
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`transferred from the tool through the transfer module of a
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`CVD apparatus with less likelihood of undergoing further
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`contamination. The transfer modules of CVD reactors often
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`contain levels of contaminants from the CVD processing
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`chambers to which they are attached. Contaminants often
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`found in such transfer chambers include, for example, TiCl4,
`NH3, N133, H2, and MOCVD precursors such as tetrakis
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`di-methyl amino titanium (TDMAT). IPVD diffusion barri-
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`ers such as TiN can, for example, resist contamination by
`such substances when the wafers are being transferred
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`through the transfer chamber of the CVD too].
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`With the combined Ti—ion cleaning and initial Ti film
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`deposition followed by TiN deposition performed in the
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`same chamber, the invention is therefore useful for intra-
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`stack as well as inter—stack applications. For example, trans—
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`fer of a Ti-ion cleaned and coated wafer, according to the
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`present invention, can be elfectively transferred through the
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`transfer chamber of a cluster tool and into a CVD module for
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`the deposition of tungsten with less likelihood of undergoing
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`contamination in the transfer chamber than would an argon
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`soft etch cleaned wafer.
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`Similarly, IPVD cleaned and deposited metal nitrides or
`other metals such as a tantalum can be similarly used with
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`the present invention, For example, a Ta-ion cleaning and
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`IPVD Ta and TaN deposition can be performed on a wafer
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`in an IPVD module of a processing tool prior to the transfer
`of the wafer through the tool transfer chamber to a CVD
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`module of the tool for the deposition of copper.
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`With the present invention, not only is a superior cleaning
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`and contamination preventing process provided, but both the
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`Page 5 ofll
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`Page 5 of 11
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`6,132,564
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`5
`cleaning and initial metal film deposition processes are
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`carried out in an IPVD module, while the requirement for a
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`soft etch module is eliminated. As a result, processing
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`efficiency is increased, equipment cost
`is reduced, and
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`equipment footprint is also reduced. Alternately, the vacant
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`process station can be filled with another processing module
`to increase throughput or deposit a film stack having an
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`additional component.
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`These and other objects and advantages of the present
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`invention will be more readily apparent from the following
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`detailed description of the preferred embodiments of the
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`invention.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`FIG. 1 is a cross-sectional diagram of an electrical contact
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`in a typical condition prior to cleaning.
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`FIG. 1A is a diagram, similar to FIG. 1, of the contact
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`following cleaning.
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`FIG. 1B is a diagram, similar to FIGS. 1, and 1A, of the
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`cleaned electrical contact following coating.
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`FIG. 1C is a diagram, similar to FIG. 1A, of the contact
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`following cleaning with plasma that includes ions of a metal
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`such as titanium.
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`FIG. 2 is an elevational diagrammatic representation of an
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`IPVD sputtering apparatus and precleaning module for use
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`according to one embodiment of the present invention.
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`FIG. 3 is a plan view of a semiconductor wafer processing
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`cluster tool according to one embodiment of the present
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`invention.
`
`DETAILED DESCRIPTION OF THE
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`PREFERRED EMBODIMENT
`
`FIG. 1 is a simplified cross-sectional diagram through a
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`stack on a semiconductor wafer 3 showing a hole 4 through
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`an insulating layer 5 thereon exposing a conductor 6 at the
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`bottom of hole 4 which is to form an interconnect with an
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`overlying conductor that is yet to be applied. Following the
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`formation of the hole 4, the wafer 3 would have typically
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`been transferred, either through atmosphere or through a
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`transfer module containing contaminating gases, to a pro—
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`cessing module such as the module 10 (FIG. 2). During the
`transfer a contaminating layer 7 would have been typically
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`formed, which layer 7 must be removed before an acceptable
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`interconnect with an overlying layer can be applied.
`FIG. 1A illustrates the same hole 4 through the insulating
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`layer 5 of the wafer 3 following removal of the contami—
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`nating layer 7 during a cleaning process to expose the
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`underlying conductor 6 for interconnection with a conductor
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`of a new stack. FIG. 1B illustrates a cleaned contact 6 at the
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`bottom of the hole 4 through the insulating layer 5 of the
`wafer 3, following application of a subsequent coating layer
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`8. This coating layer may be a layer of a metal such as
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`titanium or may be a titanium nitride (TiN) layer, which is
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`commonly applied immediately over a titanium metal layer.
`Such a coating layer is typically used as a barrier layer prior
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`to the application of a subsequent metal
`layer such as
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`tungsten in a subsequent process which will serve as a
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`conductor of the upper stack which makes the interconnec-
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`tion with the conductor 6 to form a contact in the hole 4.
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`FIG. 2 diagrammatically illustrates a precleaning module
`10 according to principles of the present invention. The
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`module 10 is an Ionized Physical Vapor Deposition (IPVD)
`apparatus such as that illustrated and described, for example,
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`in US. patent application Ser. No. 08/844,756, filed on Apr.
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`21, 1997, which is expressly incorporated by reference
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`Page 6 ofll
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`6
`herein. The module 10 includes a vacuum tight processing
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`space 11 enclosed in a chamber 12. Mounted in the chamber
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`12 at one end thereof is a wafer support or susceptor 14 for
`supporting a semiconductor wafer 15 mounted thereon. The
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`wafer 15, when mounted on the support 14, is parallel to and
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`faces a target 16. The target 16 is formed of a sputter coating
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`material, for example, titanium metal. The processing space
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`11 is a generally cylindrical space that is maintained at an
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`ultra high vacuum pressure level and is filled with a pro—
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`cessing gas, such as argon, during processing, and may
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`include some other gas such as nitrogen. The space 11 lies
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`in the chamber 12 between the support 14 and the target 16.
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`The target 16 is part of a cathode assembly 17 mounted in
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`the chamber 12 at an end thereof opposite the substrate
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`holder 14. The cathode assembly 17 includes a target holder
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`18 to which the target 16 is secured. A magnet structure 19
`is typically provided behind the target holder 18 on the
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`opposite side thereof from the support 14. A dark space
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`shield (not shown) may also be provided around the periph-
`ery of the target 16. The magnet structure 19 preferably
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`includes magnets that produce a closed magnetic tunnel over
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`surface 21 of the target 16 that traps electrons given off into
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`the chamber 12 by the cathode assembly 17 when it is
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`electrically energized to a negative potential as is familiar to
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`one skilled in the art. The magnet pack 19 may include fixed
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`or rotating or otherwise moving magnets, which may be
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`permanent or electromagnets, of any one of a number of
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`magnetron sputtering assemblies known in the art, but is
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`preferably that described and illustrated in US. Pat. No.
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`5,130,005, expressly incorporated by reference herein. The
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`magnetic tunnel produced by the magnet pack 19 traps and
`shapes a plasma 23 which sweeps over the surface 21 of the
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`target 16 as the magnet pack 19 rotates.
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`Apower supply or source 20 of electrical energy, prefer—
`ably a source of DC power, which may be switched on to
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`remain constant or may be pulsed, is connected between the
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`cathode assembly 17 and the wall of the chamber 12, which
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`is usually grounded and serves as the system anode. The
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`cathode assembly 17 is insulated from the wall of the
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`chamber 12. The power supply 20 is preferably connected to
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`the cathode assembly 17 through an RF filter 22. A bias
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`power supply or generator 27 is provided and connected to
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`the substrate holder 14 through a matching network 28. The
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`bias power supply 27 applies a bias voltage to a wafer 15
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`mounted on the holder 14.
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`Power from the power supply 20 produces a negative
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`potential on the target 16. The negative potential accelerates
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`positive ions from the plasma 23 toward surface 21 of the
`target 16 which, upon impact, cause electrons to be emitted
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`from surface 21 of the target 16. These electrons become
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`trapped over the surface 21 of the target 16 by the magnetic
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`field generated by the magnet pack 19, until, eventually, the
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`electrons strike and thereby ionize atoms of process gas in
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`close proximity to the surface 21 of the target 16, forming
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`plasma 23 adjacent
`to the target surface 21. This main
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`plasma 23 becomes a source of positive ions of gas that are
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`accelerated toward and against the negatively charged sur-
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`face 21, where they eject particles of coating material from
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`the target 16.
`The space 11 between the target surface 21 and the
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`substrate support 14 can be considered as formed of two
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`parts. One part is that primarily occupied by the plasma 23,
`which is shaped to produce a desired erosion pattern on the
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`sputtering surface 21 of the target 16, while the second part
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