Trials@uspto.gov
`571-272-7822
`
`
`
`
`
`Paper 20
`Entered: August 3, 2020
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________
`_____________
`
`FLEX LOGIX TECHNOLOGIES, INC.,
`Petitioner,
`
`v.
`
`VENKAT KONDA,
`Patent Owner.
`____________
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`____________
`_____________
`
`
`Before SALLY C. MEDLEY, THOMAS L. GIANNETTI, and
`JO-ANNE M. KOKOSKI, Administrative Patent Judges.
`
`GIANNETTI, Administrative Patent Judge.
`
`DECISION
`Denying Institution of Inter Partes Review
`35 U.S.C. § 314
`
`
`571-272-7822
`
`
`
`
`
`Paper 20
`Entered: August 3, 2020
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________
`_____________
`
`FLEX LOGIX TECHNOLOGIES, INC.,
`Petitioner,
`
`v.
`
`VENKAT KONDA,
`Patent Owner.
`____________
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`____________
`_____________
`
`
`Before SALLY C. MEDLEY, THOMAS L. GIANNETTI, and
`JO-ANNE M. KOKOSKI, Administrative Patent Judges.
`
`GIANNETTI, Administrative Patent Judge.
`
`DECISION
`Denying Institution of Inter Partes Review
`35 U.S.C. § 314
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`I. INTRODUCTION
`
`A. Background
`
`
`
`Flex Logic Technologies, Inc. (“Petitioner”) filed a Petition requesting
`
`inter partes review of claims 1, 15–18, 20–22, 32, and 47 (the “challenged
`
`claims”) of U.S. Patent No. 8,269,523 B2 (Ex. 1001, the “’523 patent”).
`
`Paper 1 (“Pet.”). Patent Owner Venkat Konda filed a Preliminary Response.
`
`Paper 6 (“Prelim. Resp.”). With our authorization, Petitioner filed a reply
`
`addressing certain issues raised in the Preliminary Response. Paper 10
`
`(“Reply”). Also with our authorization, Patent Owner filed a Sur-reply.
`
`Paper 14 (“Sur-reply”).
`
`The standard for institution is set forth in 35 U.S.C. § 314, which
`
`provides that an inter partes review may not be instituted unless the
`
`information presented in the Petition and the Preliminary Response shows
`
`that “there is a reasonable likelihood that the petitioner would prevail with
`
`respect to at least 1 of the claims challenged in the petition.” 35 U.S.C.
`
`§ 314; see also 37 C.F.R § 42.4(a) (“The Board institutes the trial on behalf
`
`of the Director.”).
`
`For the reasons that follow, we exercise our discretion under 35
`
`U.S.C. § 325(d) and deny the Petition to institute inter partes review of the
`
`challenged claims of the ’523 patent.
`
`A. Related Proceedings
`
`Petitioner identifies the following district court proceeding involving
`
`the ’523 patent: Konda Technologies Inc. v. Flex Logix Technologies, Inc.,
`
`No. 5:18-cv-07581 (N.D. Cal.). Pet. 2.
`
`2
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`In addition, the ’523 patent is challenged by the Petitioner in two
`
`other inter partes reviews: IPR2020-00260 and IPR2020-00261. Pet. 3–4.
`
`Also, two post grant review proceedings brought by the Petitioner
`
`challenging a related patent (U.S. Patent No. 10,003,553) are pending:
`
`PGR2019-00037, and PGR2019-00042. Id. at 3. A third petition for post
`
`grant review of that related patent (PGR2019-00040) was denied. Id.
`
`Patent Owner identifies also a pending application to reissue the ’523
`
`patent: U.S. Patent Application No. 16/202,067, filed November 27, 2018.
`
`Paper 4, 2.
`
`B. Real Parties-in-Interest
`
`Petitioner identifies Flex Logix Technologies, Inc. as the real party-in-
`
`interest. Pet. 2. Patent Owner identifies himself, Venkat Konda, as the real
`
`party-in-interest. Paper 4, 2.
`
`C. The ’523 Patent
`
`
`
`The ’523 patent is titled “VLSI Layouts of Fully Connected
`
`Generalized Networks.” Ex. 1001, (54). According to the patent, multi-
`
`stage interconnection networks are widely useful in telecommunications,
`
`parallel and distributed computing. Id. at 2:25–27. However VLSI (Very
`
`Large Scale Integration) layouts, known in the prior art, of these
`
`interconnection networks in an integrated circuit are inefficient and
`
`complicated. Id. at 2:28–30.
`
`
`
`The most commonly-used VLSI layout in an integrated circuit is
`
`based on a two-dimensional grid model comprising only horizontal and
`
`vertical tracks. Id. at 2:40–42. The ’523 patent describes VLSI layouts of
`
`generalized multi-stage networks for broadcast, unicast, and multicast
`
`3
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`connections using only horizontal and vertical links. Id. at 3:21–24. The
`
`VLSI layouts employ shuffle exchange links, where outlet links of cross
`
`links from switches in a stage in one sub-integrated circuit block are
`
`connected to inlet links of switches in the succeeding stage in another sub-
`
`integrated circuit block. Id. at 3:24–28. The cross links are either vertical
`
`links or horizontal, and vice versa. Id. at 3:28–29.
`
`
`
`In one embodiment the sub-integrated circuit blocks are arranged in a
`
`hypercube arrangement in a two-dimensional plane. Id. at 3:29–31. The
`
`VLSI layouts exploit the benefits of significantly lower cross points, lower
`
`signal latency, lower power, and full connectivity with significantly fast
`
`compilation. Id. at 3:31–34.
`
`D. Illustrative Claims
`
`Claims 1, 15–18, 20–22, 32, and 47 are challenged in the Petition.
`
`See supra. Claim 1 is the only independent claim. Claim 1 recites:
`
`1. An integrated circuit device comprising a plurality of
`
`sub-integrated circuit blocks and a routing network, and
`
`
`Said each plurality of sub-integrated circuit blocks
`comprising a plurality of inlet links and a plurality of outlet links;
`and
`
`Said routing network comprising of a plurality of stages y,
`
`in each said sub-integrated circuit block, starting from the lowest
`stage of 1 to the highest stage of y, where y≧1; and
`
`Said routing network comprising a plurality of switches of
`
`size d×d, where d≧2, in each said stage and each said switch of
`size d×d having d inlet links and d outlet links; and
`
`Said plurality of outlet links of said each sub-integrated
`
`circuit block are directly connected to said inlet links of said
`
`4
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`switches of its corresponding said lowest stage of 1, and said
`plurality of inlet links of said each sub-integrated circuit block
`are directly connected from said outlet links of said switches of
`its corresponding said lowest stage of 1; and
`
`Said each sub-integrated circuit block comprising a
`
`plurality of forward connecting links connecting from switches
`in a lower stage to switches in its immediate succeeding higher
`stage, and also comprising a plurality of backward connecting
`links connecting from switches in a higher stage to switches in
`its immediate preceding lower stage; and
`
`Said each sub-integrated circuit block comprising a
`
`plurality straight links in said forward connecting links from
`switches in said each lower stage to switches in its immediate
`succeeding higher stage and a plurality cross links in said
`forward connecting links from switches in said each lower stage
`to switches in its immediate succeeding higher stage, and further
`comprising a plurality of straight links in said backward
`connecting links from switches in said each higher stage to
`switches in its immediate preceding lower stage and a plurality
`of cross links in said backward connecting links from switches
`in said each higher stage to switches in its immediate preceding
`lower stage,
`
`said plurality of sub-integrated circuit blocks arranged in
`
`a two-dimensional grid of rows and columns, and
`
`said all straight links are connecting from switches in each
`
`said sub-integrated circuit block are connecting to switches in the
`same said sub-integrated circuit block; and said all cross links are
`connecting as either vertical or horizontal links between switches
`in two different said sub-integrated circuit blocks which are
`either placed vertically above or below, or placed horizontally to
`the left or to the right,
`
`each said plurality of sub-integrated circuit blocks
`
`comprising same number of said stages and said switches in each
`
`5
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`said stage, regardless of the size of said two-dimensional grid so
`that each said plurality of sub-integrated circuit block with its
`corresponding said stages and said switches in each stage is
`replicable in both vertical direction or horizontal direction of said
`two-dimensional grid.
`
`Ex. 1001, 35:23–36:13.
`
`
`E. References and Other Evidence
`
`The Petition relies on one reference: U.S. Patent No 6,940,308, issued
`
`September 6, 2005 (Ex. 1008, “Wong”). Pet. 5.
`
`
`
`In addition, Petitioner submits the Declaration of Jacob Baker, Ph.D.,
`
`P.E. (Ex. 1002, “Baker Decl.”).
`
`F. Asserted Grounds of Unpatentability
`
`Petitioner asserts the challenged claims are unpatentable on the
`
`following grounds.
`
`Claims Challenged
`
`1, 20, 21, 22
`15–18, 32, 47
`
`Pet. 5.
`
`Statutory
`Basis1
`35 U.S.C. § 102 Wong
`35 U.S.C. § 103 Wong
`
`References
`
`II. PATENT OWNER’S REQUEST FOR DENIAL OF THE PETITION
`UNDER 35 U.S.C. § 325(D)
`
`A. Background
`
`Patent Owner asks the Board to deny the Petition under 35 U.S.C.
`
`§ 325(d) because “the same prior art or arguments were previously
`
`considered by the Office.” Prelim. Resp. 40. Specifically, Patent Owner
`
`
`1 Because the application from which the ’523 patent issued was filed before
`March 16, 2013, citations to 35 U.S.C. §§ 102 and 103 are to their pre-AIA
`versions. Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112-29.
`
`6
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`asserts that the prior art relied on by Petitioner, namely, Wong, “was
`
`previously considered and distinguished during prosecution of the
`
`application for the ‘523 Patent.” Id. Patent Owner relies on the Board’s
`
`precedential decision in Becton, Dickinson and Co. v. B. Braun Melsungen
`
`AG, IPR2017-01586, Paper 8 (PTAB Dec. 15, 2017). Id. at 41.
`
`Petitioner acknowledges that “the Examiner cited Wong for claim
`
`rejections during prosecution of the ’275 application that ultimately issued
`
`as the ’523 patent.” Pet. 105. Nevertheless, Petitioner contends “the manner
`
`in which Petitioner relies on Wong has minimal or no overlap with the
`
`arguments made during examination of the ’275 application. That is because
`
`. . . the Examiner simply erred in allowing the application after the applicant
`
`added limitations via amendment.” Id. Specifically, Petitioner claims “the
`
`Examiner apparently did not recognize the relevance of portions of the Wong
`
`reference with respect to the limitations that the applicant added.” Id. at
`
`105–106. Petitioner adds: “[T]he present Petition is supported by expert
`
`testimony that was not before the Examiner.” Id. at 106 (citing Baker
`
`Decl.).
`
`B. Analysis
`
`Section 325(d) of 35 U.S.C. provides that the Director may elect not
`
`to institute a proceeding if the challenge to the patent is based on matters
`
`previously presented to the Office. Advanced Bionics, LLC v. Med-El
`
`Elektromedizinische Geräte GmbH, IPR2019-01469, Paper 6 at 7 (PTAB
`
`Feb. 13, 2020) (precedential)2. In an analysis under § 325(d), the starting
`
`
`2 The Board institutes trial on behalf of the Director. 37 C.F.R. § 42.4(a);
`Advanced Bionics, Paper 6 at 7 n.7.
`
`7
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`point is the two-part framework set forth in Advanced Bionics:
`
`(1) determining whether the same or substantially the same art previously
`
`was presented to the Office or whether the same or substantially the same
`
`arguments previously were presented to the Office; and (2) if either
`
`condition of the first part of the framework is satisfied, determining whether
`
`the petitioner has demonstrated that the Office erred in a manner material to
`
`the patentability of challenged claims. Id. at 8.
`
`We must also consider the non-exclusive factors as set forth in
`
`Becton, Dickinson, which “provide useful insight into how to apply the
`
`framework” under § 325(d). Advanced Bionics, Paper 6 at 9. Those non-
`
`exclusive factors include:
`
`(a) the similarities and material differences between the asserted
`art and the prior art involved during examination;
`
`(b) the cumulative nature of the asserted art and the prior art
`evaluated during examination;
`
`(c) the extent to which the asserted art was evaluated during
`examination, including whether the prior art was the basis for
`rejection;
`
`(d) the extent of the overlap between the arguments made
`during examination and the manner in which Petitioner relies
`on the prior art or Patent Owner distinguishes the prior art;
`
`(e) whether Petitioner has pointed out sufficiently how the
`Examiner erred in its evaluation of the asserted prior art; and
`
`(f) the extent to which additional evidence and facts presented
`in the Petition warrant reconsideration of the prior art or
`arguments.
`
`Becton, Dickinson, Paper 8 at 17–18. “If, after review of factors (a), (b), and
`
`(d), it is determined that the same or substantially the same art or arguments
`
`previously were presented to the Office, then factors (c), (e), and (f) relate to
`
`8
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`whether the petitioner has demonstrated a material error by the Office.”
`
`Advanced Bionics, Paper 6 at 10.
`
`
`
`As discussed supra, there is no dispute that Wong was previously
`
`presented to the Office. Pet. 105. Thus, the first criterion of the Advanced
`
`Bionics framework (same art or arguments) is met. Advanced Bionics, Paper
`
`6 at 7–8 (“Previously presented art includes art made of record by the
`
`Examiner.”).
`
`
`
`The second inquiry in the Advanced Bionics framework asks whether
`
`the petitioner has demonstrated that the Office erred in a manner material to
`
`the patentability of challenged claims. Advanced Bionics, Paper 6 at 8–9.
`
`Becton, Dickinson asks us also to consider the extent to which the asserted
`
`art was evaluated during examination, as well as the extent of the overlap
`
`between the arguments made during examination and the manner in which
`
`Petitioner relies on the prior art or Patent Owner distinguishes the prior art.
`
`Becton, Dickinson, Paper 8 at 17–18 (factors (c) and (d), supra).
`
`
`
`Patent Owner points out that “all the claims 1– 49 were rejected by
`
`the Examiner during the prosecution of the application for the ’523 Patent
`
`either as being anticipated or obvious over Wong.” Prelim. Resp. 42. Thus,
`
`according to Patent Owner, “Wong was fully considered and distinguished
`
`during the prosecution of the application for the ’523 Patent.” Id.
`
`
`
`We agree (and Petitioner does not dispute) that during prosecution of
`
`the ’523 patent, Wong was applied by the Examiner as a basis for a rejection
`
`that was overcome by the Patent Owner. Pet. 105. Becton, Dickinson factor
`
`(c), therefore, favors denial of the Petition.
`
`9
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`
`However, Petitioner argues that “[t]he manner in which Petitioner
`
`relies on Wong has minimal or no overlap” with the arguments made during
`
`examination. Id. (see Becton, Dickinson factor (d)). Also, Petitioner argues
`
`that “the Examiner simply erred in allowing the application after the
`
`applicant added limitations via amendment.” Id. (see Becton, Dickinson
`
`factor (e)).
`
`
`
`We have considered these arguments and find them unpersuasive.
`
`The alleged “error” by the Examiner, as well as the assertion of “minimal or
`
`no overlap,” both relate to a recitation in the claims requiring that “all of the
`
`straight links on the network connect switches within the same sub-
`
`integrated circuit block.” Pet. 67, 105–106. Petitioner contends this
`
`limitation (identified by Petitioner as limitation 1(j)) is shown in Wong’s
`
`Figures 13A and 13B. Id. at 67–76. Petitioner acknowledges that during
`
`prosecution, Patent Owner argued that Wong does not disclose this feature,
`
`but argues that its characterization of Wong was “incorrect.” Id. at 76.
`
`More specifically, Petitioner “disagrees with the applicant’s grouping of the
`
`plurality of rows of switches in figure 13A together to form a single ‘sub-
`
`integrated circuit block,’ as such a grouping is inconsistent with how a
`
`[person of ordinary skill] would have understood ‘sub-integrated circuit
`
`block’ in view of the disclosure of the ’523 patent.” Id. at 78.
`
`
`
`Petitioner makes similar arguments of error by the Examiner
`
`regarding the recitation in the claims (identified as limitation 1(k)) that each
`
`of the sub-integrated circuit blocks has the same configuration and is
`
`“replicable.” Id. at 79–86, 105–106. Petitioner contends that Patent Owner
`
`“misrepresented” Wong:
`
`10
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`
`Petitioner anticipates that PO may argue that the sub-integrated
`circuit blocks of Wong are not replicable in the vertical (row)
`dimension of the two dimensional grid, similar to PO’s argument
`during prosecution that in Wong “[i]t is clear as the network is
`scaled up, only columns are increasing.” But PO misrepresented
`the disclosure of Wong during prosecution, as Wong explicitly
`discloses that scaling up of the network can result in increased
`numbers of both columns and rows (i.e., both vertical and
`horizontal scaling.)
`
`Id. at 84 (emphasis added) (citation omitted).
`
`
`
`We do not consider these to be a sufficient showing of “a material
`
`error by the Office” under Advanced Bionics. Petitioner’s arguments
`
`amount to a disagreement with Patent Owner over the application of Wong
`
`to these features of the claims. Nothing about Wong was concealed from the
`
`Examiner. The Examiner considered Wong, as well as Patent Owner’s
`
`arguments, and ultimately made a determination that the claims were
`
`patentable. Ex. 1004, 57, 92. As cautioned by Advanced Bionics, “[i]f
`
`reasonable minds can disagree regarding the purported treatment of the art or
`
`arguments, it cannot be said that the Office erred in a manner material to
`
`patentability.” Advanced Bionics, Paper 6 at 9. Advanced Bionics goes on
`
`to explain the rationale for this rule: “At bottom, this framework reflects a
`
`commitment to defer to previous Office evaluations of the evidence of
`
`record unless material error is shown.” Id. Having considered the record
`
`presented to the Examiner in light of Petitioner’s arguments, we are not
`
`persuaded of material Examiner error.
`
`
`
`The applicant’s arguments to the Examiner that Wong lacks the
`
`disclosure of a “sub-integrated circuit block” or that it is “replicable” are not
`
`unreasonable and were considered by the Examiner, who ultimately allowed
`
`11
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`the ’523 patent to issue. Ex. 1004, 94. We are not persuaded that in
`
`allowing the ’523 patent, the Examiner misapprehended or overlooked the
`
`teachings of Wong. Advanced Bionics, Paper 6 at 8, n.9.
`
`
`
`In summary, we determine that applying the two-part framework of
`
`Advanced Bionics and considering Becton, Dickinson factors (a) through (f),
`
`we are persuaded to deny the Petition under 35 U.S.C § 325(d).
`
`III. CONCLUSION
`
`We deny the Petition and do not institute trial as to any challenged
`
`claims on grounds stated in the Petition.
`
`IV. ORDER
`
`Upon consideration of the record before us, it is:
`
`ORDERED that inter partes review of claims 1, 15–18, 20–22, 32,
`
`and 47 of the ’523 patent is denied and no trial is instituted.
`
`
`
`
`
`
`
`
`
`
`
`12
`
`
`
`IPR2020-00262
`Patent 8,269,523 B2
`
`
`PETITIONER:
`
`Naveen Modi
`Joseph E. Palys
`Paul M. Anderson
`Arvind Jairam
`PAUL HASTINGS LLP
`naveenmodi@paulhastings.com
`josephpalys@paulhastings.com
`paulanderson@paulhastings.com
`arvindjairam@paulhastings.com
`
`
`PATENT OWNER:
`
`Venkat Konda
`VENKAT KONDA
`Venkat@kondatech.com
`
`
`
`13
`
`
Accessing this document will incur an additional charge of $.
After purchase, you can access this document again without charge.
Accept $ Charge
Still Working On It
This document is taking longer than usual to download. This can happen if we need to contact the court directly to obtain the document and their servers are running slowly.
Give it another minute or two to complete, and then try the refresh button.
A few More Minutes ... Still Working
It can take up to 5 minutes for us to download a document if the court servers are running slowly.
Thank you for your continued patience.
This document could not be displayed.
We could not find this document within its docket. Please go back to the docket page and check the link. If that does not work, go back to the docket and refresh it to pull the newest information.
Your account does not support viewing this document.
You need a Paid Account to view this document. Click here to change your account type.
Your account does not support viewing this document.
Set your membership
status to view this document.
With a Docket Alarm membership, you'll
get a whole lot more, including:
- Up-to-date information for this case.
- Email alerts whenever there is an update.
- Full text search for other cases.
- Get email alerts whenever a new case matches your search.
One Moment Please
The filing “” is large (MB) and is being downloaded.
Please refresh this page in a few minutes to see if the filing has been downloaded. The filing will also be emailed to you when the download completes.
Your document is on its way!
If you do not receive the document in five minutes, contact support at support@docketalarm.com.
Sealed Document
We are unable to display this document, it may be under a court ordered seal.
If you have proper credentials to access the file, you may proceed directly to the court's system using your government issued username and password.
Access Government Site
