throbber
Trials@uspto.gov
`571-272-7822
`
`
`
`
`
`Paper 22
`Entered: August 3, 2020
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_____________
`
`FLEX LOGIX TECHNOLOGIES, INC.,
`Petitioner,
`
`v.
`
`VENKAT KONDA,
`Patent Owner.
`____________
`
`
`IPR2020-00261
`Patent 8,269,523 B2
`____________
`
`
`
`
`Before SALLY C. MEDLEY, THOMAS L. GIANNETTI, and
`JO-ANNE M. KOKOSKI, Administrative Patent Judges.
`
`KOKOSKI, Administrative Patent Judge.
`
`DECISION
`Granting Institution of Inter Partes Review
`35 U.S.C. § 314
`
`
`
`

`

`IPR2020-00261
`Patent 8,269,523 B2
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`
`
`I. INTRODUCTION
`
`Flex Logic Technologies, Inc., (“Petitioner”) filed a Petition to
`
`institute an inter partes review of claims 2–7 and 11 (the “challenged
`
`claims”) of U.S. Patent No. 8,269,523 B2 (“the ’523 patent,” Ex. 1001).
`
`Paper 1 (“Pet.”). Patent Owner Venkat Konda filed a Preliminary Response.
`
`Paper 9 (“Prelim. Resp.”). With Board authorization, Petitioner filed a reply
`
`addressing certain issues raised in the Preliminary Response (“Reply,” Paper
`
`13), and Patent Owner filed a Sur-reply (“Sur-Reply,” Paper 16). At the
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`Board’s direction (Paper 12), Petitioner filed a Notice explaining its reasons
`
`for filing multiple petitions challenging the claims of the ’523 patent.
`
`Paper 15 (“Notice”). Patent Owner filed a Reply to Petitioner’s Notice.
`
`Paper 18 (“Notice Reply”).
`
`Institution of an inter partes review is authorized by statute when “the
`
`information presented in the petition . . . and any response . . . shows that
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`there is a reasonable likelihood that the petitioner would prevail with respect
`
`to at least 1 of the claims challenged in the petition.” 35 U.S.C. § 314
`
`(2018); see 37 C.F.R. § 42.4 (2019). Upon consideration of the Petition, the
`
`Preliminary Response, the Reply, the Sur-Reply, the Notice, the Notice
`
`Reply, and the evidence of record, we determine that Petitioner has
`
`established a reasonable likelihood of prevailing with respect to the
`
`unpatentability of at least 1 claim of the ’523 patent. Accordingly, for the
`
`reasons that follow, we institute an inter partes review of claims 2–7 and 11
`
`of the ’523 patent.
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`
`
`
`
`2
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`

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`IPR2020-00261
`Patent 8,269,523 B2
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`A. Related Proceedings
`
`Petitioner identifies the following district court proceeding involving
`
`the ’523 patent: Konda Technologies Inc. v. Flex Logix Technologies, Inc.,
`
`No. 5:18-cv-07581 (N.D. Cal.). Pet. 2.
`
`The ’523 patent is the subject of two other inter partes review
`
`proceedings filed by Petitioner: IPR2020-00260 (“260 IPR”) and IPR2020-
`
`00262 (“262 IPR”). Prelim. Resp. 1, n.1. Also, two post grant proceedings
`
`brought by the Petitioner challenging a related patent are pending:
`
`PGR2019-00037, and PGR2019-00042. Pet. 2. A third petition for post
`
`grant review of that related patent (PGR2019-00040) was denied. Id.
`
`Patent Owner additionally identifies a pending application to reissue
`
`the ’523 patent: U.S. Patent Application No. 16/202,067, filed November 27,
`
`2018 (“the ’067 reissue application”). Paper 6, 2.
`
`B. Real Parties-in-Interest
`
`Petitioner identifies Flex Logix Technologies, Inc., as the real party-
`
`in-interest. Pet. 1. Patent Owner identifies himself, Venkat Konda, as the
`
`real party-in-interest. Paper 6, 1.
`
`C. The ’523 Patent
`
`
`
`The ’523 patent is titled “VLSI Layouts of Fully Connected
`
`Generalized Networks.” Ex. 1001, code (54). The most commonly used
`
`VLSI (Very Large Scale Integration) layout in an integrated circuit is based
`
`on a two-dimensional grid model comprising only horizontal and vertical
`
`tracks. Id. at 2:40–42. The ’523 patent describes VLSI layouts of
`
`generalized multi-stage networks for broadcast, unicast, and multicast
`
`connections using only horizontal and vertical links. Id. at 3:21–24. The
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`3
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`IPR2020-00261
`Patent 8,269,523 B2
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`VLSI layouts employ shuffle exchange links, where outlet links of cross
`
`links from switches in a stage in one sub-integrated circuit block are
`
`connected to inlet links of switches in the succeeding stage in another sub-
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`integrated circuit block. Id. at 3:24–28. The cross links are either vertical
`
`links or horizontal, and vice versa. Id. at 3:28–29.
`
`
`
`In one embodiment, the sub-integrated circuit blocks are arranged in a
`
`hypercube arrangement in a two-dimensional plane. Id. at 3:29–31. The
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`VLSI layouts exploit the benefits of significantly lower cross points, lower
`
`signal latency, lower power, and full connectivity with significantly fast
`
`compilation. Id. at 3:31–34.
`
`D. Illustrative Claims
`
`Petitioner challenges dependent claims 2–7 and 11 of the ’523 patent.
`
`Pet. 1, 4. Claim 2 directly depends from claim 1, which is the only
`
`independent claim in the ’523 patent. Claims 1 and 2 are reproduced below.
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`1. An integrated circuit device comprising a plurality of
`
`sub-integrated circuit blocks and a routing network, and
`Said each plurality of sub-integrated circuit blocks comprising a
`plurality of inlet links and a plurality of outlet links; and
`
`Said routing network comprising of a plurality of stages y,
`
`in each said sub-integrated circuit block, starting from the lowest
`stage of 1 to the highest stage of y, where y≧1; and
`
`Said routing network comprising a plurality of switches of
`
`size d×d, where d≧2, in each said stage and each said switch of
`size d×d having d inlet links and d outlet links; and
`
`Said plurality of outlet links of said each sub-integrated
`
`circuit block are directly connected to said inlet links of said
`switches of its corresponding said lowest stage of 1, and said
`plurality of inlet links of said each sub-integrated circuit block
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`4
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`IPR2020-00261
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`are directly connected from said outlet links of said switches of
`its corresponding said lowest stage of 1; and
`
`Said each sub-integrated circuit block comprising a
`
`plurality of forward connecting links connecting from switches
`in a lower stage to switches in its immediate succeeding higher
`stage, and also comprising a plurality of backward connecting
`links connecting from switches in a higher stage to switches in
`its immediate preceding lower stage; and
`
`Said each sub-integrated circuit block comprising a
`
`plurality straight links in said forward connecting links from
`switches in said each lower stage to switches in its immediate
`succeeding higher stage and a plurality cross links in said
`forward connecting links from switches in said each lower stage
`to switches in its immediate succeeding higher stage, and further
`comprising a plurality of straight links in said backward
`connecting links from switches in said each higher stage to
`switches in its immediate preceding lower stage and a plurality
`of cross links in said backward connecting links from switches
`in said each higher stage to switches in its immediate preceding
`lower stage,
`
`said plurality of sub-integrated circuit blocks arranged in
`
`a two-dimensional grid of rows and columns, and
`
`said all straight links are connecting from switches in each
`
`said sub-integrated circuit block are connecting to switches in the
`same said sub-integrated circuit block; and said all cross links are
`connecting as either vertical or horizontal links between switches
`in two different said sub-integrated circuit blocks which are
`either placed vertically above or below, or placed horizontally to
`the left or to the right,
`
`
`each said plurality of sub-integrated circuit blocks
`comprising same number of said stages and said switches in each
`said stage, regardless of the size of said two-dimensional grid so
`that each said plurality of sub-integrated circuit block with its
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`5
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`IPR2020-00261
`Patent 8,269,523 B2
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`
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`corresponding said stages and said switches in each stage is
`replicable in both vertical direction or horizontal direction of said
`two-dimensional grid.
`
`2. The integrated circuit device of claim 1,
`
`said two dimensional grid of said sub-integrated circuit
`
`blocks with their corresponding said stages and said switches in
`each stage is scalable by any power of 2, and
`
`
`for each multiplication of 2 of the size total said sub-
`integrated circuit blocks, by adding one more stage of switches
`and the layout is placed in hypercube format and also the cross
`links between said one more stage of switches are connected in
`hypercube format.
`
`
`Ex. 1001, 35:23–36:23.
`
`E. The Asserted Grounds of Unpatentability
`
`Petitioner asserts the challenged claims are unpatentable on the
`
`following grounds.
`
`Claims Challenged Statutory Basis
`
`2–7
`
`11
`
`35 U.S.C. § 102
`
`35 U.S.C. § 103
`
`References
`Published PCT Application
`No. WO 2008/109756
`(“the ’756 PCT,” Ex. 1009)
`The ’756 PCT and U.S. Patent
`No. 6,940,308 B2 (“Wong,”
`Ex. 1008)
`
`Pet. 4. Petitioner relies on the Declaration of Jacob Baker, Ph.D., P.E. (“the
`
`Baker Declaration,” Ex. 1002) in support of its contentions.
`
`A. Level of Ordinary Skill in the Art
`
`II. ANALYSIS
`
`Petitioner contends that a person having ordinary skill in the art
`
`(“POSITA”) “would have had a master’s degree in electrical engineering or
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`IPR2020-00261
`Patent 8,269,523 B2
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`a similar field, and at least two to three years of experience with integrated
`
`circuits and networks,” and that “[m]ore education can supplement practical
`
`experience and vice versa.” Pet. 24 (citing Ex. 1002 ¶¶ 18–19). Patent
`
`Owner agrees that a POSITA would have had a master’s degree in electrical
`
`engineering or a similar field, but argues that a POSITA would also have
`
`had “at least two to three years of experience with integrated circuits,
`
`interconnection networks and Field Programmable Gate Arrays.” Prelim.
`
`Resp. 8 (emphasis omitted). According to Patent Owner, “interconnection
`
`networks used in Field Programmable Gate Arrays (‘FPGAs’) is a separate
`
`field requiring VLSI layouts and multicast solutions,” and “some of the key
`
`requirements for the FPGA interconnects are not known in academia unless
`
`[a] POSITA has worked in the industry.” Id. at 8–9.
`
`We agree with the parties that a POSITA would have had a master’s
`
`degree in electrical engineering or a similar field, and experience in the field
`
`of integrated networks, which is consistent with the level of skill in the art at
`
`the time of the invention as reflected in the prior art in this proceeding. See
`
`Okajima v. Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (explaining that
`
`specific findings regarding ordinary skill level are not required “where the
`
`prior art itself reflects an appropriate level and a need for testimony is not
`
`shown” (quoting Litton Indus. Prods., Inc. v. Solid State Sys. Corp., 755
`
`F.2d 158, 168 (Fed. Cir. 1985))). Our determination regarding Petitioner’s
`
`challenge does not turn on the differences between Petitioner’s and Patent
`
`Owner’s definitions, and we note that our conclusion would be the same
`
`under either definition.
`
`We note that Patent Owner argues that Petitioner’s declarant,
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`7
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`IPR2020-00261
`Patent 8,269,523 B2
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`Dr. Baker, is not qualified to testify in this proceeding because he is neither
`
`a person of ordinary skill, nor an expert, in the relevant art. Prelim. Resp. 6–
`
`11; Notice Reply 5. There is no requirement, however, that the expert’s
`
`experience perfectly match the relevant field, or that that the expert is a
`
`person of ordinary skill in the art. The August 13, 2018, update to our Trial
`
`Practice Guide states:
`
`An expert witness must be qualified as an expert by
`knowledge, skill, experience, training, or education to testify in
`the form of an opinion. Fed. R. Evid. 702. There is, however, no
`requirement of a perfect match between the expert’s experience
`and the relevant field. SEB S.A. v. Montgomery Ward & Co., 594
`F.3d 1360, 1373 (Fed. Cir. 2010). A person may not need to be
`a person of ordinary skill in the art in order to testify as an expert
`under Rule 702, but rather must be “qualified in the pertinent
`art.” Sundance, Inc. v. DeMonte Fabricating Ltd., 550 F.3d 1356,
`1363–64 (Fed. Cir. 2008).
`
`See Notice of Update to Office Patent Trial Practice Guide, 83 Fed. Reg.
`
`156, (Aug. 13, 2018) (text of update available at
`
`https://www.uspto.gov/sites/default/files/documents/2018_Revised_Trial_Pr
`
`actice_Guide.pdf).
`
`Dr. Baker testifies as to his education and qualifications and provides
`
`his curriculum vitae. See Ex. 1002 ¶¶ 3–12; Ex. 1003. At this preliminary
`
`stage, we cannot say that Dr. Baker’s scientific, technical, and other
`
`specialized knowledge will not be helpful in understanding the evidence.
`
`See Fed. R. Evid. 702(a). On this record, we are not persuaded that
`
`Dr. Baker’s testimony should be disregarded.
`
`8
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`IPR2020-00261
`Patent 8,269,523 B2
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`B. Claim Construction
`
`We construe each claim “in accordance with the ordinary and
`
`customary meaning of such claim as understood by one of ordinary skill in
`
`the art and the prosecution history pertaining to the patent.” 37 C.F.R.
`
`§ 42.100(b). Under this standard, claim terms are generally given their plain
`
`and ordinary meaning as would have been understood by a person of
`
`ordinary skill in the art at the time of the invention and in the context of the
`
`entire patent disclosure. Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed.
`
`Cir. 2005) (en banc). Only those terms in controversy need to be construed,
`
`and only to the extent necessary to resolve the controversy. See Nidec
`
`Motor Corp. v. Zhongshan Broad Ocean Motor Co., 868 F.3d 1013, 1017
`
`(Fed. Cir. 2017) (quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200
`
`F.3d 795, 803 (Fed. Cir. 1999)).
`
`Petitioner “submits that for purposes of this proceeding no term
`
`requires construction.” Pet. 25 (citing Ex. 1002 ¶ 39). Patent Owner
`
`declines at this time to take a position regarding construction of the
`
`challenged claims. Prelim. Resp. 55. For purposes of this Decision, based
`
`on the record before us, we determine that none of the claim terms requires
`
`an explicit construction.
`
`C. Earliest Effective Filing Date of the ’523 Patent
`
`The ’523 patent issued from U.S. Patent Application Serial
`
`No. 12/601,275 (“the ’275 application”), which was filed on
`
`November 22, 2009 as the national phase entry of PCT Application
`
`No. PCT/US2008/064605 (“the ’605 PCT”), filed on May 22, 2008.
`
`Ex. 1001, code (21), (22); Ex. 1004, 150. The ’275 application claims
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`9
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`IPR2020-00261
`Patent 8,269,523 B2
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`priority to Provisional Application No. 60/940,394 (“the ’394 provisional”),
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`filed on May 25, 2007. Ex. 1001, code (60). Petitioner contends that
`
`“the ’523 patent is not entitled to claim priority to May 25, 2007 or to May
`
`22, 2008, because . . . the claims of the ’523 patent are not fully supported,
`
`and also are not enabled, by the ’394 provisional or the ‘605 PCT
`
`(collectively, ‘the priority applications’).” Pet. 5 (citing Ex. 1002 ¶¶ 40–67).
`
`Instead, Petitioner contends that the earliest effective filing date for the ’523
`
`patent is the November 22, 2009 filing date of the ’275 application. Id.
`
`Petitioner’s contentions are based on the limitation of claim 1
`
`requiring “said routing network comprising a plurality of stages y, in each
`
`said sub-integrated circuit block, starting from the lowest stage of 1 to the
`
`highest stage of y, where y≧1.” Pet. 7–8. Specifically, Petitioner argues
`
`that the ’394 provisional and the ’605 PCT (collectively, “the priority
`
`applications”) do not provide support for an integrated circuit device that
`
`includes a routing network comprising a plurality of stages y that also
`
`includes the other limitations of claim 1 (such as the recited pluralities of
`
`forward connecting links, backward connecting links, straight links, and
`
`cross links) when there is only one stage (y=1). Id. at 8; see generally id.
`
`at 6–21.
`
`“It is elementary patent law that a patent application is entitled to the
`
`benefit of the filing date of an earlier filed application only if the disclosure
`
`of the earlier application provides support for the claims of the later
`
`application, as required by 35 U.S.C. § 112.” PowerOasis, Inc. v. T-Mobile
`
`USA, Inc., 522 F.3d 1299, 1306 (Fed. Cir. 2008) (citations omitted); see also
`
`Research Corps. Techs. v. Microsoft Corp., 627 F.3d 859, 871–72 (Fed. Cir.
`
`10
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`IPR2020-00261
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`2010) (holding the later-filed application, with claims that were not limited
`
`to a “blue noise mask,” was not entitled to the priority filing date of the
`
`parent application, which was “limited to a blue noise mask”); ICU Med.,
`
`Inc. v. Alaris Med. Sys., 558 F.3d 1368, 1377–78 (Fed. Cir. 2009) (holding
`
`that “spikeless” claims “added years later during prosecution” were not
`
`supported by the specification which “describe[d] only medical valves with
`
`spikes”); Tronzo v. Biomet, Inc., 156 F.3d 1154, 1158–60 (Fed. Cir. 1998)
`
`(holding the generic shaped cup claims of the later-filed child application
`
`were not entitled to the filing date of the parent application that “disclosed
`
`only a trapezoidal cup and nothing more”). “To satisfy the written
`
`description requirement the disclosure of the prior application must convey
`
`with reasonable clarity to those skilled in the art that, as of the filing date
`
`sought, [the inventor] was in possession of the invention.” PowerOasis, 522
`
`F.3d at 1306 (citations omitted). The sufficiency of written description
`
`support is based on “an objective inquiry into the four corners of the
`
`specification from the perspective of a person of ordinary skill in the art.”
`
`Ariad Pharm., Inc. v. Eli Lilly & Co., 598 F.3d 1336, 1351 (Fed. Cir. 2010)
`
`(en banc).
`
`Petitioner has the burden to persuade us that the ’756 PCT is prior art.
`
`We make our decision on institution based on whether the information
`
`presented in the Petition and the Preliminary Response “shows that there is a
`
`reasonable likelihood that the petitioner would prevail with respect to at
`
`least 1 of the claims challenged in the petition.” 35 U.S.C. § 314(a). “In an
`
`inter partes review, the burden of persuasion is on the petitioner to prove
`
`‘unpatentability by a preponderance of the evidence,’ . . . and that burden
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`never shifts to the patentee.” Dynamic Drinkware, LLC v. Nat’l Graphics,
`
`Inc., 800 F.3d 1375, 1378 (Fed. Cir. 2015) (quoting 35 U.S.C. § 316(e)).
`
`The burden of production can shift to the patent owner, however. See id.
`
`at 1379. This shift happens where it is “warranted because the patentee
`
`affirmatively seeks to establish a proposition not relied on by the patent
`
`challenger and not a necessary predicate for the unpatentability claim
`
`asserted—effectively an affirmative defense.” In re Magnum Oil Tools Int’l,
`
`Ltd., 829 F.3d 1364, 1376 (Fed. Cir. 2016). Here, Petitioner asserts that the
`
`’756 PCT (either alone or in combination with Wong) discloses each
`
`limitation of claims 2–7 and 11, and the ’394 provisional and the ’605 PCT
`
`do not provide written description support for those same claims, each of
`
`which either directly or indirectly depends from claim 1. Thus, Petitioner
`
`has the burden of persuasion, based on all of the evidence, on both of these
`
`assertions. See Dynamic Drinkware, 800 F.3d at 1378.
`
`Petitioner argues that the priority applications do not disclose any sub-
`
`integrated circuit blocks that have only one stage and pluralities of forward
`
`and backward connecting links as required by claim 1. Pet. 14–15 (citing
`
`Ex. 1002 ¶ 56). Petitioner recognizes that the priority applications illustrate
`
`a network with one stage in Figures 2A1–2A3, but argues that the only links
`
`shown therein are inlet and outlet links. Id. at 9–10 (citing Ex. 1007, 7:19–
`
`21, Figs. 2A1–2A3; Ex. 1026, 4:13–15, Figs. 2A1–2A3; Ex. 1002 ¶ 50)
`
`(emphasis omitted). Relying on Dr. Baker’s testimony, Petitioner argues
`
`that a POSITA would have recognized that these inlet and outlet links are
`
`different than “forward connecting links” and “backward connecting links,”
`
`at least because claim 1 “recites ‘inlet links’ and ‘outlet links’ separately
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`from ‘forward connecting links’ and ‘backward connecting links.’” Id.
`
`at 10–11 (citing Ex. 1001, 35:25–27, 35:43–49; Ex. 1002 ¶ 51). Petitioner
`
`further argues that a POSITA would have understood that there cannot be a
`
`plurality of forward connecting links that connect switches in a lower stage
`
`to switches in its immediate preceding stage, or a plurality of backward
`
`connecting links that connect switches in a higher stage to switches in the
`
`immediate preceding lower stage, when there is only one stage in the
`
`network. Id. at 11 (citing Ex. 1002 ¶ 52).
`
`Upon review of the disclosures of the priority applications, and based
`
`on the preliminary record, we agree with Petitioner’s position that the
`
`priority applications do not provide sufficient written description support for
`
`the claims. More specifically, the priority applications do not reasonably
`
`convey to a POSITA that the inventor was in possession of the claimed
`
`routing network comprising a plurality of stages y when y=1 that also meets
`
`the additional limitations of claim 1.
`
`Figure 2A3 of the priority applications is reproduced below.
`
`Figure 2A3 depicts the VLSI layout of an example network described in the
`
`provisional applications, with Block 1_2 comprising switch 1. Ex. 1007,
`
`
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`26:26–28; Ex. 1026, 22:23–25. Switch 1 consists of input switches IL1 and
`
`IL2, and output switches OL1 and OL2. Ex. 1007, 26:28–29; Ex. 1026,
`
`22:25–26. The priority applications state that Figure 2A3 illustrates all of
`
`the connection links. Ex. 1007, 7:19–21; Ex. 1026, 4:13–15. Dr. Baker
`
`testifies that the only links shown in Figure 2A3 are the inlet and outlet
`
`links, and a POSITA “would have recognized that [there] are no forward
`
`connecting links and no backward connecting links that connect switches in
`
`higher and lower stages to each other.” Ex. 1002 ¶ 51 (emphasis omitted).
`
`Dr. Baker further testifies that a POSITA
`
`would have understood that there cannot be “a plurality of
`forward connecting links connecting from switches in a lower
`stage to switches in its immediate succeeding higher stage” if
`there is only one stage in the network. If there is only one stage,
`there is no “immediate succeeding higher stage.” Similarly, if
`there is only one stage, a person of ordinary skill in the art would
`have understood that there cannot be “a plurality of backward
`connecting links connecting from switches in a higher stage to
`switches in its immediate preceding lower stage.” If there is only
`one stage, there is no “immediate preceding lower stage.”
`
`Ex. 1002 ¶ 52 (emphases added).
`
`Patent Owner agrees that “FIG. 2A3 illustrates the 2D-layout for a
`
`multistage network for N=2 wherein there is only one block . . . comprising
`
`stage 1.” Prelim. Resp. 19; see also id. at 33 (“[I]t is clear to a POSITA that
`
`there is only one stage in the 2D-layout of a multi-stage network disclosed in
`
`the ’523 Patent when there is only one block in the network with N=2 as
`
`illustrated in FIG. 2A3.”). Patent Owner contends that a POSITA would
`
`have understood that “there is only one stage when there is only one block.”
`
`Id. at 22. Patent Owner’s arguments, as we understand them, are directed to
`
`the disclosure of a network with only one stage (y=1). Id. at 15–39. Patent
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`Owner does not address the other limitations of claim 1, and does not point
`
`to any disclosures in the priority applications that describe a sub-integrated
`
`circuit block with only one stage that also comprises pluralities of forward
`
`connecting links and backward connecting links as required by claim 1.
`
`On the present record, we agree with Petitioner’s postition that the
`
`“said routing network comprising a plurality of stages y, in each said sub-
`
`integrated circuit block, starting from the lowest stage of 1 to the highest
`
`stage of y, where y≧1” limitation of claim 1 lacks written description
`
`support in the priority applications when y=1. Accordingly, we determine
`
`that Petitioner has established a reasonable likelihood that it would prevail in
`
`showing that the challenged claims in the ’523 patent are not entitled to the
`
`benefit of the May 25, 2007 filing date of the ’394 provisional, or the May
`
`22, 2008 filing date of the ’605 PCT.
`
`D. Anticipation by the ’756 PCT
`
`Petitioner contends that the subject matter of claims 2–7 of the ’523
`
`patent is unpatentable under 35 U.S.C. § 102(b) as anticipated by the ’756
`
`PCT. Pet. 27–82. Petitioner relies on the Baker Declaration in support of its
`
`contentions. Id.
`
`The ’756 PCT was published on September 12, 2008. Ex. 1009,
`
`code (43). Petitioner’s challenge largely relies on the disclosure of the ’394
`
`provisional, which is incorporated by reference in its entirety into the ’756
`
`PCT. Pet. 20–21; Ex. 1009, 3:14–17. Petitioner argues that the ’394
`
`provisional became publicly available as of the date the ’756 PCT was
`
`published. Pet. 22. We agree. 37 C.F.R. § 1.14(a)(1)(vi) provides, in
`
`relevant part, that if an unpublished application is incorporated by reference
`
`15
`
`

`

`IPR2020-00261
`Patent 8,269,523 B2
`
`
`in an international publication of an international application (such as
`
`the ’756 PCT), a copy of “the unpublished pending application may be
`
`provided to any person, upon written request and payment of the appropriate
`
`fee.” Accordingly, once the ’756 PCT published, the ’394 provisional that is
`
`incorporated by reference therein became open to the public for inspection.
`
`The ’394 provisional therefore is prior art by virtue of the fact that it became
`
`publicly available due to its incorporation into the ’756 PCT, and in addition
`
`is prior art because it is part of the ’756 PCT itself. For purposes of this
`
`Decision, we treat the disclosure of the ’394 provisional as prior art entitled
`
`to an effective date of September 12, 2008, when the ’756 PCT published.1
`
`Petitioner asserts, with supporting testimony from Dr. Baker, that
`
`the ’756 PCT, by way of its incorporation of the ’394 provisional, discloses
`
`all of the elements of claim 2, and of independent claim 1 from which it
`
`depends. Pet. 27–73.2 For example, Petitioner contends that the ’394
`
`provisional discloses “said routing network comprising a plurality of stages
`
`y, in each said sub-integrated circuit block, starting from the lowest stage of
`
`1 to the highest stage of y, where y≧1” as recited in claim 1 because “it
`
`discloses a network with a number of stages (y) equal to five, and 5 ≥1.”
`
`
`1 Patent Owner contends that, because 37 C.F.R. § 1.14(a)(1)(vi) also
`provides that “[t]he Office will not provide access to the paper file of a
`pending application, except as provided in paragraph (c) or (i) of this
`section,” the ’394 provisional was not available to the public when the ’756
`PCT published. Prelim. Resp. 40–44. This sentence, however, is directed to
`the entire file history of the unpublished application. It does not preclude
`access to the application alone.
`
`2 Claim 1 is not challenged in the Petition, but is discussed therein because
`the challenged claims ultimately depend from claim 1. Pet. 1, n.1.
`
`16
`
`

`

`IPR2020-00261
`Patent 8,269,523 B2
`
`
`Pet. 36 (citing Ex. 1002 ¶ 92). Petitioner uses an annotated version of
`
`Figure 1B of the ’394 provisional, shown below, to depict its contentions.
`
`
`
`Figure 1B is a diagram of a symmetrical folded multi-link routing network,
`
`with Petitioner’s annotations highlighting the five stages in the top-most
`
`sub-integrated circuit block. Id. (citing Ex. 1026, 2:12–14; Ex. 1002 ¶ 92).
`
`Petitioner further contends that the ’756 PCT, by way of its
`
`incorporation by reference of the ’394 provisional, discloses an integrated
`
`circuit device where the stages and switches in each stage of the two-
`
`dimensional grid of the sub-integrated circuit block are scalable by any
`
`power of two, and with each multiplication by two, one more stage of
`
`switches is added and the cross links between the one more stage of switches
`
`are connected in hypercube format, as required by claim 2. Pet. 69–73
`
`(citing Ex. 1002 ¶¶ 137–140). Petitioner contends that “[a] POSITA would
`
`have understood that the ’394 provisional application’s disclosure of the
`
`possible extension of the network of figure 1C ‘for any arbitrarily large’
`
`network . . . discloses the scalability of the network by any power of two.”
`
`Id. at 70 (citing Ex. 1026, 20:14; Ex. 1002 ¶ 138). Therefore, according to
`
`Petitioner, “the ’394 provisional application discloses that the network can
`
`be expanded by any power of two by adding additional stages and switches
`
`17
`
`

`

`IPR2020-00261
`Patent 8,269,523 B2
`
`
`to each of the sub-integrated circuit block, where the layout of the blocks
`
`continues in a two-dimensional grid.” Id. at 72 (citing Ex. 1026, 20:20–28,
`
`Figs. 1C, 1H; Ex. 1002 ¶ 140).
`
`Although Patent Owner generally states that “for each proposed
`
`ground, at least one claim element is missing from the references” (Prelim.
`
`Resp. 2), Patent Owner does not present arguments in the Preliminary
`
`Response addressing the specific merits of Petitioner’s contentions. See
`
`generally Prelim. Resp. Having reviewed all of Petitioner’s assertions
`
`regarding claims 1 and 2, as well as the supporting evidence, we determine
`
`on this record that Petitioner has established a reasonable likelihood of
`
`establishing that claim 2 is anticipated by the ’756 PCT by way of its
`
`incorporation of the ’394 provisional. Pet. 27–73. We have also reviewed
`
`Petitioner’s arguments and evidence with respect to claims 3–7, which
`
`depend, directly or indirectly, from claim 2. Id. at 73–82. Based on the
`
`record before us, we also find Petitioner’s arguments and evidence are
`
`sufficient to show a reasonable likelihood that Petitioner would prevail in
`
`proving the unpatentability of claim 3–7.
`
`E. Obviousness over the ’756 PCT and Wong
`
`Petitioner contends that the subject matter of claim 11 of the ’523
`
`patent would have been obvious over the combined teachings of the ’756
`
`PCT and Wong. Pet. 83–90. Petitioner relies on the Baker Declaration in
`
`support of its contentions. Id.
`
`At this stage of the proceeding, Patent Owner does not offer any
`
`arguments with respect to the portions of the cited references that
`
`purportedly teach the limitations of claim 11. See generally Prelim. Resp.
`
`18
`
`

`

`IPR2020-00261
`Patent 8,269,523 B2
`
`
`Patent Owner argues that Petitioner “failed to address known evidence of
`
`secondary considerations regarding” claim 11. Prelim. Resp. 50. Patent
`
`Owner argues that “[t]he Board has repeatedly ‘cautioned Petitioners in prior
`
`proceedings that petitions may be denied if they do not address known
`
`evidence of secondary considerations.’” Id. (citing Stryker Corp. v. KFx
`
`Medical, LLC, IPR2019-00817, Paper 10 (PTAB Sept. 16, 2019)). These
`
`prior proceedings are distinguishable, however, because in each case,
`
`evidence of objective indicia of non-obvious was considered in a prior
`
`proceeding of which Petitioner was aware. See, e.g., Stryker, IPR2019-
`
`00817, Paper 10 (finding that Petitioner’s failure to address objective indicia
`
`evidence from a previous litigation weighs in favor of denying institution);
`
`Robert Bosch Tool Corp. v. SD3 LLC, IPR2016-01751, Paper 15 (PTAB
`
`Mar. 22, 2017) (denying institution for failure to address objective indicia
`
`presented during an ITC proceedings); Coalition for Affordable Drugs V
`
`LLC v. Hoffman-LaRoche, Inc., IPR2015-01792, Paper 14 (PTAB Mar. 11,
`
`2016) (denying institution for failure to address objective indicia considered
`
`by the Examiner during the original prosecution). Moreover, although
`
`Patent Owner argues that Petitioner is “well aware of the objective evidence
`
`of non-obviousness,” Patent Owner does not provide evidence that
`
`demonstrates Petitioner had such knowledge. Prelim. Resp. 50.
`
` To the extent that Patent Owner is arguing that objective indicia
`
`supports the non-obviousness of the claims of the ’523 patent, however, we
`
`note that the issue of objective indicia of non-obviousness is highly fact-
`
`specific. At th

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