`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`ADVANCED MICRO DEVICES, INC.
`Petitioner
`
`v.
`
`AQUILA INNOVATIONS, INC.
`Patent Owner
`
`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`
`PETITIONER ADVANCED MICRO DEVICES, INC.’S
`UPDATED EXHIBIT LIST
`
`Mail Stop “PATENT BOARD”
`Patent Trial and Appeal Board
`U.S. Patent & Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`
`
`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`Petitioner submits this Updated Exhibit List to accompany submission of
`
`Exhibit 1051, Petitioner’s Demonstratives for Oral Argument, in accordance with
`
`the Board’s Order Setting Oral Argument (Paper 31).
`
`PETITIONER’S UPDATED EXHIBIT LIST
`
`Exhibit
`1001
`
`1002
`
`Description
`U.S. Patent No. 6,239,614 to Morikawa (“’614 patent”)
`
`Prosecution History of U.S. Patent No. 6,239,614 (“’614
`Prosecution History”)
`
`1003
`
`1004
`
`1005
`
`1006
`
`1007
`
`1008
`
`1009
`
`1010
`
`1011
`
`1012
`
`Declaration of Dr. Holberg in Support of Petition for Inter Partes
`Review of U.S. Patent No. 6,239,614 (“Holberg Decl.”)
`
`Dr. Holberg’s Curriculum Vitae
`
`Mutoh et al., “1-V Power Supply High-Speed Digital Circuit
`Technology with Multithreshold-Voltage CMOS,” IEEE Journal
`of Solid-State Circuits, Vol. 30, No. 8, 847-854 (1995) (“Mutoh”)
`
`U.S. Patent No. 6,653,693 to Makino (“Makino”)
`
`Japanese Patent Publication No. H10125878 to Masami Urano
`(“Urano”)
`
`English translation of Urano
`
`Translation Certificate of Urano
`
`U.S. Patent No. 5,486,774 to Douseki et al. (“Douseki”)
`
`U.S. Patent No. 5,631,492 to Ramus et al. (“Ramus”)
`
`Japanese Patent Publication No. H0818021 to Shin’ichiro Mutoh
`et al. (“Mutoh021”)
`
`1013
`
`English translation of Mutoh021
`
`- 1 -
`
`
`
`Exhibit
`1014
`
`1015
`
`1016
`
`1017
`
`1018
`
`1019
`
`1020
`
`1021
`
`1022
`
`1023
`
`1024
`
`1025
`
`1026
`
`1027
`
`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`
`Description
`Translation Certificate of Mutoh021
`
`Declaration of Dr. Holberg in Support of District Court Case No.
`1:18-cv-00554-LY (“Holberg Dec. 2”)
`
`Saigo et al., “A 20 K-Gate CMOS Gate Array,” IEEE Journal of
`Solid State Circuits, Vol. SC-18, No. 5, 578-584 (1983)
`
`Sato et al., “A Subnanosecond 2000 Gate Array with ECL 10OK
`Compatibility,” Vol. ED-31, No. 2, 139-143 (1984)
`
`Massetti et al., “A CMOS-Based Mixed Analog-Logic Standard
`Cell Product Family,” IEEE 1988 Custom Integrated Circuits
`Conference, 24.1.1 (1988)
`
`Horowitz et al., “Chapter 2: Transitors,” The Art of Electronics, 2nd
`Edition, Cambridge University Press (1989)
`
`U.S. Patent No. 4,001,869 to Brown (“Brown”)
`
`U.S. Patent No. 4,499,387 to Konishi (“Konishi”)
`
`U.S. Patent No. 5,544,102 to Tobita et al. (“Tobita”)
`
`U.S. Patent No. 6,285,052 to Draper (“Draper”)
`
`U.S. Patent No. 6,292,015 to Ooishi et al. (“Ooishi”)
`
`Baker et al., “CMOS Circuit Design, Layout, and Simulation”
`Institute of Electrical and Electronics Engineers, Inc. (1998)
`
`Sato et al., “A Subnanosecond 2000 Gate Array with ECL 100K
`Compatibility,” IEEE Journal of Solid-State Circuits, Vol. SC-19,
`No. 1, 5-9 (1984)
`
`Smith et al., “A CMOS-Based Analog Standard Cell Product
`Family,” IEEE Journal of Solid-State Circuits, Vol. 24, No. 2,
`370-379 (1989)
`
`1028
`
`U.S. Patent No. 6,340,825 to Shibata (“Shibata”)
`
`
`
`- 2 -
`
`
`
`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`
`Exhibit
`1029
`
`Description
`Scheduling Order, Aquila Innovations, Inc. v. Advanced Micro
`Devices, Inc., Case No. 1:18-cv-00554-LY (W.D. Tex.), issued
`January 18, 2019
`
`1030
`
`1031
`
`1032
`
`1033
`
`1034
`
`1035
`
`1036
`
`1037
`
`1038
`
`1039
`
`1040
`
`1041
`
`1042
`
`Order Granting Unopposed Motion to Extend Claim Construction
`Deadlines, Aquila Innovations, Inc. v. Advanced Micro Devices,
`Inc., Case No. 1:18-cv-00554-LY (W.D. Tex.), issued May 14,
`2019
`
`Webster’s Third New International Dictionary (2002)
`
`U.S. Patent No. 4,937,649 to Shiba et al. (“Shiba”)
`
`U.S. Patent No. 6,459,331 to Takeuchi et al. (“Takeuchi”)
`
`Weste, Neil H. E. et al., Principles of CMOS VLSI Design (2d ed.
`1993) (“Weste”)
`
`Laplante, P.A., Comprehensive Dictionary of Electrical
`Engineering (CRC Press 1999) (“Laplante”)
`
`Graf, R.F., Modern Dictionary of Electronics (7th ed. 1999)
`(“Graf”)
`
`Merriam-Webster’s Collegiate Dictionary (10th ed. 2001)
`
`Cabe, Adam and Shamik Das, “Performance Simulation and
`Analysis of a CMOS/Nano Hybrid Nanoprocessor System,”
`Nanotechnology, Vol. 20, No. 16, 22 (Apr. 2009) (“Cabe and
`Das”)
`
`U.S. Patent No. 5,781,062 to Mashiko et al. (“Mashiko”)
`
`U.S. Patent No. 5,933,384 to Terada et al. (“Terada”)
`
`U.S. Patent No. 6,034,563 to Mashiko (“Mashiko1996”)
`
`U.S. Patent No. 6,046,627 to Itoh et al. (“Itoh”)
`
`
`
`- 3 -
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`
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`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`
`Exhibit
`1043
`
`Description
`U.S. Patent No. 6,111,427 to Fujii et al. (“Fujii”)
`
`1044
`
`1045
`
`1046
`
`1047
`
`1048
`
`1049
`
`1050
`
`U.S. Patent No. 6,119,250 to Nishimura et al. (“Nishimura”)
`
`U.S. Patent No. 6,140,836 to Fujii et al. (“Fujii1998”)
`
`U.S. Patent No. 6,211,725 to Kang (“Kang”)
`
`Deposition Transcript of Dr. Przybylski
`
`Declaration of Dr. Holberg in Support of Petitioner’s Reply
`
`Chapter 13 of Microchip Fabrication by Van Zant from the 4th
`Edition (2000)
`
`“Sea-of-gates architecture” by Manoel E.de Lima and David
`J.Kinniment, published on Microelectronics Journal Volume 26,
`Issue 5, July 1995
`
`1051
`
`Petitioner’s Demonstratives for Oral Argument
`
`
`
`
`
`
`
`
`
`Date: December 8, 2020
`
`1100 New York Avenue, N.W.
`Washington, D.C. 20005-3934
`(202) 371-2600
`
`Respectfully submitted,
`STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C.
`
`/Christopher R. O’Brien/
`
`Christopher R. O’Brien (Registration No. 63,208)
`Attorney for Petitioner
`
`
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`- 4 -
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`
`
`Case IPR2019-01525
`U.S. Patent No. 6,239,614
`CERTIFICATION OF SERVICE (37 C.F.R. § 42.6(e))
`
`The undersigned hereby certifies that on December 8, 2020, true and correct
`
`copies of the foregoing PETITIONER ADVANCED MICRO DEVICES,
`
`INC.’S UPDATED EXHIBIT LIST and Exhibit 1051 were served electronically
`
`via e-mail in their entireties on the following counsel for Patent Owner:
`
`
`Jing H. Cherng (Lead Counsel)
`Robert E. Freitas (Back-up Counsel)
`Joshua L. Young (Back-up Counsel)
`FREITAS & WEINBERG LLP
`gcherng@fawlaw.com
`rfreitas@fawlaw.com
`jyoung@fawlaw.com
`marlantico@fawlaw.com
`
`
`
`
`
`
`Respectfully submitted,
`STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C.
`/Christopher R. O’Brien/
`
`Christopher R. O’Brien (Registration No. 63,208)
`Attorney for Petitioner
`
`
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`Date: December 8, 2020
`
`1100 New York Avenue, N.W.
`Washington, D.C. 20005-3934
`(202) 371-2600
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