‘i
`
`I Design of Analog CMOS
`
`3".
`
`Integrated Circuits
`
` F I
`
`
`
`
`
`;
`1
`‘5‘;
`
`.
`Behzad Razav1
`
`Intel 1441
`
`Intel 1441
`Intel v. Qualcomm
`Intel V. Qualcomm
`IPR2019-00129
`
`IPR2019-00129
`
`
`
`I Design of Analog CMOS
`
`3".
`
`Integrated Circuits
`
` F I
`
`
`
`
`
`;
`1
`‘5‘;
`
`.
`Behzad Razav1
`
`Intel 1441
`
`Intel 1441
`Intel v. Qualcomm
`Intel V. Qualcomm
`IPR2019-00129
`
`IPR2019-00129
`
`
`
`
`
`McGraw-Hill Higher Education 32
`A Division of WMcGrawHill Companies
`
`
`
`This book is printed on acid-free paper.
`
`Library of Congress Cataloging-in-Publication Data
`
`
`
`
`DESIGN or ANALOG CMOS INTEGRATED CIRCUITS
`Published by McGraw—Hill. an imprint of The McGraw-Hill companies, Inc. 122] Avenue of Ilte Americas.
`
`
`New York. NY. 10020. Copyright © 200 I. by The MuGraw-Hill Companies. inc. All rights ICXEI'VCII. no part of
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`
`this publication may he roproduccd or distributed in any form or by any means. or slorcd in a database or retrieval
`system. without the prior written consent of The McGraw-ivlill Companies. Inc. including. but not limited to. in
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`any network or other electronic storage or lransnn
`Some Ancilinries. including electronic and print components, may not be available to customers outside the United
`
`States.
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`1234567890 FGR/FGR 909876543210
`
`ISBN IJ-El7-EEIBDBE-E
`
`
`Vice president/Editor-in-chief: Kevin T. Kane
`Publisher: Thomas Casson
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`
`Razavi, Behzad.
`Design of analog CMOS integrated circuits / Behzad Razavi.
`p. cm.
`ISBN 0—0?~238032-2 (alk. paper)
`1. Linear integrated circuits—Design and construction. 2. Metal oxide semiconductors,
`Complementary.
`I. Title.
`
`
`
`00—0447 89
`
`TK7874.654. R39 2001
`
`621 .39’732—chl
`
`
`
`[age Amplifiers
`
`sec. 3.5
`
`Cascode Stage
`
`83
`
`
`
`Figure 3.49
`
`The output impedance is simply equal to
`
`Rout ={[1+(gm + gmb)rO]RP + "OiiiRD-
`
`(3-116)
`
`a small-signal drain current proportional to Vi” and M2 simply routes the current to R D.
`
`(3.114)
`
`tre—
`
`rent‘rather than a
`[Pm Impedance 0f
`
`4) to write
`
`(3.115)
`
`3.5 Cascode Stage
`
`As mentioned in Example 3.10 the input signal of a common-gate stage may be a current.
`We also know that a transistor in a common-source arrangement converts a voltage signal to
`a current signal. The cascade of a CS stage and a CG stage is called a “cascode”l topology,
`providing many useful properties. Fig. 3.50 shows the basic configuration: M1 generates
`
`Figure 3.50 Cascode stage.
`
`We call M1 the input device and M2 the cascode device. Note that in this example, M1 and
`M2 carry equal currents. As we describe the attributes of the circuit in this section, many
`advantages of the cascode topology over a simple common-source stage become evident.
`First, let us study the bias conditions of the cascode. For M1 to operate in saturation,
`VX 3 V,-,, — VTH1. If M1 and M2 are both in saturation, then VX is determined primarily by
`
`lThe term cascade is believed to be the acronym for “cascaded triodes,” possibly invented in vacuum tube
`days.
`
`
`
`
`
`Chap. 3
`
`Single-Stage Amplifiers
`
`Vb: VX = Vb * V052. Thus, Vb ' V052 2 Vin — VTHI and hence Vb > Vin + V052 — VTHi
`(Fig. 3.51). For M2 to be saturated, V0”, 3 Vb — VTH2, that is, V0,” 3 V,-,, # VTH1+ V032 —
`
`of the transconductance and body effect of M2.
`
`as well, causing VX to fall. As Vi” assumes sufficiently large values, two effects occur: (1)
`VX drops below V,-,1 by VT H1, forcing M1 into the triode region; (2) V0”, drops below Vb
`by VTH2, driving M2 into the triode region. Depending on the device dimensions and the
`values of RD and Vb, one effect may occur before the other. For example, if Vb is relatively
`low, M1 may enter the triode region first. Note that if M2 goes into deep triode region, VX
`and V0”, become nearly equal.
`Let us now consider the small-signal characteristics of a cascode stage, assuming both
`transistors operate in saturation. If )t = 0, the voltage gain is equal to that of a common-
`source stage because the drain current produced by the input device must flow through the
`cascode device. Illustrated in the equivalent circuit of Fig. 3.53, this result is independent
`
`Figure 3.51 Allowable voltages in
`cascode stage.
`
`VTH2 if V], is chosen to place M1 at the edge of saturation. Consequently, the minimum
`output level for which both transistors operate in saturation is equal to the overdrive voltage
`of M1 plus that of M2. In other words, addition of M2 to the circuit reduces the output
`voltage swing by at least the overdrive voltage of M2. We also say M2 is “stacked” on top
`Of M1.
`We now analyze the large-signal behavior of the cascode stage shown in Fig. 3.50 as
`Vi” goes from zero to VDD. For Vi” f VTHI, M1 and M2 are off, V0”, 2 VDD, and
`VX H Vb — VTH2 (if subthreshold conduction is neglected) (Fig. 3.52). As V,-,, exceeds
`VT H1, M I begins to draw current, and V0”, drops. Since [02 increases, V052 must increase
`
`Figure 3.52 Input—output characteris-
`o of a cascode stage.
`
`,n
`
`VTH1
`
`
`
`
`
`Cascode Stage
`
`85
`
`
`
`Figure 3.53 Small-signal equivalent circuit of cascode
`stage.
`
`Example 3.14
`
`
`
`Calculate the voltage gain of the circuit shown in Fig. 3.54 if )t = 0.
`
`VDD
`
`RD
`
`Vout
`
`Vb o—l M2
`
`Vin 0—! M 1
`
`R
`
`P
`
`
`
`Sec. 3.5
`
`1e Amplifiers
`
`’Gsz — VTH1
`H1 + VGsz —
`
`the minimum
`
`rdrive voltage
`es the output
`icked” on top
`
`1 Fig. 3.50 as
`= VDD7 and
`s Vin exceeds
`must increase
`
`1cteris-
`
`'ects occur: (1)
`
`rops below Vb
`nsions and the
`
`Vb is relatively
`ode region, Vx
`
`assuming both
`of a common-
`
`ow through the
`is independent
`
`
`
`,—_.___.—_.———————-——-—*
`
`7
`
`Figure 3.54
`
`Solution
`
`The small-signal drain current of M1, gml Vm, is divided between R p and the impedance seen looking
`into the source of M2, 1 /(gm2 + gmbg). Thus, the current flowing through M2 is
`
`[DZ : glein
`
`{Nut}. + erahlu'f!’
`—_—_
`'1' {8:er 4‘ HruhZfleP
`I
`
`The voltage gain is therefore given by
`
`’u' + ”ll—RJR
`'
`A. = _m_w
`I + (Sufi + SmbflRi’
`
`(3.117)
`
`(3.118)
`
`An important property of the cascode structure is its high output impedance. As illustrated
`in Fig. 3.55, for calculation of Row, the circuit can be viewed as a common-source stage
`with a degeneration resistor equal to r01. Thus, from (3.60),
`
`Rout = [1 + (gm2 + gmb2)"021701 + mg.
`
`(3.119)
`
`
`
`
`
`Chap. 3
`
`Single-Stage Amplifiers
`
`Figure 3.55 Calculation of output re-
`sistance of cascode stage.
`
`Figure 3.56 Triple cascode.
`
`then Gm g gml and Rout ”a (thZ + gmb2)702V01, yielding Av : (ng + gmb2)r02gmlr01<
`
`Assuming gmro >> 1, we have Rom % (gmz + gmb2)r02r01. That is, M2 boosts the output
`impedance of M1 by a factor of (8m + gmb2)r02. As shown in Fig. 3.56, cascoding can
`be extended to three or more stacked devices to achieve a higher output impedance, but
`the required additional voltage headroom makes such configurations less attractive. For
`example, the minimum output voltage of a triple cascode is equal to the sum of three
`overdrive voltages.
`To appreciate the usefulness of a high output impedance, recall from the lemma in Section
`3.2.3 that the voltage gain can be written as GmRom. Since Gm is typically determined
`by the transconductance of a transistor, e.g., M1 in Fig. 3.50, and hence bears trade-offs
`with the bias current and device capacitances, it is desirable to increase the voltage gain by
`maximizing Rom. Shown in Fig. 3.57 is an example. If both M1 and M2 operate in saturation,
`
`Vbo—l M2
`
`Vin°—‘| M1
`
`Figure 3.57 Cascode
`current—source load.
`
`stage with
`
`
`
`Sec. 3.5
`
`Cascode Stage
`
`
`
`87
`
`
`
`Thus, the maximum voltage gain is roughly equal to the square of the intrinsic gain of the
`transistors.
`
`Example 3.15
`
`
`
`Calculate the exact voltage gain of the circuit shown in Fig. 3.57.
`
`Solution
`
`The actual Gm of the stage is slightly less than gml because a fraction of the small-signal current
`produced by M1 is shunted to ground by r01. As depicted in Fig. 3.58:
`
`
`
`
`
`
`
`
`
`
`
` r01
`
`+
`
`(b)
`
`- 9m1 r01 Vin
`
`Figure 3.58
`
`r01
`[out = ngVirL—l_—-
`gull + gum:
`”on + —— r02
`
`It follows that the overall transconductance is equal to
`
`
`Gm = 8::11"(J|l"(.i'2(§m2 + 3mm) + H ’
`m: f‘ozlgmz + 8mm) + ml + 1'02
`
`and hence the voltage gain is given by
`
`lAvl = GmRoul
`
`= gm1701[(gm2 + gmb2)r02 + 1].
`
`(3.120)
`
`(3.121)
`
`(3.122)
`
`(3.123)
`
`If we had assumed Gm w gm, then IAvl "A3 gm1{[1 + (gmz + gmb2)r02]ro1 + r02}.
`Another approach to calculating the voltage gain is to replace Vin and M1 by a Thevenin equivalent,
`reducing the circuit to a common-gate stage. Illustrated in Fig. 3.58(b), this method in conjunction
`with (3.104) gives the same result as (3.123).
`__——__——-———
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`88
`
`Chap. 3
`
`Single-Stage Amplifiers
`
`V
`
`I'D
`W
`_
`‘" H L
`
`V °__|
`'"
`
`i'1:
`W
`H.—
`4:.
`
`’ D
`
`V—V
`L
`VIV
`
`Vb2'—i
`
`Vin °—|
`
`(a)
`
`(b)
`
`(C)
`
`Figure 3.59 Increasing output impedance by increasing the device
`length or cascoding.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`It is also interesting to compare the increase in gain due to cascoding with that due to
`increasing the length of the input transistor for a given bias current (Fig. 3.59). Suppose,
`for example, that the length of the input transistor of a CS stage is quadrupled while the
`width remains constant. Then, since ID = (1/2)p,,,C0_\.(W/L)(VGS — VTH)2, the overdrive
`voltage is doubled, and the transistor consumes the same amount of voltage headroom as
`does a cascode stage. That is, the circuits of Figs. 3.59(b) and (c) impose equal voltage
`swing constraints.
`Now consider the output impedance achieved in each case. Since
`
`gHIVO 2J2M11C0xf10m7
`
`W
`
`1
`
`(3.124)
`
`and A OC 1 / L, quadrupling L only doubles the value of g,,,r0 while cascoding results in an
`output impedance of roughly (g,,,r0)2. Note that the transconductance of M1 in Fig. 3.59(b)
`is half that in Fig. 3.59(c), leading to higher noise (Chapter 7).
`A cascode structure need not operate as an amplifier. Another popular application of
`this topology is in building constant current sources. The high output impedance yields a
`current source closer to the ideal, but at the cost of voltage headroom. For example, current
`source 11 in Fig. 3.57 can be implemented with a PMOS cascode (Fig. 3.60), exhibiting an
`impedance equal to [l + (gmg + g,,,b3)r03]r04 + r03. If the gate bias voltages are chosen
`
`VDD
`
`Vba "H
`
`5 Current
`Source
`
`Vb1"‘|
`
`Vin o—I
`
`"'
`
`Figure 3.60 NMOS cascode ampli-
`fier with PMOS cascode load.
`
`
`
`Vbz “—l M4: Cascode
`
`
`
`
` Cascode Stage
`
`
`
`Wm) ‘ (VGSZ — VTHZ) —
`
`89
`
`properly, the maximum output swing is equal to VDD — (V051 —
`iVGS3 — VTH3l — iVGS4 — VTH4i-
`
`
`We calculate the voltage gain with the aid of the lemma illustrated in Fig. 3.25. Writing
`Gm ~ gml and
`
`
`Rout =ii1+(gm2 + gmb2)r02]r01 + V02lili[1+(gm3 + gmb3)r03]rO4 + 7‘03},
`(3.125)
`
`
`
`we have |Av| m gm1 Rom. For typical values, we approximate the voltage gain as
`
`iAvi N gm1[(gmzrozrm)ll(gm3ro3r04)l-
`
`(3.126)
`
`
`
`
`
`
`
`Shielding Property Recall from Fig. 3.23 that the high output impedance arises. from
`
`the fuel that ii‘lhe output node voltage is changed by A V, the resulting change at the source.
`
`
`
`
`of [he cascode device is much less. In a sense, the cascode lransislor “shields” the input
`
`
`device from voltage variations at the output. The shielding property of cascodes proves;
`
`
`
`useful in many circuits.
`
`Example 3.16
`
`
`Two identical NMOS transistors are used as constant current sources in a system [Fig. 3.6l(a)].
`However, due to internal circuitry of the system, VX is higher than VY by AV.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
` Figure 3.61
` (a) Calculate [he resulting difference between Mr and [Dz if A 73 0.
`
`
`
`(b) Add cascade devices to M1 and M2 and repeal part (a).
`Solution
`
`
`
`(a) We have
`
`
`1
`W
`101 — 102 = EMnConO/b — VTH)2(AVDSI — AV052)
`(3-127)
`1
`W
`= EunCMZU/b — momma.
`
`
`
`
`
`
`(3.128)
`
`ng with that due to
`lg. 3.59). Suppose,
`adrupled while the
`r1102, the overdrive
`)ltage headroom as
`pose equal voltage
`
`(3.124)
`
`:oding results in an
`’M1 in Fig. 3.59(b)
`
`ular application of
`mpedance yields a
`)r example, current
`3.60), exhibiting an
`oltages are chosen
`
`ampli—
`
`
`
`
`
`
`
`90
`
`Chap. 3
`
`Single-Stage Amplifiers
`
`(b) As shown in Fig. 3.6l(b), cascoding reduces the effect of VX and Vy upon ID] and 102,
`respectively. As depicted in Fig. 3.23 and implied by Eq. (3.63), a difference AV between Vx and
`Vy translates to a difference AVpQ between P and Q equal to
`
`AVPQ _ AV_
`"01
`[1+(g1113 + gl11b3)"03]r01 + 1‘03
`AV
`m ————.
`(81113 + g111b3)"03
`
`(3.129)
`
`(3.130)
`
`Thus,
`
`AAV
` l W 2
`
`[DZ — 2M11Cax L (Vb
`VTH)
`(Hm? + Kirihfllrflfi
`
`
`
`.
`
`[DJ
`
`(3.13l)
`
`In other words, cascoding reduces the mismatch between 101 and [DZ by (gm3 + g,,,b3)r03.
`__—_____=_—————=———v——=I_._._._—=———-=
`
`The shielding property of cascodes diminishes if the cascode device enters the triode
`region. To understand why, let us consider the circuit in Fig. 3.62, assuming VX decreases
`from a large positive value. As VX falls below Vbz # VT H2, M2 requires a greater gate—source
`
`stage.
`
`Figure 3.62 Output swing of cascode
`
`overdrive so as to sustain the current drawn by MJ. We can write
`
`l
`
`W
`
`102 = EM11C0X<I> [2(Vb2 — VP — VTH2)(VX * VP) — (VX — V02].
`
`2
`
`(3-l32)
`
`'
`
`I
`
`concluding that as VX decreases, VP also drops so that ID2 remains constant. In other words,
`variation of VX is less attenuated as it appears at P. If VX falls sufficiently, VP goes below
`Vb] — VTH1, driving M1 into the triode region.
`
`3.5.1 Folded Cascode
`
`The idea behind the cascode structure is to convert the input voltage to a current and
`apply the result to a common-gate stage. However, the input device and the eascode device
`need not be of the same type. For example, as depicted in Fig. 3.63(a), a PMOS-NMOS
`combination performs the same function. In order to bias MI and M2, a current source must
`be added as in Fig. 3.63(b). The small-signal operation is as follows. If V,-,, becomes more
`positive, |101| decreases, forcing ID2 to increase and hence V0”, to drop. The voltage gain
`and output impedance of the circuit can be obtained as calculated for the NMOS—NMOS
`
`I
`
`I
`I
`
`I
`
`‘
`
`I
`
`I
`
`
`
`
`
`np|ifiers
`
`and ID2,
`\ VX and
`
`(3.129)
`
`(3.130)
`
`the triode
`decreases
`
`ate-source
`
`(3.132)
`
`other words,
`
`) goes below
`
`1 current and
`iscode device
`MOS—NMOS
`1t source must
`)ecomes more
`
`e voltage gain
`IMOS-NMOS
`
`Cascode Stage
`
`L—
`
`(a)
`
`Figure 3.63 (a) Simple folded cascode, (b) folded cascode with proper biasing, (c) folded cascode
`with NMOS input.
`
`2
`W
`1
`1132 = 11— —MpCox — (VDD — Vin —- IVTHII) -
`1
`2
`L
`
`(3-133)
`
`As V”, drops, ID2 decreases further, falling to zero if ID1 = I1. For this to occur:
`
`Vin = V
`1
`DD
`
`211
`— ————- — V
`MpCox(W/L)1
`l THll
`
`.
`
`3.135
`
`(
`
`)
`
`If V;,, falls below this level, ID 1 tends to be greater than 11 and M1 enters the triode region
`so as to allow 101 = 11. The result is plotted in Fig. 3.64.
`What happens to VX in the above test? As ID2 drops, VX rises, reaching Vb — VT,” for
`ID2 = 0. As M1 enters the triode region, VX approaches VDD.
`
`cascode of Fig. 3.50. Shown in Fig. 3.63(c) is an NMOS—PMOS cascode. The advantages
`and disadvantages of these types will be explained later.
`The structures of Figs. 3.63(b) and (c) are called “folded cascode” stages because the
`small-signal current is “folded” up [in Fig. 3.63(b)] or down [in Fig. 363(0)]. Note that the
`total bias current in this case must be higher than that in Fig. 3.50 to achieve comparable
`performance.
`It is instructive to examine the large-signal behavior of a folded—cascode stage. Suppose
`in Fig. 3.63(b), Vin decreases from VDD to zero. For V,-,, > VDD — |VTH1|, M1 is off and
`M2 carries all of 11,2 yielding V0”, 2 VDD — IlRD. For V1,, < VDD - [VTH1|,M1 turns on
`in saturation, giving
`
`2If 11 is excessively large, M2 may enter deep triode region, possibly driving 1] into the triode region as well.
`
`
`
`1
`
`W
`
`EMPCOX (f)1(VDD — Vinl - IVTHil)2 = 11-
`
`
`
`
`
`92
`
`Chap. 3
`
`
`
`Single-Stage Amplifiers
`
`
`
`
`
`Vim VDD‘lVTH1l
`
`Vin
`
`Vin1 VDD-IVTH1l Vin
`
`Figure 3.64 Large-signal characteristics of folded cascode.
`
`
`
`Example 3.17 i
`t__.._._
`.7
`Calculat
`e the output impedance of the folded cascode shown in Fig. 3.65 where M3 operates as a
`current source.
`
`V
`
`DD
`
`l
`
`Rout
`
`M2
`
`Iv—al Vb
`
`Vba *‘l M3
`
`=
`
`Figure 3.65
`
`Solution
`
`Using (3.60), we have
`
`Rom = l1 + (@112 + gmbz)702l(r01llr03)+ V02.
`
`(3-136)
`
`Thus, the circuit exhibits an output impedance lower than that of a nonfolded cascode.
`
`In order to achieve a high voltage gain, the load of a folded cascode can be implemented
`as a cascode itself (Fig. 3.66). This structure is studied more extensively in Chapter 9.
`Throughout this chapter. we have attempted to increase the output resistance of voltage
`amplifiers so as to obtain a high gain. This may seem to make the speed of the circuit
`quite susceptible to the load capacitance. However, as explained in Chapter 8. a high output
`impedance per se does not pose a serious issue if the amplifier is placed in a proper feedback
`loop.
`
`3.6 Choice of Device Models
`
`
`
`arious expressions for the properties of single—stage
`In this chapter, we have developed v
`air: of a degenerated common—source stage can he as
`amplifiers. For example, the voltage g
`3.71). How does one choose a sufficiently
`simple as — Rn /( R3 + g,;1 ) or as complex as liq. [
`accurate device model or expression?
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
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