Intel Corporation
`v.
`Qualcomm Incorporated
`IPR2018-01334
`U.S. Patent No. 8,838,949
`
`Patent Owner’s Demonstrative
`Exhibits for Oral Argument on Remand
`
`1
`
`
`v.
`Qualcomm Incorporated
`IPR2018-01334
`U.S. Patent No. 8,838,949
`
`Patent Owner’s Demonstrative
`Exhibits for Oral Argument on Remand
`
`1
`
`
`
`U.S. Patent No. 8,838,949 – Claim 1
`1. A multi-processor system comprising:
`a secondary processor comprising:
`system memory and a hardware buffer for receiving an
`image header and at least one data segment of an
`executable software image, the image header and each data
`segment being received separately, and
`a scatter loader controller configured:
`to load the image header; and
`to scatter load each received data segment based at least in
`part on the loaded image header, directly from the
`hardware buffer to the system memory;
`a primary processor coupled with a memory, the memory
`storing the executable software image for the secondary
`processor; and
`an interface communicatively coupling the primary processor
`and the secondary processor, the executable software image
`being received by the secondary processor via the interface.
`2
`
`Ex. 1001 at Fig. 3; 12:60-13:10.
`
`
`
`The Federal Circuit’s Opinion
`
`21 F.4th 801, 809-10 (Fed. Cir. 2021).
`
`3
`
`
`
`The Federal Circuit’s Opinion (cont’d)
`
`21 F.4th 801, 810 (Fed. Cir. 2021).
`
`Id.
`
`4
`
`Id. at 812.
`
`
`
`The Federal Circuit’s Opinion (cont’d)
`
`5
`
`21 F.4th 801, 812 (Fed. Cir. 2021).
`
`
`
`Claim Construction – “Hardware Buffer”
`
`Patent Owner’s Proposed
`Construction: “a permanent,
`dedicated buffer that is distinct from
`system memory”
`Paper 37 (PO Resp. on Remand) at 3-15;
`Paper 40 (PO Sur-Reply on Remand) at 1-6;
`Ex. 2015 (Rinard Remand Decl.) at ¶¶16-61.
`
`Petitioner’s Proposed Construction:
`“memory that is physically separate
`from the memory into which the
`software image is loaded for
`execution”
`Paper 35 (Pet. Opening Br. on Remand) at 5.
`
`6
`
`Ex. 1001 at Fig. 3.
`
`
`
`The Prior Art Used a Temporary Buffer in System Memory
`
`Ex. 1001 at 2:14-22.
`“The ’949 patent states that the extra memory
`copy operations in system memory result in
`reduced efficiency and increased time
`required to boot a secondary processor in a
`multi-processor system. [’949 patent] at 7:27-
`30. The prior-art systems’ use of system
`memory is also inefficient because it is
`general-purpose memory that is not
`specifically configured for the task of
`buffering data in a multi-processor system.”
`Ex. 2015 (Rinard Remand Decl.) at ¶¶24-25.
`
`7
`
`Id. at 2:23-41.
`
`Paper 37 (PO Resp. on Remand) at 3-5;
`Ex. 2015 (Rinard Remand Decl.) at ¶¶6-15, 23-26.
`
`
`
`The ’949 Patent’s Dedicated, Permanent Hardware Buffer
`Enables More Efficient Loading
`“The modem processor
`110 stores the modem
`executable image
`132 directly into the
`modem processor RAM
`(Random Access
`Memory) 112 to the final
`destination without
`copying the data into a
`temporary buffer in the
`modem processor
`RAM 112.” Id. at 5:31-35
`(emphasis added).
`
`Ex. 1001 at 4:43-47.
`
`Id. at 7:16-30.
`
`8
`
`Paper 37 (PO Resp. on Remand) at 6-8;
`Ex. 2015 (Rinard Remand Decl.) at ¶¶6-15, 27-34.
`
`
`
`The ’949 Patent’s Dedicated, Permanent Hardware Buffer
`Enables More Efficient Loading (cont’d)
`
`Ex. 1001 at 9:42-56.
`
`Id. at 11:17-24.
`
`9
`
`Paper 37 (PO Resp. on Remand) at 6-8;
`Ex. 2015 (Rinard Remand Decl.) at ¶¶6-15, 27-34.
`
`
`
`The ’949 Patent’s Dedicated, Permanent Hardware Buffer
`Enables More Efficient Loading (cont’d)
`
`Ex. 2015 (Rinard Remand Decl.) at ¶32.
`
`10
`
`
`
`Inventor Testimony Supports Qualcomm’s Construction
`
`Ex. 2003 at 216:16-19.
`
`11
`
`Ex. 2004 at 221:25-222:10.
`
`
`
`Intel’s Construction Encompasses The Prior-Art
`Configuration Distinguished Throughout The ’949 Patent
`Petitioner’s Proposed Construction: “memory that is physically separate from the
`memory into which the software image is loaded for execution” (Paper 35 at 5)
`
`“Intel’s construction encompasses ...
`the exact configuration described in
`the Background section and
`distinguished throughout the ’949
`patent. Implementing the ... hardware
`buffer in system memory would not
`enable direct loading to system
`memory (as claimed), and would
`instead provide an indirect loading
`process including the ‘extra memory
`copy operations’ that the ’949
`invention seeks to eliminate. Further, a
`hardware buffer formed in system
`memory would achieve none of the
`advantages of the ’949 invention ….”
`Ex. 2015 (Rinard Remand Decl.) at ¶59; see
`also id. at ¶¶57-61; Paper 37 (PO Resp. on
`Remand) at 14-15.
`
`Paper 35 (Pet. Opening Br. on Remand) at 6.
`
`Id.
`
`12
`
`
`
`The CAFC Found That The “Hardware Buffer” Is
`Conceptually Distinct From “System Memory”
`
`21 F.4th 801, 810 (Fed. Cir. 2021).
`
`Id. at 811.
`
`13
`
`Id.
`
`
`
`Claims 1-9 and 12 Are Not Unpatentable
`Patent Owner’s Proposed Construction: “a permanent, dedicated
`buffer that is distinct from system memory”
`
`The ISA of Bauer/Svensson Is
`Not A Permanent Buffer
`• Allocated in DSP SARAM & DARAM
`108/208 by software at run time
`(Ex. 1010 at 5:3-36), and therefore, it
`is not permanent
`• The Board agrees (Paper 30 at 55-56)
`• Petitioner acknowledges that the ISA
`is allocated at run time (Paper 29 at
`19:19-25)
`
`Paper 37 (PO Resp. on Remand) at 15-17; Paper 40 (PO Sur-Reply on Remand) at
`6-7; Ex. 2015 (Rinard Remand Decl.) at ¶¶63-67.
`
`“Before the software
`allocates the ISA, the ISA
`does not exist in the DSP
`SARAM & DARAM
`108/208, and that is why it
`is temporary: It exists only
`after it is allocated by
`software at run time, and
`therefore, it is not a
`permanent, fixed buffer.”
`Ex. 2015 (Rinard Remand Decl.) at ¶65.
`
`14
`
`
`
`Svensson’s ISA is Not Permanent
`
`Ex. 1010 (Svensson) at 5:21-33; Fig. 2.
`
`15
`
`
`
`Claims 1-9 and 12 Are Not Unpatentable
`Patent Owner’s Proposed Construction: “a permanent, dedicated
`buffer that is distinct from system memory”
`
`The ISA of Bauer/Svensson Is Not Distinct from System
`Memory
`• The ISA is allocated in the DSP
`SARAM & DARAM 108/208
`• Dr. Lin conceded that the
`memory 108/208 “could be used
`to load and execute programs,”
`such that it satisfies Petitioner’s
`construction of system memory
`(“memory where an executable
`software image can be loaded
`and executed”)
`Paper 37 (PO Resp. on Remand) at 17-19; Ex.
`2015 (Rinard Remand Decl.) at ¶¶68-70.
`
`16
`
`Paper 16 (PO Resp.) at 50-58; Paper 25 (PO Sur-Reply)
`at 17-26; Ex. 2007 (Rinard Decl.) at ¶¶135-144.
`
`
`
`Claims 1-9 and 12 Are Not Unpatentable
`Patent Owner’s Proposed Construction: “a permanent, dedicated
`buffer that is distinct from system memory”
`
`The ISA of Bauer/Svensson Is
`Not A Dedicated Buffer
`• The ISA is a portion of the general-
`purpose system memory of
`Bauer/Svensson usable by the client
`processor for various operations
`• The SARAM & DARAM 108/208 that
`holds the ISA can be allocated,
`deallocated, and used for any system
`memory purpose that the software
`sees fit
`
`Paper 37 (PO Resp. on Remand) at 18-19; Ex. 2015 (Rinard Remand Decl.) at ¶70.
`
`“[B]ecause the ISA is
`allocated in system
`memory, it is not a
`dedicated, permanent
`buffer used for the
`specialized task of scatter
`loading data segments
`directly to system
`memory.”
`Ex. 2015 (Rinard Remand Decl.) at ¶70.
`
`17
`
`
`
`CERTIFICATE OF SERVICE
`
`The undersigned hereby certifies that a copy of the foregoing Patent
`
`Owner’s Demonstrative Exhibits for Oral Argument on Remand were served on
`
`August 2, 2022 by email, as follows:
`
`David L. Cavanaugh (Registration No. 36,476)
`David.Cavanaugh@wilmerhale.com
`
`Thomas E. Anderson (Registration No. 37,063)
`Tom.Anderson@wilmerhale.com
`
`Joseph H. Haag (Registration No. 42,612)
`Joseph.Haag@wilmerhale.com
`
`Date: August 2, 2022
`
`/ Joshua R. Nightingale /
`Joshua R. Nightingale, Reg. No. 67,865
`JONES DAY
`500 Grant Street, Suite 4500
`Pittsburgh, PA 15219
`
`Counsel for Patent Owner
`
`
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