Case: 20-1828 Document:
`
`
`59 Page: 1 Filed: 11/16/2020
`
`
`
`Nos. 2020-1828, -1867
`
`
`
`UNITED STATES COURT OF APPEALS
`
`FOR THE FEDERAL CIRCUIT
`
`INTEL CORPORATION,
`
`Appellant,
`
`V.
`
`QUALCOMM IN CORPORA TED,
`
`ross-Appellant.
`
`Appeals from the United States Patent and Trademark Office, Patent Trial and
`
`
`
`
`
`
`Appeal Board in Nos. IPR2018-01334, IPR2018-01335, and IPR2018-0l 336
`
`BRIEF FOR APPELLANT INTEL CORPORATION
`
`JOSEPH F. HAAG
`THOMAS G. SAUNDERS
`WILMER CUTLER PICKERING
`DAVID L. CAVANAUGH
`CLAIRE H. CHUNG
`HALE AND DORR LLP
`WILMER CUTLER PICKERING
`2600 El Camino Real, Suite 400
`HALE AND DORR LLP
`Palo Alto, CA 94306
`(650)858-6000
`1875 Pennsylvania Avenue, NW
`
`
`
`Washington, DC 20006
`(202)663-6000
`
`
`
`November 16, 2020
`
`Attorneys for Appellant
`
`Intel orporation
`
`IPR2018-01334
`Intel V. Qualcomm
`INTEL 1029
`
`

`

`
`
`Case: 20-1828|Document:59 Page:2_ Filed: 11/16/2020
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`
`
`PATENT CLAIMSAT ISSUE
`
`Intel challenges the patentability of claims 1-9, 12, and 16-17 of U.S. Patent
`
`No.8,838,949. Those claims and claim 10 (from which claim 12 depends) are
`
`reproduced below.
`
`Claim 1. A multi-processor system comprising:
`
`a secondary processor comprising:
`
`system memory and a hardware buffer for receiving an image
`header and at least one data segment of an executable software
`image, the image header and each data segment being received
`separately, and
`
`a scatter loader controller configured:
`
`to load the image header; and
`
`to scatter load each received data segment basedat least in part on
`the loaded image header, directly from the hardware buffer to
`the system memory;
`
`a primary processor coupled with a memory, the memory storing the
`executable software image for the secondary processor; and
`
`an interface communicatively coupling the primary processorand the
`secondary processor, the executable software image being received
`by the secondary processorvia the interface.
`
`Appx78-79(12:60-13:10).
`
`Claim 2. The multi-processor system of claim | in which the scatter
`loader controller is configured to load the executable software image
`directly from the hardware buffer to the system memory of the
`secondary processor without copying data between system memory
`locations on the secondary processor.
`
`Appx79(13:11-16).
`
`

`

`
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`Case: 20-1828 Page:3_Filed: 11/16/2020Document:59
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`
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`Claim 3. The multi-processor system of claim | in which raw image
`data of the executable software image is received by the secondary
`processorvia the interface.
`
`Appx79(13:17-19).
`
`Claim 4. The multi-processor system of claim | in which the
`secondary processoris configured to process the image header to
`determineat least one location within the system memory to store the
`at least one data segment.
`
`Appx79(13:20-23).
`
`Claim 5. The multi-processor system of claim 4 in which the
`secondary processoris configured to determine, based on the received
`image header, the at least one location within the system memory to
`store the at least one data segment before receiving the at least one
`data segment.
`
`Appx79(13:25-29).
`
`Claim 6. The multi-processor system of claim 1, in which the
`secondary processor further comprises a non-volatile memory storing
`a boot loaderthat initiates transfer of the executable software image
`for the secondary processor.
`
`Appx79(13:30-33).
`
`Claim 7. The multi-processor system of claim | in which the primary
`and secondary processorsare located on different chips.
`
`Appx79(13:34-36).
`
`Claim 8. The multi-processor system of claim | in which the portion
`of the executable software image is loaded into the system memory of
`the secondary processor without an entire executable software image
`being stored in the hardware buffer.
`
`Appx79(13:37-41).
`
`

`

`
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`Case: 20-1828|Document:59 Page:4_Filed: 11/16/2020
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`Claim 9. The multi-processor system of claim | integrated into at
`least one of a mobile phone, a set top box, a music player, a video
`player, an entertainment unit, a navigation device, a computer, a hand-
`held personal communication systems (PCS) unit, a portable data unit,
`and a fixed location data unit.
`
`Appx79(13:42-46).
`
`Claim 10. A method comprising:
`
`receiving at a secondary processor, from a primary processorvia an
`inter-chip communication bus, an image header for an executable
`software image for the secondary processorthat is stored in
`memory coupled to the primary processor, the executable software
`image comprising the image headerand at least one data segment,
`the image header and each data segment being received separately;
`
`processing, by the secondary processor, the image header to determine
`at least one location within system memory to which the secondary
`processoris coupled to store each data segment;
`
`receiving at the secondary processor, from the primary processorvia
`the inter-chip communication bus, each data segment; and
`
`scatter loading, by the secondary processor, each data segment reedy
`[sic] to the determined at least one location within the system
`memory, and each data segment being scatter loaded basedatleast
`in part on the processed image header.
`
`Appx79(13:47-67).
`
`Claim 12. The method of claim 10 further comprising loading the
`executable software image directly from a hardwarebuffer to the
`system memoryof the secondary processor without copying data
`between system memory locations.
`
`Appx79(14:3-6).
`
`

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`Case: 20-1828
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`Document:59
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`Page:5_
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`Filed: 11/16/2020
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`Claim 16. An apparatus comprising:
`
`means for receiving at a secondary processor, from a primary
`processorvia an inter-chip communication bus, an image header
`for an executable software image for the secondary processorthat
`is stored in memory coupled to the primary processor, the
`executable software image comprising the image headerandat
`least one data segment, the image header and each data segment
`being received separately;
`
`meansfor processing, by the secondary processor, the image headerto
`determineat least one location within system memory to which the
`secondary processoris coupled to store each data segment;
`
`means for receiving at the secondary processor, from the primary
`processorvia the inter-chip communication bus, each data
`segment; and
`
`meansfor scatter loading, by the secondary processor, each data
`segmentdirectly to the determinedat least one location within the
`system memory, and each data segmentbeing scatter loaded based
`at least in part on the processed imageheader.
`
`Appx79(14:17-37).
`
`Claim 17. The apparatus of claim 16 integrated into at least one of a
`mobile phone,a set top box, a music player, a video player, an
`entertainment unit, a navigation device, a computer, a hand-held
`personal communication systems (PCS) unit, a portable data unit, and
`a fixed location data unit.
`
`Appx79(14:38-42).
`
`

`

`Case: 20-1828
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`Document:59
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`Page:6_
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`Filed: 11/16/2020
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`CERTIFICATE OF INTEREST
`
`Counsel for Appellant Intel Corporation certifies the following:
`
`Represented Entities. Fed. Cir. R. 47.4(a)(1). Provide the full
`1.
`namesofall entities represented by undersigned counselin this case.
`
`Intel Corporation
`
`Real Party in Interest. Fed. Cir. R. 47.4(a)(2). Provide the full
`Zs
`namesofall real parties in interest for the entities. Do not list the real parties if
`they are the sameasthe entities.
`
`Apple Inc.
`
`Parent Corporations and Stockholders. Fed. Cir. R. 47.4(a)(3).
`3
`Provide the full names ofall parent corporations for the entities and all publicly
`held companies that own 10% or more stock in the entities.
`
`None.
`
`Legal Representatives. List all law firms, partners, and associates
`4.
`that (a) appeared for the entities in the originating court or agencyor(b) are
`expected to appearin this court for the entities. Do not include those who have
`already entered an appearance in this court. Fed. Cir. R. 47.4(a)(4).
`
`WILMER CUTLER PICKERING HALE AND DORR LLP: Thomas Anderson
`
`Related Cases. Provide the case titles and numbersof any case
`&.
`knownto be pendingin this court or any other court or agency that will directly
`affect or be directly affected by this court’s decision in the pending appeal. Do not
`include the originating case number(s) for this case. Fed. Cir. R. 47.4(a)(5). See
`also Fed. Cir. R. 47.5(b).
`
`None. This Court has identified the following companion cases: Qualcomm
`Inc. v. Intel Corp., 20-1587 (Fed. Cir.); and Intel Corp. v. Qualcomm Inc.,
`No. 20-1664 (Fed. Cir.). These cases do not concern U.S. Patent No.
`8,838,949.
`
`

`

`Case: 20-1828
`
`Document:59
`
`Page:7
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`Filed: 11/16/2020
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`Organizational Victims and Bankruptcy Cases. Provide any
`6.
`information required under Fed. R. App. P. 26.1(b) (organizational victims in
`criminal cases) and 26.1(c) (bankruptcy case debtors and trustees). Fed. Cir. R.
`47.4(a)(6).
`
`None.
`
`Dated: November 16, 2020
`
`/s/ Thomas G. Saunders
`THOMAS G. SAUNDERS
`
`WILMER CUTLER PICKERING
`
`HALE AND DORR LLP
`1875 Pennsylvania Avenue, NW
`Washington, DC 20006
`(202) 663-6000
`
`il
`
`

`

`
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`Case: 20-1828 Page:8_Filed: 11/16/2020Document:59
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`
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`TABLE OF CONTENTS
`
`Page
`
`PATENT CLAIMS AT ISSUE
`
`CERTIFICATE OF INTEREST.00.....0ccccccccccccccccececeeseeeseceeceeeeeseseseeesesenseenseeeseeeseeens i
`
`TABLE OF AUTHORITIES..0.0...00cccccccccccccccceseceseceseceseeeeeeceeceseecseeesseesseeeeeesasenaesvi
`
`STATEMENT OF RELATED CASES .000....0ccccccccccccsccescceneecnsecesecesecesetesseeseeeeseeses 1
`
`JURISDICTIONAL STATEMENT. o..o...ccccccccccccecececeseceeseecseceseeesasesseeeseseseeesseeniees 1
`
`INTRODUCTION 00000. .occcccccccccccccccceseecseecesecesecesecseceseseseecseseseeesaeesasesseenseeeseeeeees 2
`
`STATEMENT OF ISSUES ON APPEALo000...ccccccccccccccc cece ceseceseeeeeeecseceseeeseteeseeses 4
`
`STATEMENTOF THE CASE Lu0....cccccccccccccccccscccsceeseecsecnseceseceseccsecesesesesesesesseeeseeees 5
`
`A.
`
`Be
`
`—Mullti-Processor Systems ..............cccccccccecccccessceessecesseeceseeesseeeesseeesseeeses 5
`
`PUY PU eases cutee raerrag. een ee ene ene erence cneocnnncceeceneoceeecesncensceees 8
`
`1.
`
`2
`
`3,
`
`U.S. Patent No. 7,356,680 (“Svensson’’) ..........0ccccccsseeeseeeeeeeees 8
`
`U.S. Publication No. 2006/0288019 (“Bauer”) ...........0..ceeeee 9
`
`Korean Publication No. 10-2002-0036354 (“Kim”)................ 10
`
`C
`
`The 949 Patent ........cccccccseescescceseceeeeseeeeeeseeeeecaeeeseeseceaeeaeeeseeeeeeaeeaeeas 1]
`
`D.—Intel’s Sales Of Baseband Processors To Apple..........00.0ccceeeeeeeees 16
`
`E
`
`Inter Partes REVICW .0......cccccecccececesceeceesceeececseceseceseceeeeeseeeseeesseeseeeses 18
`
`F. Appeal... cece ccccccccccsecesessseceesseceeeeseesesssecesesseeeceseeseesseesestseeeeeseeeesas 21
`
`SUMMARYOF THE ARGUMENT. ...00.....cccccccccccccscsesceeseeeseecaeenseceseseseeesseenseeeses 22
`
`ARGUMENT. 00... cccccccccccccccccseseeeseeeseeeseecssecesecesecesecussssssesseseseseseeeseeesssesseesseseseseeeees 25
`
`I.
`
`STANDARD OF REVIEW..........::-ceecceesseeeseeeseseeeesceceeeeessceceseeecaeceeseeceeeesneeeneetess 25
`
`lil
`
`

`

`
`
`Case: 20-1828 Page:9_Filed: 11/16/2020Document:59
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`
`
`Il.
`
`THE BOARD IMPROPERLY CONSTRUED THE TERM “HARDWARE
`BUFFER” .......ccccccceecccceccecceccccsccccuccecccccecteccccceccacecenteccecseccecseccecseseeeneececsescees 26
`
`A.
`
`B.
`
`“Hardware Buffer” Means A Buffer Implemented In
`Hata -cccicssccerwsoescvemcanspeesngg........0ccceceseseseecsnncecesscncnenseesseesssesescenseeeses 27
`
`“Hardware Buffer” Does Not Exclude The Use Of A
`Temporary Buffer. ...........0..cc ccc cccccccccececeesaeeececesseseeececsesaseeeeessseeees 30
`
`1.
`
`2.
`
`3)
`
`The preference for avoiding surplusage doesnot
`APPLY 2220222222. o2 2s arableecbbacceaddersldnomnaldaclllaserl Ml aadelereesBlbealllbonceexonees 30
`
`The ’949 patent does not disavow the use of a
`temporary buffer with any clarity .........000ccecceeeseceeeeseeeseeeeeees 32
`
`Even if the patent could be read as disavowing
`prior art techniques, the patent would disclaim
`storing an entire image before scatter loading, not
`using a temporary buffer ...........0 eee ceeccceeeeeeceeeseceeseseeeseseeeees at
`
`Il.
`
`IV.
`
`EVEN UNDER THE BOARD’S CLAIM CONSTRUCTION, THE
`BOARD’S DECISION AS TO CLAIMS |-9 AND 12 CANNOT STAND
`BECAUSE IT LACKS SUBSTANTIAL EVIDENCE sicceescccssesccescecc seco ree cee nsre seeeenu ey 40
`
`THE BOARD DID NoT NEED TO CONSTRUE THE MEANS-PLUS-
`FUNCTION LIMITATIONS IN CLAIMS 16 AND 17 OR,
`ALTERNATIVELY, SHOULD HAVE DECLINED TO REACH A
`DECISION ON THE MERITSIN LIGHT OF THEIR INDEFINITENESS..............:206++ 42
`
`INTEL HAS STANDING TO PURSUE THIS APPEAL ..........::ce::ceeeeeeeesceeeeeeeeeeeeeees 47
`
`A.
`
`Intel Suffers Injury In Fact .........0 cece cece ccceececeesseecessseeeessseeeneaes 48
`
`L
`
`Intel faces the risk of a possible infringement
`allegation by Qualcomm based on Qualcomm’s
`actions against Apple .0..........ccccccccc cece ceeeseeeceessecessseeeeneseeenes 49
`
`Intel’s past, current, and future sales ofits
`baseband processors further demonstrate the risk
`of a possible infringementallegation .........0.000..ccceeeeeeeeeeeeees 53
`
`

`

`
`
`Case: 20-1828|Document:59 Page: 10 Filed: 11/16/2020
`
`
`
`3.
`
`4.
`
`Intel suffers competitive injury from the Board’s
`CECISION ooo... eee ee eeecccceescccecseeecessseeceeseeceesseeecesseceesseceestseeeeesseeeeses 56
`
`Qualcomm’s remaining argumentis meritless...............0000.00... 57
`
`B.
`
`Intel Satisfies The Remaining Requirements Of Article
`NUT SURAT ec sccccocesstsssszuscauccgy.-....00ccsaecceceseccceeeeccessatcecsscccssneccassaceetenees 59
`
`CONCLUSION 7.2... cccccccccccccceccescceesesesecusecseceseeeseesseeceaeeeaeecseecsaeeaeenseeeseeeesesseenseesses 60
`
`ADDENDUM
`
`CERTIFICATE OF COMPLIANCE
`
`

`

`
`
`Case: 20-1828|Document:59 Page:11 Filed: 11/16/2020
`
`
`
`TABLE OF AUTHORITIES
`
`CASES
`
`Page(s)
`
`Adidas AG v. Nike, Inc.,
`963 F.3d 1355 (Fed. Cir, 2020) sccccesccse.. eee ceeecccec cece ceceeesceeseeeseeeseceseeeseees 51, 54
`
`Altaire Pharmaceuticals, Inc. v. Paragon Bioteck, Inc.,
`889 F.3d 1274 (Fed. Cir. 2018), remand order modified by
`stipulation, 738.F. App’ 1017 (Ped. Cir. 2018) sssccisseccccesccrererrecsescest 51, 54, 55
`
`AstraZeneca LP vy. Breath Lid., 542 F. App’x 971 (Fed. Cir. 2013)
`(nonprecedential), as amended on reh’g in part (Dec. 12, 2013) wo... eee eeeeeeeee 35
`
`Aventis Pharma S.A. v. Hospira, Inc.,
`675 F.3d 1324 (Fed. Cir. 2012) oo... ccccccccescsessceseeeseeeeneeeaeessceeseecsaeenseenseens 34
`
`AVX Corp. v. Presidio Components, Inc.,
`923 F.3d 1357 (Fed. Cir. 2019) .0.... cece cesccesscesscesceesseeesecsseeetsesenes 54-55, 56, 57
`
`Cardiac Pacemakers, Inc. v. St.Jude Medical, Inc.,
`296 F.3d 1106 (Fed. Cir, 2002) ..0.......0....cceeceeccsescesstessseenseenseensteenecenseeeesens 42, 43
`
`Cardinal Chemical Co. v. Morton International, Inc.,
`BOS WSS C1998 cs csestieewiaacdivniiveceamamlavenl deen vrstineliswelivecttvmvasnateuccdereens 58
`
`Cochlear Bone Anchored Solutions AB v. Oticon Medical AB,
`958 F.3d 1348 (Fed. Cir. 2020) ooo... ccccccccecscecsecesececeeceseeesseeaeesseenseenseees 46
`
`Continental Circuits LLCv. Intel Corp.,
`915 F.3d 788 (Fed. Cir.), cert. denied, 140 S. Ct. 648 (2019).......... 32, 34, 35,37
`
`Decisioning.com, Inc. v. Federated Department Stores, Inc.,
`S27 B30. 1200( Bed. Cir. DOS) sccccccucsnstsnnuncwasncteccncnmea westerners 31
`
`EI. DuPont de Nemours & Co. v. Synvina CLV.,
`904 F.3d 996 (Fed. Cir. 2018) ....cccccccecccccccceesceseceseeseeeceseenseeseeseeeaees 51, 54, 59
`
`Exelis Inc. v. Cellco Partnership,
`C.A. No. 09-190-LPS, 2012 WL 5289709 (D. Del. Oct. 9, 2012)... 53
`
`v1
`
`

`

`Case: 20-1828
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`Document:59
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`Page: 12
`
`Filed: 11/16/2020
`
`Game & Technology Co. v. Wargaming Group Lid.,
`942 F.3d 1343 (Fed. Cir. 2019) ........ccccc cc ccccsccssesscsssceseescesscseecessesceeseseeseaeenseees 26
`
`General Electric Co. v. United Technologies Corp.,
`928 F.3d 1349 (Fed. Cir. 2019) ooo... cccceecesecceseceseceseceeeeseeesseeesseeeeesaes 56, 57
`
`Grit Energy Solutions, LLC v. Oren Technologies, LLC,
`O57 Fidd 1sUO (Fed, Ci 2020) sess ccenecsenaumnmenncecmmmanucmsseniseurtpassim
`
`Hamilton Beach Brands, Inc. v. freal Foods, LLC,
`908 F.3d 1328 (Fed. Cir. 2018) 0.0.0... ec ccccccc cece ceeccesseeeseceneeeseeecseeeseecseecnseenseens 25
`
`Icon Health & Fitness, Inc. v. Strava, Inc.,
`849 F.3d 1034 (Fed. Cir. 2017) cccesuvccswsneviovesenrnsetonsunsuscerceunseninanavenenecnnened 26, 42
`
`Innova/Pure Water, Inc. v. Safari Water Filtration Systems, Inc.,
`381 F.3d L111 (Fed. Cir. 2004) oo.ccc cccesecesseeceseeeesseeesseeesseeessees 37
`
`JTEKT Corp. v. GKN Automotive LTD.,
`$98 F.3d 1217 (Ped, Cir. 2018) o....cccccc... cee eeececeeecceeeeesesnceenseessneessaseesneersaes 47, 48
`
`Lujan v. DefendersofWildlife,
`SOA, WS: SES (1992) i scccncoseenseacnoseicscoevssessesssecesnecsnssessscssscsascesscesncescessessnensnacesssees A8
`
`Markman v. Westview Instruments, Inc.,
`52 F.3d 967 (Fed. Cir. 1995) (en banc) o.oo. eee c cece cc ceeeessceeeceesssaeeeceesssaeeees 31
`
`Marx v. General Revenue Corp.,
`568 U.S. 371 (2013) ccccccsssscsccccsssssessesssssseessesssssvessesssssvessssssssseesesssssusesseesssseeeseesse 31
`
`MedImmune, Inc. v. Genentech, Inc.,
`AD TS DES (2007 J ccvsccescscsvaccesevutesucds-..-------seecceeeecceseccecooensascececesensenees 48, 58, 59
`
`Merck & Co. v. Teva Pharmaceuticals USA, Inc.,
`395 F.3d 1364 (Fed. Cir. 2005) oo... cccccccccccccccccceseceseceseeensecnseenseeeeeees 27, 28, 30
`
`Mullaney v. Anderson,
`BAD UALS C12) oeseicssnecscnennncsenncninntes-ececceeccesccececseescceseeeseeececceescenseteaeeseeecerees 60
`
`Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co. Matal,
`868 F.3d 1013 (Fed. Cir. 2017) .....cccccccccccccccccccscesseecseeesececeecesecessecesenseenseenseees 44
`
`Vil
`
`

`

`
`
`Case: 20-1828|Document:59 Page: 13 Filed: 11/16/2020
`
`
`
`Penda Corp. v. United States,
`44 F Bd 967 (Fed. Cit: 1994) wcccccccsscsic....scceccceccescsessecesscenseseesessescesscnsessensnsennees 55
`
`Pickholtz v. Rainbow Technologies, Inc.,
`284 F.3d 1365 (Fed. Cir, 2002) oo... cceeeceecceecceecceesceeseeescecsceceeesseenseenseeees 30-31
`
`Power Mosfet Technologies, L.L.C. v. Siemens AG,
`Seine ee tres, ON 20) uo cncmncuxerennem 31
`
`Pride Mobility Products Corp. v. Permobil, Inc.,
`$18. F.3d 1307 (Fed, Cir 2016) vascccisice.. cece cece cccecceceeccesccnseceseceseeenneeeneeeseeees 26
`
`Realtime Data, LLCv. Iancu,
`912 F.3d 1368 (Fed. Cir. 2019) ou... ccccceccceccessssteesessecessssceeusescsecusseusesssensessseenes ei,
`
`Samsung Electronics Amserica, Inc. v. Prisua Engineering Corp.,
`948 F.3d 1342 (Fed. Cir. 2020) oo... eecccceescesecseeeeeeeseeeeeeseeneeeaeeeseneeenees 4,45, 46
`
`SciMedLife Systems, Inc. v. Advanced Cardiovascular Systems, Inc.,
`242 F.3d 1337 (Fed. Cir. 2001)... eee cccccccesscnecsceecceeseeseseeeseeeeseenee 35, 36, 37
`
`SimpleAir, Inc. v. Sony Ericsson Mobile Communications AB,
`820 F.3d 419 (Fed. Cir. 2016) .......ccccccccccccccccccceseceeseecssecesseeceseeeessecesseeesseeessees 30
`
`Spokeo, Inc. v. Robins,
`136 S.Ct. 1540 (2016)... cecccsssensncanessccceecceeccesccesccecccscceececsenceescesseesseeseseseseeees 47
`
`Takeda Pharmaceutical Co. Ltd. v. Array Biopharma Inc.,
`720 F. App’x 620 (Fed. Cir. 2017) (nonprecedential)...............00ccceeeee eens 42
`
`Thorner v. Sony Computer Entertainment America LLC,
`669 F.3d 1362 Wed, Cit, 2012) scscscsscvscseusccctcnsonssisamvansncanameraienaswenes 32,357
`
`Trustees of Columbia University in City ofNew York v. Symantec Corp.,
`811 F.3d 1359 (Fed. Cir, 2016) o..cccciccccccececccccceseessecsseeseesseeseceseeseeeseeseeneenseens 39
`
`Unwired Planet, LLCv. Apple Inc.,
`829 F.3d 1353 (Fed. Cir. 2016) ooo... cccccccc ccc cccscecseceseeesececseeeseecseeesssenseeneenseees 34
`
`STATUTES, REGULATIONS, AND RULES
`
`2S U.S.C. § 1295(a)(A)(A) cerecccccsssvseesscessssesscesssseesssessssssesssssssssessssssssseesssssteseessessneeees 1
`
`vill
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`

`

`
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`Case: 20-1828|Document:59 Page: 14~Filed: 11/16/2020
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`35 U.S.C.
`§ LOB cece cc ccc cece cccscecseecseecssecssecssecesecsecsssessessesesesesseessecseesesesecesesesseesseenseeees 18
`S LDQ(fyic ccc ceseceseceseceseeesseessecssseseeeeseseseseseeeseecsseessesesesesesesesesseeeseeeas 46
`§ 112,96 (2011) ooo cece ccc ccreeceecseceseceseeessesnseeeseseseseseeesseenseeees 18, 21, 42
`S LAL (C) occ cece ccc ccceeeeseecseeesaecssecssecesesesesssesesseeeseseseseseseseeesseesseesseeseeees 1,47
`§ DT71(D), (C) ceceecceeccccsccesceececsceeeeceseccseecsaeesseesecesecesseeeeeeseeeeseeeseecsseesaeesseeneenseeees 52
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`
`Case: 20-1828|Document:59 Page: 15_Filed: 11/16/2020
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`STATEMENT OF RELATED CASES
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`No other appeal in or from the same proceeding was previously before this
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`or any other appellate court. Qualcomm Incorporated (“Qualcomm’’) previously
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`asserted U.S. Patent No. 8,838,949 (the “949 patent’) against various Apple Inc.
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`(“Apple”) products that contain baseband processors manufactured by Intel Corp.
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`(“Intel”) in Qualcomm Inc. v. Apple Inc., No. 3:17-cv-01375 (S.D. Cal.), and
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`Certain Mobile Electronic Devices and Radio Frequency and Processing
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`Components Thereof, Inv. No. 337-TA-1065 (International Trade Commission).
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`Thosecases are no longer pending.
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`This Court has identified the following companion cases: QualcommInc.v.
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`Intel Corp., No. 20-1587 (Fed. Cir.); and Intel Corp. v. Qualcomm Inc., No. 20-
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`1664 (Fed. Cir.). These cases do not concern the ’949 patent.
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`JURISDICTIONAL STATEMENT
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`Intel appeals from the Board’s final written decision in an inter partes review
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`(“IPR”). The Board had jurisdiction pursuant to 35 U.S.C. § 314. The Board
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`enteredits final written decision on March 16, 2020, and Intel filed a timely notice
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`of appeal on May 15, 2020. Appx1-65; Appx4581-4584. This Court has
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`jurisdiction pursuant to 28 U.S.C. § 1295(a)(4)(A) and 35 U.S.C. § 141(c).
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`

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`Case: 20-1828|Document:59 Page: 16 Filed: 11/16/2020
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`
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`INTRODUCTION
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`Intel manufactures baseband processors used in electronic devices. When
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`Intel began supplying its baseband processors to Apple, Qualcomm brought two
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`proceedings against Apple claiming infringementof its ’949 patent. Central to
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`Qualcomm’s infringement case was Apple’s use of Intel’s baseband processors—
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`which Qualcommalleged was the “secondary processor” claimedin the ’949
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`patent. While those proceedings were ongoing, Intel initiated an IPR, naming Intel
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`and Apple as the real-parties-in-interest and challenging all claims of the patent as
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`obvious. The Board found numerousclaims of the ’949 patent obvious and thus
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`unpatentable, but determined that Intel had not shownclaims1-9, 12, and 16-17 to
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`be unpatentable based on an erroneous understanding of this Court’s precedent and
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`the patent. The Court should reverse or vacate and remand on claims 1-9, 12, and
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`16-17.
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`The Board’s ruling as to claims 1-9 and 12 turned principally on its
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`construction of “hardware buffer’—a term that, as the Board acknowledged, the
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`’949 patent does not define and rarely mentions. Under the broadest reasonable
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`interpretation, “hardware buffer” has the ordinary meaning of a buffer
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`implemented in hardware. The Board agreed with that construction initially, but
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`changedits view in the final written decision on the ground that the patent
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`specification distinguishes the disclosed loading techniques from priorart
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`Case: 20-1828|Document:59 Page:17 Filed: 11/16/2020
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`
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`techniques that use temporary buffers and thus “hardware buffer” does not
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`encompassthe use of a temporary buffer. But the two statements in the
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`specification on which the Board relied do not disavow the use of a temporary
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`buffer with any clarity, as required by this Court. For that reason alone, the Court
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`should vacate the Board’s ruling.
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`In any event, if those statements disclaim
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`anything,it is the prior art’s copying of an entire software image into a buffer, not
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`the use of a temporary buffer.
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`Evenif the Court were to agree with the Board’s construction, the Board’s
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`decision as to claims 1-9 and 12 is unsupported by substantial evidence. The
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`Board found that Intel had not shown those claims to be obvious under the Board’s
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`construction of “hardware buffer,” because the intermediate storage area in
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`Svensson and Baueris a “temporary buffer.” But the only evidence the Board
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`cited for that finding wasthat the intermediate storage area in those priorart
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`references is reserved at runtime of the program loaderto receive information to be
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`transferred to the system memoryfor later execution. The Board cited no evidence
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`that the intermediate storage area is deallocated, to be used for another purpose at a
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`later time, which is necessary to make a buffer “temporary.”
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`The Boardalso erred in ruling against Intel on claims 16 and 17. Although
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`claims 16 and 17 contain means-plus-function limitations, the *949 patentfails to
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`disclose a corresponding structure, and on that basis, the Board found that Intel had
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`

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`Case: 20-1828
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`Document:59
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`Page: 18
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`Filed: 11/16/2020
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`failed to meet its burden to show unpatentability. As an initial matter, the Board
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`should have reached the unpatentability of claims 16 and 17 despite the lack ofa
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`corresponding structure, because as Intel and Qualcomm agreed,it was
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`unnecessary to construe the means-plus-function terms in assessing the claims’
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`validity. Further, to the extent the Board found claims 16 and 17 indefinite, the
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`Board should have declined to find Intel responsible for the patent’s failure to
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`disclose a corresponding structure, so that Intel would not be estopped under 35
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`U.S.C. § 315(e) from challenging those claims in other proceedings. See Samsung
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`Elecs. Am., Inc. v. Prisua Eng’g Corp., 948 F.3d 1342, 1353 & n.3 (Fed. Cir.
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`2020).
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`Finally, Intel has standing to appeal. Intel suffers injury in fact becauseit
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`faces a concrete, particularized, and sufficiently imminent risk that Qualcomm
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`would allege infringement or use the ’949 patent to constrain Intel’s andits
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`customers’ actions. Qualcomm has already sued Apple precisely because Apple
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`began using Intel’s baseband processorsin its devices, and much of Qualcomm’s
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`infringementcaseat trial focused on Intel components, documents, and software.
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`STATEMENT OF ISSUES ON APPEAL
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`le
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`Whether the Board misconstrued the “hardware buffer” limitation
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`recited in claims 1-9 and 12 of the 949 patent.
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`Case: 20-1828|Document:59 Page: 19_Filed: 11/16/2020
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`2. Whether even under the Board’s incorrect construction of “hardware
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`buffer,” the Board’s decision is not supported by substantial evidence.
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`a.
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`Whetherit was necessary for the Board to construe the means-plus-
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`function terms in claims 16 and 17 and, if so, whether the Board should have
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`declined to rule on the merits upon determining that the ’949 patent fails to
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`disclose the necessary correspondingstructure.
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`4.
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`WhetherIntel has standing to appeal the Board’s final written decision
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`regarding the patentability of the ’949 patent.
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`STATEMENT OF THE CASE
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`A.
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` Miulti-Processor Systems
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`The ’949 patent generally relates to multi-processor systems in which
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`software stored in the memory of one processor1s loaded to another processorto
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`be executed. Multi-processor systems are common in modern computing devices
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`becausethey allow each processor to handle different responsibilities. A mobile
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`phone, for example, may include a (1) baseband/modem processorresponsible for
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`communicating with a base station, and (2) an application processor responsible
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`for running applications and other computer programs(e.g., email, text messaging,
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`GPS applications). Appx1015-1016; see Appx73(1:41-44). The processors
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`communicate with each other by sending data over a “bus,” typically a set of wires
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`over whichelectrical signals are sent. Appx1017.
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`Case: 20-1828|Document:59 Page: 20_Filed: 11/16/2020
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`A processor operates by executing software code that instructs the processor
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`to perform specific operations. Appx1019. “Boot code”instructs the processorto
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`perform certain initialization operations.
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`/d. After a processor executes its boot
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`code, it typically executes “program code”that instructs the processor to perform
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`various operations. Jd. For example, the program codein a baseband/modem
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`processor mayinstructit to transfer received data to the application processor so
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`that the user can view the data in an email or other application. Jd.
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`Software code is stored in two basic types of memory: non-volatile memory
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`and volatile memory. Appx1020. Non-volatile memory, sometimescalled
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`persistent memory,is suitable for long-term storage because it can store code and
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`data regardless of whether poweris being applied to the memory.
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`/d. Common
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`types of non-volatile memory include flash memory and read-only memory
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`(“ROM”). Appx1021; see Appx73(1:51-56).
`
`Volatile memory can store code and other data only when poweris being
`
`applied to the memory. Appx1020. Volatile memory is suitable for short-term
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`storage and typically allows for code and data to be quickly retrieved from the
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`memory, thereby increasing system performance. Appx1021. Examples of
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`volatile memory include random access memory (“RAM”), dynamic RAM
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`(“DRAM”), and static RAM (“SRAM”). Id.
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`Case: 20-1828
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`Document:59
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`Page:21
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`Filed: 11/16/2020
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`Software code is often packaged and stored in memory asa softwarefile or
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`program called an “executable software image.” Appx1022. A software imageis
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`typically stored, at least initially, in non-volatile memory before being transferred
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`to volatile memory for execution. Appx1021. Volatile memory to which an
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`executable software image is loaded and from which the loaded image is executed
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`by a processoris often referred to as “system memory.” Appx1022.
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`Executable software images may include (1) a header that contains
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`information about the overall image or the underlying data and (2) a payload
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`consisting of data segments that contain the code or other data used by the image.
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`Appx1022; see Appx73(2:14-16); Appx74(4:34-42). For a processor to execute
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`those images, it usually must read the information in the header and then use that
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`information to load the data segments to the proper locations in system memory for
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`execution. Appx1022. One well-known technique for loading an executable
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`image is “scatter loading,” which loads or scatters segments of an image into
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`system memory. Appx1023; see Appx49 (Qualcomm’s expert noting that ““the
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`general concept of scatter loading was knownprior to the ’949 patent””).
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`Whena multi-processor system is first powered on, one or more processors
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`typically load and execute boot code. Appx1025-1026; Appx73(1:38-44, 51-56).
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`Each processorcan store its own boot code. Appx1025. Alternatively, a
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`processor’s boot code may bestored in a non-volatile memory coupledto a
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`Case: 20-1828|Document:59 Page: 22 Filed: 11/16/2020
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`
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`different processor to reduce costs and save space. See Appx73(2:9-13);
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`Appx1026.
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`In that case, the boot codeis retrieved from that other processor’s non-
`
`volatile memory and loaded into and executed from the receiving processor’s
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`system memory. See Appx73(2:9-13); Appx1026-1027.
`
`B.
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`Prior Art
`
`Before the ’949 patent, multiple prior art references disclosed methods of
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`scatter loading an executable software image from oneprocessor to another
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`processor’s system memory in a multi-processor system.
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`1.
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`U.S. Patent No. 7,356,680 (“Svensson”)
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`Svensson describes a multi-processor system in which data blocks of an
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`image are loaded from a host processorto a client processor. Appx19.
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`Non-Volatile
`Memory
`
`———e eee ee a a aa a a a aee
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`hen+-
`a— 100
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`
`
`DSP
`Int.
`Store;
`SARAM
`
`
`Area |'& DARAM
`
`
`108
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`FIG. 1
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`Appx20; Appx1280; Appx1041.
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`Figures | discloses a device that includes a host processor (ARM CPU 102)
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`coupled to a non-volatile memory (106) and a digital signal processor (DSP)
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`

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`Case: 20-1828|Document:59 Page: 23 Filed: 11/16/2020
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`
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`device. Appx1285(3:49-63, 4:3-5). The DSP device includes a client processor
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`(DSP CPU 104) andinternal volatile memory (single-access RAM and dual-access
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`RAM 108), as well as an external RAM (XRAM 110). Appx1285(3:64-4:3);
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`Appx20. A block of memory is reserved within the internal volatile memory (108)
`
`as an intermediate storage area. Appx1285(3:64-4:3); Appx20-21.
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`Svenssondiscloses a technique for sending data blocks from the host
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`processorto the client processor’s XRAM. Appx2