Intel Corporation
`v.
`Qualcomm Incorporated
`IPR2018-01152
`IPR2018-01153
`IPR2018-01154
`IPR2018-01240
`U.S. Patent No. 8,698,558
`
`Patent Owner’s Demonstrative Exhibits
`
`1
`
`
`v.
`Qualcomm Incorporated
`IPR2018-01152
`IPR2018-01153
`IPR2018-01154
`IPR2018-01240
`U.S. Patent No. 8,698,558
`
`Patent Owner’s Demonstrative Exhibits
`
`1
`
`
`
`U.S. Patent No. 8,698,558
`
`2
`
`Ex. 1001, Fig. 5 (emphasis added)
`
`
`
`Contested Grounds
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`IPR2018-01154, Ground I: Claims 15, 17-18, and 20 as anticipated by Kwak
`IPR2018-01154, Ground II: Claim 16 as obvious in view of Kwak
`
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`IPR2018-01153, Ground I: Claims 6 and 8 as obvious over Chu combined with Choi
`•
`IPR2018-01153, Ground II: Claims 1-9 as obvious over Chu combined with Choi and Myers
`•
`IPR2018-01240, Ground I: Claim 10 as obvious over Chu combined with Choi and Hanington
`•
`IPR2018-01240, Ground II: Claim 11 as obvious over Chu combined with Choi, Hanington
`and Myers
`IPR2018-01152, Ground III: Claim 13 as obvious over Chu combined with Choi
`IPR2018-01152, Ground IV: Claim 13 as obvious over Chu combined with Choi and Myers
`IPR2018-01154, Ground III: Claim 19 as obvious over Kwak combined with Choi
`IPR2018-01152, Paper 16 at 19-44;
`IPR2018-01153, Paper 16 at 19-49;
`IPR2018-01154, Paper 16 at 17-43;
`IPR2018-01240, Paper 16 at 21-50.
`
`•
`•
`•
`
`3
`
`
`
`Patentability
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`
`I.
`•
`•
`
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`IPR2018-01152, Paper 16 at 19-44;
`IPR2018-01153, Paper 16 at 19-49;
`IPR2018-01154, Paper 16 at 17-43;
`IPR2018-01240, Paper 16 at 21-50.
`
`4
`
`
`
`Patentability
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`5
`
`IPR2018-01154, Paper 16 at 24-33
`
`
`
`’558 Patent – Claim 15
`15. An apparatus comprising:
`an inductor operative to receive a switching signal
`and provide a supply current;
`a switcher operative to sense an input current and
`generate the switching signal to charge and
`discharge the inductor to provide the supply
`current, the switcher adding an offset to the input
`current to generate a larger supply current via the
`inductor than without the offset, wherein the
`switcher comprises
`a summer operative to sum the input current and
`an offset current and provide a summed current,
`a current sense amplifier operative to receive the
`summed current and provide a sensed signal, and
`a driver operative to receive the sensed signal and
`provide at least one control signal used to generate
`the switching signal for the inductor.
`6
`
`IPR2018-01154, Paper 22 at 13-14;
`Ex. 1201, Fig. 5
`
`
`
`Kwak’s Fig. 5 and Fig. 6 Are Different Embodiments
`
`7
`
`IPR2018-01154, Petition at 42-45;
`Paper 16 at 19-20
`
`
`
`Kwak’s Fig. 5
`
`Kwak’s Fig. 5
`
`
`
`Fig. 5. Hybrid switching amplifier with the feedforward path.
`
`Fig. 6 shows the detailed circuit of the hybrid switching
`
`amplifier.
`
`In CMOS design, a/though three voltage
`
`signals can be added and thenintegrated as shownin Fig.
`
`4 and 5, the simultaneous summation and integration of
`
`the signals at the node Vc, after the conversion of the
`
`three voltage signals into current ones, is advantageous,
`
`that is, the sensed output current of the linear amplifier,
`
`the feedforward current, and the high-frequency current
`
`throughthe ripplefilter are added together and integrated
`
`at the node with the inverted polarity of the last one.
`IPR2018-01154, Paper 22 at 14;
`Ex. 1211 at 2668-69
`
`8
`
`IPR2018-01154, Paper 22 at 14;
`
`
`
`Petitioner Improperly Combines Figs. 5 and 6
`
`“[A]nticipation is not proven by multiple,
`distinct teachings that the artisan might
`somehow combine to achieve the claimed
`invention.” Microsoft Corp. v. Biscotti, Inc.
`878 F.3d 1052, 1069 (Fed. Cir. 2017)
`
`“If [the reference] does not expressly spell
`out all the limitations arranged or combined
`as in the claim” it can only anticipate “if a
`person of skill in the art, reading the
`reference, would at once envisage the claimed
`arrangement or combination.” Id.
`
`9
`
`IPR2018-01154, Paper 16 at 18.
`
`
`
`Patentability
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`10
`
`IPR2018-01154, Paper 16 at 17-24.
`
`
`
`’558 Patent – Claim 15
`15. An apparatus comprising:
`an inductor operative to receive a switching
`signal and provide a supply current;
`a switcher operative to sense an input current and
`generate the switching signal to charge and
`discharge the inductor to provide the supply
`current, the switcher adding an offset to the input
`current to generate a larger supply current via the
`inductor than without the offset, wherein the
`switcher comprises
`a summer operative to sum the input current and
`an offset current and provide a summed current,
`a current sense amplifier operative to receive the
`summed current and provide a sensed signal, and
`a driver operative to receive the sensed signal
`and provide at least one control signal used to
`generate the switching signal for the inductor.
`
`11
`
`IPR2018-01154, Paper 16 at 7, 25
`Ex. 1201, Fig. 5
`
`
`
`Kwak
`
`12
`
`Ex. 1211, Figs. 2(a) and 3(a);
`IPR2018-01154, Paper 16 at 25-26
`(citing Ex. 1211 at 2666).
`
`
`
`Kwak
`
`13
`
`IPR2018-01154, Paper 16 at 19
`(citing Ex. 1211, Fig. 5); Id. at 25-26
`(citing Ex. 1211 at 2669).
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (id)
`
`Petitioner’s Anticipation Argument:
`“because io=ia+id, and because io
`remains constant, any decrease in ia
`must be offset by an increase in id”
`
`14
`
`IPR2018-01154, Paper 19 at 19 (emphasis added).
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (id)
`
`Petitioner’s Anticipation Argument:
`“because io=ia+id, and because io
`remains constant, any decrease in ia
`must be offset by an increase in id”
`
`15
`
`IPR2018-01154, Paper 22 at 9.
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (Id)
`
`16
`
`Ex. 1211, Fig. 11.
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (id)
`
`17
`
`IPR2018-01154, Paper 22 at 6.
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (Id)
`
`18
`
`IPR2018-01154, Paper 22 at 6.
`
`
`
`Kwak Does Not Teach Increasing
`Inductor Current (id)
`The Magnitude of (id)
`does not necessarily
`increase as a result of a
`decrease in the
`magnitude of (ia).
`
`IPR2018-01154, Paper 16 at 28-
`29 (citing passages from Ex. 2002
`that include Examples 1-3).
`
`19
`
`
`
`Patentability
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`IPR2018-01152, Paper 16 at 19-25;
`IPR2018-01153, Paper 16 at 19-29;
`IPR2018-01154, Paper 16 at 35-41;
`IPR2018-01240, Paper 16 at 21-31.
`
`20
`
`
`
`Selective Boost
`
`Ex. 1101, 5:31-33;
`IPR2018-01153, Paper 16 at 7.
`
`Ex. 1101, 8:55-62;
`IPR2018-01153, Paper 16 at 25.
`
`21
`
`IPR2018-01153, Paper 16 at 28.
`
`
`
`’558 Patent – Claim 1
`1. An apparatus comprising:
`a boost converter operative to receive a first supply voltage and generate a boosted supply
`voltage having a higher voltage than the first supply voltage; and
`an envelope amplifier operative to receive an envelope signal and the boosted supply voltage and
`generate a second supply voltage based on the envelope signal and the boosted supply voltage,
`wherein the envelope amplifier is operative to further receive the first supply voltage and
`generate the second supply voltage based on the first supply voltage and generate the second
`supply voltage based on the first supply voltage or the boosted supply voltage, and further
`wherein the envelope amplifier comprises
`an operational amplifier (op-amp) operative to receive the envelope signal and provide an
`amplified signal,
`a driver operative to receive the amplified signal and provide a first control signal and a second
`control signal,
`a P-channel metal oxide semiconductor (PMOS) transistor having a gate receiving the first
`control signal, a source receiving the boosted supply voltage or the first supply voltage, and a
`drain providing the second supply voltage, and
`an N-channel metal oxide semiconductor (NMOS) transistor having a gate receiving the second
`control signal, a drain providing the second supply voltage, and a source coupled to circuit
`ground.
`
`22
`
`Ex. 1101, 10:58-11:18; IPR2018-01153,
`Paper 3, pp. 62-75
`
`
`
`Contested Grounds
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`IPR2018-01154, Ground I: Claims 15, 17-18, and 20 as anticipated by Kwak
`IPR2018-01154, Ground II: Claim 16 as obvious in view of Kwak
`
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`IPR2018-01153, Ground I: Claims 6 and 8 as obvious over Chu combined with Choi
`•
`IPR2018-01153, Ground II: Claims 1-9 as obvious over Chu combined with Choi and Myers
`•
`IPR2018-01240, Ground I: Claim 10 as obvious over Chu combined with Choi and Hanington
`•
`IPR2018-01240, Ground II: Claim 11 as obvious over Chu combined with Choi, Hanington
`and Myers
`IPR2018-01152, Ground III: Claim 13 as obvious over Chu combined with Choi
`IPR2018-01152, Ground IV: Claim 13 as obvious over Chu combined with Choi and Myers
`IPR2018-01154, Ground III: Claim 19 as obvious over Kwak combined with Choi
`IPR2018-01152, Paper 16 at 19-44;
`IPR2018-01153, Paper 16 at 19-49;
`IPR2018-01154, Paper 16 at 17-43;
`IPR2018-01240, Paper 16 at 21-50.
`
`•
`•
`•
`
`23
`
`
`
`’558 Patent – Claim 6
`6. An apparatus for wireless communication, comprising:
`a power amplifier operative to receive and amplify an input radio frequency
`(RF) signal and provide an output RF signal; and
`a supply generator operative to receive an envelope signal and a first supply
`voltage, to generate a boosted supply voltage having a higher voltage than the
`first supply voltage, and to generate a second supply voltage for the power
`amplifier based on the envelope signal and the boosted supply voltage,
`wherein the supply generate incorporates an operational amplifier (op-amp)
`operative to receive the envelope signal and provide an amplified signal, a
`driver operative to receive the amplified signal and provide a first control
`signal and a second control signal, a P-channel metal oxide semiconductor
`(PMOS) transistor having a gate receiving a first control signal, a source
`receiving the boosted supply voltage or the first supply voltage, and an N-
`channel metal oxide semiconductor (NMOS) transistor having a gate
`receiving the second control signal, a drain providing the second supply
`voltage, and a source coupled to circuit ground.
`Ex. 1101, 11:42-63;
`24
`IPR2018-01153, Paper 16 at 19.
`
`
`
`’558 Patent – Claim 6
`6. An apparatus for wireless communication, comprising:
`a power amplifier operative to receive and amplify an input radio
`frequency (RF) signal and provide an output RF signal; and
`a supply generator operative to receive an envelope signal and a
`first supply voltage, to generate a boosted supply voltage having
`a higher voltage than the first supply voltage, and to generate a
`second supply voltage for the power amplifier based on the
`envelope signal and the boosted supply voltage, wherein the
`supply generate incorporates an operational amplifier (op-amp)
`operative to receive the envelope signal and provide an amplified
`signal, a driver operative to receive the amplified signal and
`provide a first control signal and a second control signal, a P-
`channel metal oxide semiconductor (PMOS) transistor having a
`gate receiving a first control signal, a source receiving the
`boosted supply voltage or the first supply voltage, and an N-
`channel metal oxide semiconductor (NMOS) transistor having a
`gate receiving the second control signal, a drain providing the
`second supply voltage, and a source coupled to circuit ground.
`
`25
`
`IPR2018-01153, Paper 16 at 21.
`
`
`
`’558 Patent – Claim 8
`8. A method of generating supply voltages, comprising:
`generating a boosted supply voltage based on a first supply voltage, the
`boosted supply voltage having a higher voltage than the first supply voltage;
`and
`generating a second supply voltage based on an envelope signal and the
`boosted supply voltage, wherein the second supply voltage is generated by an
`envelope amplifier that produces the second supply voltage using an
`operational amplifier (op-amp) that receives the envelope signal and provides
`an amplified signal, a driver that receives the amplified signal and provides a
`first control signal and a second control signal, a P-channel metal oxide
`semiconductor (PMOS) transistor that receives the first control signal, a
`source that receives the boosted supply voltage or the first supply voltage, and
`a drain providing the second supply voltage and an N-channel metal oxide
`semiconductor (NMOS) transistor that receives the second control signal at a
`gate and provides a second supply voltage through a drain, and a source for
`circuit grounding.
`Ex. 1101, 12:1-20;
`IPR2018-01153, Paper 16 at 19.
`
`26
`
`
`
`’558 Patent – Claim 10
`10. An apparatus for generating supply voltages, comprising:
`means for generating a boosted supply voltage based on a first supply voltage,
`the boosted supply voltage having a higher voltage than the first supply
`voltage; and
`means for generating a second supply voltage based on the envelope signal
`and the boosted supply voltage, wherein the means for generating the second
`supply voltage incorporates an envelope amplifier that produces the second
`supply voltage using an operational amplifier (op-amp) that receives the
`envelope signal and provides an amplified signal, a driver that receives the
`amplified signal and provides a first control signal and a second control
`signal, a P-channel metal oxide semiconductor (PMOS) transistor that
`receives the first control signal, a source that receives the boosted supply
`voltage or the first supply voltage, and a drain providing the second supply
`voltage and an N-channel metal oxide semiconductor (NMOS) transistor that
`receives the second control signal at a gate and provides a second supply
`voltage through a drain, and a source for circuit grounding.
`Ex. 1301, 12:25-45
`27
`IPR2018-01240, Paper 16 at 21.
`
`
`
`’558 Patent – Claim 13
`13. The apparatus of claim 12, further comprising: a boost converter operative
`to receive the first supply voltage and provide a boosted supply voltage
`having a higher voltage than the first supply voltage, wherein the envelope
`amplifier operates based on the first supply voltage or the boosted supply
`voltage.
`
`28
`
`Ex. 1001, 13:9-14;
`IPR2018-01152, Paper 16 at 19.
`
`
`
`’558 Patent – Claim 19
`19. The apparatus of claim 18, further comprising:
`a boost converter operative to receive the first supply voltage and provide a
`boosted supply voltage having a higher voltage than the first supply voltage,
`wherein the envelope amplifier operates based on the first supply voltage or
`the boosted supply voltage.
`
`29
`
`Ex. 1201, 14:22-27;
`IPR2018-01154, Paper 16 at 35.
`
`
`
`Selective Boost – District Court’s Order
`
`30
`
`Ex. 1126 at 5-6;
`IPR2018-01153, Paper 22 at 3-4.
`
`
`
`’558 Patent – Claim 7
`6. An apparatus for wireless communication, comprising:
`a power amplifier operative to receive and amplify an input radio frequency (RF)
`signal and provide an output RF signal; and
`a supply generator operative to receive an envelope signal and a first supply voltage, to
`generate a boosted supply voltage having a higher voltage than the first supply
`voltage, and to generate a second supply voltage for the power amplifier based on the
`envelope signal and the boosted supply voltage, wherein the supply generate
`incorporates an operational amplifier (op-amp) operative to receive the envelope
`signal and provide an amplified signal, a driver operative to receive the amplified
`signal and provide a first control signal and a second control signal, a P-channel metal
`oxide semiconductor (PMOS) transistor having a gate receiving a first control signal, a
`source receiving the boosted supply voltage or the first supply voltage, and an N-
`channel metal oxide semiconductor (NMOS) transistor having a gate receiving the
`second control signal, a drain providing the second supply voltage, and a source
`coupled to circuit ground.
`7. The apparatus of claim 6, wherein the supply generator is operative to generate the
`second supply voltage based on the envelope signal and either the boosted supply
`voltage or the first supply voltage.
`
`31
`
`Ex. 1001, 11:42-67;
`IPR2018-01153, Paper 2 at 4.
`
`
`
`Patentability
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`32
`
`IPR2018-01152, Paper 16 at 32-44;
`IPR2018-01153, Paper 16 at 36-48;
`IPR2018-01240, Paper 16 at 38-50.
`
`
`
`The POSA Would Not Combine Myers with Choi
`
`Ex. 1006, Fig. 5
`
`Ex. 1012, Fig. 2
`
`IPR2018-01152, Paper 16 at 32-44;
`IPR2018-01153, Paper 16 at 36-48;
`IPR2018-01240, Paper 16 at 38-50
`
`33
`
`
`
`The POSA Would Not Combine Myers with Choi
`
`IPR2018-01153, Paper 16 at 37-38.
`
`34
`
`
`
`The POSA Would Not Combine Myers with Choi
`
`IPR2018-01153, Paper 16 at 36-38;
`Paper 22 at 11-12.
`
`35
`
`
`
`Patentability
`
`I.
`•
`•
`
`SWITCHER GROUNDS
`Petitioner Improperly Combines Two Different Embodiments from Kwak
`Kwak Does Not Disclose Adding an Offset to Generate a Larger Supply
`Current via the Inductor
`II. ENVELOPE AMPLIFIER GROUNDS
`•
`The Claims Require a Selective Boost
`•
`The POSA Would Not Combine Myers with Choi
`•
`The POSA Would Not Combine Chu and Choi
`
`36
`
`IPR2018-01152, Paper 16 at 25-32;
`IPR2018-01153, Paper 16 at 29-36;
`IPR2018-01240, Paper 16 at 31-37.
`
`
`
`The POSA Would Not Combine Chu and Choi
`
`IPR2018-01152, Ex 2005, Declaration of Dr. Kelley, ¶82.
`
`37
`
`
`
`The POSA Would Not Combine Chu and Choi
`
`Ex. 1004, Fig. 4
`
`Ex. 1006, Fig. 5
`
`38
`
`IPR2018-01152, Paper 16 at 32-44;
`IPR2018-01153, Paper 16 at 36-48;
`IPR2018-01240, Paper 16 at 38-50
`
`
`
`IPR2018-01152
`IPR2018-01153
`IPR2018-01154
`IPR2018-01240
`U.S. Patent No. 8,698,558
`
`
`CERTIFICATE OF SERVICE
`
`
`The undersigned hereby certifies that a copy of Patent Owner’s Demonstrative
`
`Exhibits was served on October 23, 2019 by email, as follows:
`
`David L. Cavanaugh – david.cavanaugh@wilmerhale.com
`James M. Dowd – james.dowd@wilmerhale.com
`Richard Goldenberg – richard.goldenberg@wilmerhale.com
`Theodoros Konstantakapoulos –
`theodoros.konstantakopoulos@wilmerhale.com
`Louis W. Tompros – louis.tompros@wilmerhale.com
`
`Date: October 23, 2019
`
`
`/ Joseph M. Sauer /
`Joseph M. Sauer, Reg. No. 47,919
`JONES DAY
`901 Lakeside Avenue
`Cleveland, OH, 44114
`
`Counsel for Patent Owner
`
`
`
`
`
`
`
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