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`
`U8008698558B2
`
`(12) United States Patent
`Mathe et a1.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 8,698,558 32
`Apr. 15, 2014
`
`(54)
`
`[75)
`
`LOW-VOLTAGE POWPZR-EFFIC‘IEN'I‘
`ENVELOPE TRACKER
`
`Inventors: Lennart K Mathe. San Diego. (TA (US);
`Thomas Domeniek Marra. San Diego.
`CA (U S); Todd R Sutton. Del Mar. CA
`(US)
`
`(73) Assignee: QUALCOMM Incorporated. San
`Diego, CA (US)
`
`I..i
`372010
`7.579.433 Bl
`772010 Sun
`7.755.431 B2 *
`472011 Elia
`7.932.780 132*
`
`1072011 Okubo eta].
`8.030.995 132*
`872012 Chen et a].
`8.237.499 BZ‘“
`372005 Matsumoto el al.
`2003-0046474 A1
`952005 Tanabe et al.
`2005.-'0215209 Al
`1152008 Mimojarvi
`200870278136 Al
`12010 Van Zeijlet'al.
`20100001793 Al
`4.0011 Tanakaetnl.
`20100095227 Al
`201250293253 Al“ 1172012 Khlal el al.
`
`3303297
`3307136
`330-297
`330-136
`
`330-"127
`
`OTHER PUBLICATIONS
`
`( * ) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154th) by 38 days.
`
`C hoi. et al.. ”Envelope Tracking Power Amplifier Robust to Battery
`Depletion." 2010 IEEE.
`MIT-S International Microwave SYntposium Digest tM'lT). May
`2010.
`
`(21)
`
`Appl. No: 131167.659
`
`(22)
`
`Filed:
`
`Jun. 23, 2011
`
`(65)
`
`[51)
`
`(52)
`
`(58)
`
`[56}
`
`Prior Publication Data
`US 20127032678341
`Dec. 27. 2012
`
`[2006.01]
`
`Int. Cl.
`H0317 3217
`0.5. CI.
`330725]; 3307136; 3307297
`USPC
`Field of Classification Search
`USPC ........................ 330710. 136. 207 A. 251. 297
`See application file for complete search history.
`
`References Cited
`
`US. PATENT DOCUMENTS
`
`5.905.407 A “‘
`6.300.826 Bl
`6.661.2l7 32
`6,792,252 B2
`6.838.931 B2*
`7.061.313 B2
`7.068.984 B2
`7,368,985 32
`
`5-“ 1999
`l0r'"300l
`l2-"2003
`972004
`172005
`672006
`672006
`572008
`
`Midya
`Mathe et a1.
`Kimball et al.
`Kimball et al.
`Midya eta].
`Kimball et al.
`Mathc ct a].
`Kusunoki
`
`330:"10
`
`330510
`
`(Continued)
`
`Khanlt V" Nguyen
`Primarj’ Examiner
`(74) Attorney: Agent. or Hm: — William M. Hooks
`
`(57)
`
`ABSTRACT
`
`"l‘echniques for efficiently generating a power supply are
`described. In one design, an apparatus includes an envelope
`amplifier and a boo st converter. The boost converter generates
`a boosted supply voltage having a higher voltage than a first
`supply voltage (e.g.. a battery voltage). 'Ilte envelope ampli-
`fier generates a second supply voltage based on an envelope
`signal and the boosted supply voltage (and also possibly the
`first supply voltage). A power amplifier operates based on the
`second supply voltage.
`In another design. an apparatus
`includes a switcher, an envelope amplifier. and a power
`amplifier. The switcher receives a first supply voltage and
`provides a first supply current. The envelope amplifier pro-
`vides a second supply current based on an envelope signal.
`The power amplifier receives a total supply current including
`the first and second supply currents. In one design.
`the
`switcher detects the second supply current and adds an offset
`to generate a larger first supply current than without the offset.
`
`20 Claims, 6 Drawing Sheets
`
`
`
`|NTEL1201
`
`INTEL 1201
`
`

`

`US 8,698,558 B2
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`Page 2
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`(56}
`
`References Cited
`
`OTHER PUBLICATIONS
`Choi. J et al.. “A Polar 'i'ransmitter With CMOS Programmable
`l-Iysteretic-Controlled Hybrid Switching Supply Modulator for Multi
`standard Applications”. IEEE Transactions on Microwave Theory
`and Techniques. IEEE Service Center. Piscataway. NJ. US. vol. 57.
`No. 7. Jul. 1.2009. pp. 1675-1686. XP011258456.
`Ertl. H et 211.. “Basic Considerations and Topologies of Switched-
`Mode Assisted Linear Power Amplifiers". IEEE Transactions on
`Industrial Electronics. IEEE Service Center. Piscataway. NJ. USA.
`vol. 44. No. 1. Feb. 1.1997. XP011023224.
`International Search Report and Written Opinion-- -PC'1'.-'U520123
`043915—ISA9'Em—Nov. 26. 201.2.
`Kang D.. el 211.. “A Multimode.-'Mul1iband Power Amplifier with a
`Boosted Supply Modulator".
`1131513 Ransactions on Microwave
`Theoryr and Techniques. IEEE Service Center. Piscatavmy. NJ. [1' S.
`vol. 58. No. 10. Oct. 1.2010. pp. 2598-2603. XP011317521. ISSN:
`0018-9480.
`Kang. D el 31.. “LTE Power Amplifier for envelope tracking polar
`transmitters". Microwave Conference (ELIMC). 2010. European.
`
`23. 2010. pp. 623-631.
`
`IEEE. Piseamway. NJ. USA. Sep.
`XP03l'i86] 14.
`Kim 1).. el 9.1.. “High efficiency and widehancl envelope tracking
`power amplifier with sweet spot tracking". Radio Frequency Inte-
`grated Circuits Symposium {REC} . 2010 IEEE. IEEE, Piscalaway.
`NJ. USA. May 23. 20101 pp. 255—258. XP031684103. ISBN: 978-1—
`4244-62403.
`Li. Y et a1.. “High Efficiency Wide Bandwidth Power Supplies for
`GSM and EDGE RF Power Amplifiers". Conference Proceedings"
`IEEE International Symposium on Circuits and Systems (ISCAS);
`May 23-26. 2005. International Conference Center. Kobe. Japan.
`IEEE ServiceC‘enter. Piscataway. NJ. May 23. 2005, pp. 1314-1311
`XP0108157'F9.
`Partial International Search Report—PCT.-"U52012-"043915—Inter—
`national Search Authority European Patent Office Oct. 4, 2012.
`Stauth. J .'1'.._ et :11. “Optimum Bias Calculation for Parallel Hybrid
`Switching-Linear Regulators". Applied Power Electronics Confer-
`ence. APEC EON—Twenty Second Annual IEEE. IEEE. PI. Feb. 1.
`200?. pp. 569-574. XP031085261
`
`* cited by examiner
`
`

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`US 8,698,558 B2
`
`1
`LOW-VOLTAGE POWER-EFFICIENT
`ENVELOPE TRACKER
`
`BACKGROUND
`
`I. Field
`The present disclosure relates generally to electronics. and
`more specifically to techniques for generating a power supply
`for an amplifier andfor other circuits.
`II. Background
`In a communication system. a transmitter may process
`(cg. encode and modulate) data to generate output samples.
`The transmitter may further condition (e.g., convert to analog.
`filter. frequency upeonvert. and amplify) the output samples
`to generate an output radio frequency (RF) signal. The trans-
`mitter may then transmit the output RF signal via a commu-
`nication channel to a receiver. The receiver may receive the
`transmitted RF signal and perform the complementary pro-
`cessing on the received RF signal to recover the transmitted
`data.
`The transmitter typically includes a power amplifier (PA)
`to provide high transmit power for the output RF signal. The
`power amplifier should be able to provide high output power
`and have high power-added efficiency (PAR). Furthermore.
`the power amplifier may be required to have good perfor-
`mance and high PAH even with a low battery voltage.
`
`SUMMARY
`
`Techniques for efficiently generating a power supply for a
`power amplifier andfor other circuits are described herein. In
`one exemplary design. an apparatus (e.g.. an integrated cir-
`cuit. a wireless device, a circuit module, etc.) may include an
`envelope amplifier and a boost converter. The boost converter
`may receive a first supply voltage (e.g.. a battery voltage) and
`generate a boosted supply voltage having a higher voltage
`than the first supply voltage. The envelope amplifier may
`receive an envelope signal and the boosted supply voltage and
`may generate a second supply voltage based on the envelope
`signal and the boosted supply voltage. The apparatus may
`further include a power amplifier. which may operate based
`on the second supply voltage from the envelope amplifier. In
`one design, the envelope amplifier may further receive the
`first supply voltage and may generate the second supply volt-
`age based on either the first supply voltage or the boosted
`supply voltage. For example. the envelope amplifier may
`generate the second supply voltage (i) based on the boosted
`supply voltage if the envelope signal exceeds a first threshold
`andfor if the first supply voltage is below a second threshold
`or (ii) based on the first supply voltage otherwise.
`In another exemplary design. an apparatus may include a
`switcher. an envelope amplifier. and a power amplifier. The
`switcher may receive a first supply voltage (e.g.._ a battery
`voltage) and provide a first supply current. The envelope
`amplifier may receive an envelope signal and provide a sec-
`ond supply current based on the envelope signal. The power
`amplifier may receive a total supply current comprising the
`first supply current and the second supply current. The first
`supply current may include direct current (DC) and low fre-
`quency components. The second supply current may include
`higher frequency components. The apparatus may further
`include a boost converter. which may receive the first supply
`voltage and provide a boosted supply voltage. The envelope
`amplifier may then operate based on either the first supply
`voltage or the boosted supply voltage.
`[11 yet another exemplary design. an apparatus may include
`a switcher that may sense an input current and generate a
`
`2
`
`switching signal to charge and discharge an inductor provid-
`ing a supply current. The switcher may add an offset to the
`input current to generate a larger supply current than without
`the offset. The apparatus may further include an envelope
`amplifier. a boost converter, and a power amplifier. which
`may operate as described above.
`Various aspects and features ofthe disclosure are described
`in further detail below.
`
`10
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 shows a block diagram o fa wireless communication
`device.
`
`FIGS. 2A, 2B and 2C show diagrams ofoperating a power
`amplifier based on a battery voltage. an average power
`tracker. and an envelope tracker. respectively.
`FIG. 3 shows a schematic diagram of a switcher and an
`envelope amplifier.
`FIGS. 4A, 4B and 4C show plots of PA supply current and
`inductor current versus time for different supply voltages for
`the switcher and the envelope amplifier.
`FIG. 5 shows a schematic diagram ofa switcher with offset
`in a current sensing path.
`FIG. 6 shows a schematic diagram ol'a boost converter.
`
`DETAILED DESCRIPTION
`
`3o
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`The word “exemplary" is used herein to mean “serving as
`an example, instance. or illustration." Any design described
`herein as “exemplary“ is not necessarily to be construed as
`preferred or advantageous over other designs.
`Techniques for generating a power supply for an amplifier
`andJ‘or other circuits are described herein. The techniques
`may he used for various types of amplifiers such as power
`amplifiers. driver amplifiers, etc. The techniques may also be
`used for various electronic devices such as wireless commu—
`
`nication devices. cellular phones. personal digital assistants
`(PDAs). handheld devices, wireless modems, laptop comput-
`ers. cordless phones. Bluetooth devices. consumer electronic
`devices, etc. For clarity. the use ol‘the techniques to generate
`a power supply for a power amplifier in a wireless commu-
`nication device is described below.
`
`FIG. 1 shows a block diagram oi'a design of a wireless
`communication device 109. For clarity. only a transmitter
`portion of wireless device 100 is shown in FIG. 1. and a
`receiver portion is not shown. Within wireless device 100. a
`data processor 110 may receive data to be transmitted, pro-
`cess (cg. encode. interleave. and symbol map) the data. and
`provide data symbols. Data processor 110 may also process
`pilot and provide pilot symbols. Data processor 1 10 may also
`process the data symbols and pilot symbols for code division
`multiple access (CIJMA),
`time division multiple access
`(TDMA).
`frequency division multiple access (FDMA).
`orthogonal FDMA (OFDMA). single-carrier FDMA (SC-
`FI)MA). andJor some other multiplexing scheme and may
`provide output symbols.
`A modulator 112 may receive the output symbols from data
`processor 110. perform quadrature modulation. polar modu—
`lation. or some other type ofmodulation. and provide output
`samples. Modulator 112 may also deten'nine the envelope of
`the output samples. e.g.. by computing the magnitude ofeach
`output sample and averaging the magnitude across output
`samples. Modulator 112 may provide an envelope signal
`indicative of the envelope of the output samples.
`An RF transmitter 120 may process (eg. convert to ana—
`log. amplify.
`filler, and frequency upoonvert) the output
`samples from modulator 112 and provide an input RF signal
`
`

`

`3
`
`4
`
`US 8,698,558 BZ
`
`(RFin).A poweramplifler (PA) 138 may amplify the input RF
`signal to obtain the desired output power level and provide an
`output RF signal (RFout), which may be transtnitted via an
`antenna (not shown in FIG. 1}. RF transmitter 120 may also
`include circuits to generate the envelope signal. instead of
`using modulator 112 to generate the envelope signal.
`A PA supply generator 150 may receive the envelope signal
`from modulator l 12 and may generate a power supply voltage
`(Vpa) for power amplifier 130. PA supply generator 150 may
`also be referred to as an envelope tracker. In the design shown
`in FIG. 1. PA supply generator 158 includes a switcher 160.
`an envelope amplifier (lfinv Amp) 170. a boost converter [80.
`and an inductor 162. Switcher 161! may also be referred to as
`a switching—mode power supply (SMPS). Switcher 160
`receives a battery voltage (Vbat) and provides a first supply
`current (I ind} comprising DC and low frequency components
`at node A. Inductor 162 stores current from switcher 160 and
`
`provides the stored current to node A on alternating cycles.
`Boost converter [80 receives the Vbat voltage and generates
`a boosted supply voltage (Vboost) that is higher than the Vbat
`voltage. Envelope amplifier 170 receives the envelope signal
`at its signal input. receives the Vbat voltage and the Vboost
`voltage at its two power supply inputs. and provides a second
`supply current (lenv) comprising high frequency components
`at node A. The PA supply current (lpa) provided to power
`amplifier [30 includes the [ind current from switcher 160 and
`the lenv current from envelope amplifier 170. Envelope
`amplifier 1'70 also provides the proper PA supply voltage
`(Vpa) at Node A for power amplifier 130. The various circuits
`in PA supply generator 150 are described in further detail
`below.
`
`A controller 140 may control the operation of various tuiits
`within wireless device Hit]. A memory 142 may store pro-
`gram codes and data for controller 140 andr‘or other units
`within wireless device 100. Data processor 110, modulator
`112. controller 140. and memory 142 may be implemented on
`one or there application specific integrated circuits (ASICs)
`and/or other ICs.
`
`FIG. 1 shows an exemplary design of wireless device 180.
`Wireless device 100 may also be implemented in other man-
`ners and may include different circuits than those shown in
`FIG. 1. All or a portion ofRF transmitter 120, power amplifier
`130, and PA supply generator 150 may be implemented on
`one or more analog integrated circuits (1C 5). RF ICs (RFle).
`mixed-signal le. etc.
`It may be desirable to operate wireless device 100 with a
`low battery voltage in order to reduce power consumption,
`extend battery life. andr‘or obtain other advantages. New bat-
`tery tecluiology may be able to provide energy down to 2.5
`volts (V) and below in the near future. However. a power
`amplifier may need to operate with a PA supply voltage (e.g..
`3 .2V") that is higher than the battery voltage. A boost converter
`may be used to boost the battery voltage to generate the higher
`PA supply voltage. However. the use of the boost converter to
`directly supply the PA supply voltage may increase cost and
`power consumption. both ofwhich are undesirable.
`PA supply generator 150 can efficiently generate the PA
`supply voltage with envelope tracking to avoid the disadvan—
`tages of using a boost converter to directly provide the PA
`supply voltage. Switcher 160 may provide the bulk of the
`power for power amplifier I30 and may be connected directly
`to the battery voltage. Boost converter 180 may provide
`power to only envelope amplifier 170. PA supply generator
`150 can generate the PA supply voltage to track the envelope
`of the RFin signal provided to power amplifier 130. so that
`just the proper amount of PA supply voltage is supplied to
`power amplifier 130.
`
`3
`
`10
`
`3t]
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`FIG. 2A shows a diagram of using a battery voltage for a
`power amplifier 210. The RI"out signal (which follows the
`RF in signal) has a time-varying envelope and is shown by a
`plot 250. The battery voltage is shown by a plot 260 and is
`higher than the largest amplitude of the envelope in order to
`avoid clipping of the RI "out signal from power amplifier 210.
`The difference between the battery voltage and the envelope
`ofthe RFout signal represents wasted power that is dissipated
`by power amplifier 2 l 0 instead of delivered to an output load.
`FIG. 2B shows a diagram ofgenerating a PA supply voltage
`(\v’pa) for power amplifier 210 with an average power tracker
`(APT) 220. APT 220 receives a power control signal indicat-
`ing the largest amplitude of the envelope ofthe Rl’out signal
`in each time interval. APT 220 generates the PA supply volt—
`age (which is shown by a plot 270} for power amplifier 2'10
`based on the power control signal. The difference between the
`PA supply voltage and the envelope of the RI’out signal rep-
`resents wasted power. APT 220 can reduce wasted power
`since it can generate the PA supply voltage to track the largest
`amplitude of the envelope in each time interval.
`FIG. 2C shows a diagram ofgenerating a PA supply voltage
`for power amplifier 210 with an envelope tracker 23 U. Enve—
`lope trackcr 230 receives an envelope signal indicative of the
`envelope of the Rli'out signal and generates the PA supply
`voltage (which is shown by a plot 280) for power amplifier
`210 based on the envelope signal. The PA supply voltage
`closely tracks the envelope of the RFout signal over time.
`Hence. the difference between the PA supply voltage and the
`envelope of the RFout signal is small. which results in less
`wasted power. The power amplifier is operated in saturation
`for all envelope amplitudes in order to maximize PA elli-
`ciency.
`PA supply generator 15!} in FIG. 1 can implement envelope
`tracker 230 in FIG. 2C with high efficiency. This is achieved
`by a combination of (i) an efficient switcher 160 to generate a
`first supply current (Iind) with a switch mode power supply
`and (ii) a linear envelope amplifier 170 to generate a second
`supply current (lenv).
`FIG. 3 shows a schematic diagram ofa switcher 160a and
`an envelope amplifier 170a, which are one design ofswitcher
`I60 and envelope amplifier 170. respectively.
`in FIG. 1.
`Within envelope amplifier 170a. an operational amplifier (op—
`amp) 310 has its non—inverting input receiving the envelope
`signal. its mverting input coupled to an output of envelope
`amplifier 1700 (which is node 15). and its output coupled to an
`input of a class AB driver 31 2. Driver 312 has its first output
`(R1 } coupled to the gate ofa P-channel metal oxide semicon-
`ductor (PMOS) transistor 314 and its second output (R2)
`coupled to the gate of an N—channel MOS (NMOS) transistor
`316. NMOS transistor 316 has its drain coupled to node E and
`its source coupled to circuit ground. PMOS transistor 314 has
`its drain coupled to node B and its source coupled to the drains
`of PMOS transistors 318 and 320. PMOS transistor 318 has
`
`its gate receiving a C] control signal and its source receiving
`the Vboost voltage. PMOS transistor 320 has its gate receiv-
`ing a C2 control signal and its source receiving the Vbat
`voltage.
`A current sensor 164 is coupled between node B and node
`A and senses the lenv current provided by envelope amplifier
`170a. Sensor 164 passes most of the lenv current to node A
`and provides a small sensed current (Isen) to switcher 160:1.
`The Isen current is a small fraction nfthe lenv current from
`envelope amplifier 1700.
`Within switcher 160a. a current sense amplifier 330 has its
`input coupled to current sensor 164 and its output coupled to
`an input of a switcher driver 332. Driver 332 has its first
`output (51) coupled to the gate ofa PMOS transistor 334 and
`
`

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`5
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`
`US 8,698,558 BZ
`
`its second output (82) coupled to the gate oi'an NMOS trann
`sistor 336. NMOS transistor 336 has its drain coupled to an
`output of switcher 160a (which is node B) and its source
`coupled to circuit ground. PMOS transistor 334 has its drain
`coupled to node B and its source receiving the Vbat voltage.
`Inductor 162 is coupled between nodes A and B.
`Switcher 160a operates as follows. Switcher 160a is in an
`On state when current sensor 164 senses a high output current
`from envelope amplifier 1709 and provides a low sensed
`voltage to driver 332. Driver 332 then provides a low voltage
`to the gate of PMOS transistor 334 and a low voltage to the
`gate oFNMOS transistor 336. PMOS transistor 334 is turned
`on and couples the Vhat voltage to inductor 162, which stores
`energy from the Vbat voltage. The current through inductor
`162 rises dtiring the On state. with the rate of the rise being
`dependent on (i) the dilTerertce benveen the Vbat voltage and
`the Vpa voltage at node A and (ii) the inductance of inductor
`162. Conversely, switcher 168:: is in an Off state when current
`sensor 164 senses a low output current from envelope ampli-
`fier 170a and provides a high sensed voltage to driver 332.
`Driver 332 then provides a high voltage to the gate of PMOS
`transistor 334 and a high voltage to the gate of NMOS tran—
`sistor 336. NMOS transistor 336 is turned on. and inductor
`162 is coupled between node A zuid circuit ground. The cur-
`rent through inductor 162 falls during the OH state. with the
`rate of the fall being dependent on the V’pa voltage at node A
`and the inductance of inductor 162. The Vbat voltage thus
`provides current to power amplifier 130 via inductor 162
`during the On state. and inductor 120 provides its stored
`energy to power amplifier 130 during the ()fi' state.
`In one design. envelope amplifier 170a operates based on
`the Vboost voltage only when needed and based on the Vbat
`voltage the remaining time in order to improve efficiency. For
`example. envelope amplifier 170a may provide approxi-
`mately 85% of the power based on the Vbat voltage and only
`approximately 1 5% ofthe power based on the Vboost voltage.
`When a high Vpa voltage is needed for power amplifier 130
`due to a large envelope on the Rli‘out signal. the C1 control
`signal is at logic low. and the C2 control signal is at logic high.
`In this case. boost converter 180 is enabled and generates the
`Vboost voltage, PMOS transistor 318 is tunied on and pro-
`vides the Vboost voltage to the source of PMOS transistor
`314, and PMOS transistor 320 is turned off Conversely, when
`a high Vpa voltage is not needed for power amplifier 130. the
`(71 control signal is at logic high. and the (.‘2 control signal is
`at logic low. In this case. boost converter 180 is disabled.
`PMOS transistor 318 is turned oil‘, and PMOS transistor 320
`is tumed on and provides the Vbal voltage to the source 01‘
`PMOS transistor 314.
`
`Envelope amplifier 170a operates as follows. When the
`envelope signal
`increases.
`the output of op—amp 3'10
`increases. the R1 output of driver 312 deceases and the R2
`output of driver 312 decreases until NMOS transistor 316 is
`almost turned off. and the output of envelope amplifier 170a
`increases. The converse is true when the envelope signal
`decreases. The negative feedback from the output of envelope
`amplifier 17th; to the inverting input of'op~a1np 310 results in
`envelope amplifier 170a having unity gain. Hence. the output
`of envelope amplifier 170:: follows the envelope signal. and
`the Vpa voltage is approximately equal to the envelope signal.
`Driver 312 may be implemented with a class AB amplifier to
`improve efficiency. so that large output currents can be sup-
`plied even though the bias current in transistors 314 and 316
`is very low.
`A control signal generator 190 receives the envelope signal
`and the Vbat voltage and generates the (71 and (‘2 control
`signals. The C1 control signal is complementary to the C2
`
`:5
`
`10
`
`3t]
`
`4t]
`
`45
`
`50
`
`55
`
`60
`
`65
`
`control signal. In one design. generator 190 generates the Cl
`and C2 control signals to select the Vboost voltage for enve-
`lope amplifier 1 70 when the magnitude of the envelope signal
`exceeds a first threshold. The first threshold may be a fixed
`threshold or may be determined based on the Vbat voltage. In
`another design, generator 190 generates the (‘1 and (72 con-
`trol signals to select theVboost voltage for envelope amplifier
`170 when the magnitude of the envelope signal exceeds the
`first threshold mid the Vbat voltage is below a second thresh-
`old. Generator 190 may also generate the Cl and C2 signals
`based on other signals, other voltages. andfor other criteria.
`FIG. 3 shows an exemplary design ol‘ switcher 160 and
`envelope amplifier 170 in 1" IG. 1. Switcher 160 and envelope
`amplifier 170 may also be implemented in other manners. For
`example. envelope amplifier 1'70 may be implemented as
`described in US. Pat. No. 6.300.826, entitled “Apparatus and
`Method for Efficiently Amplifying Wideband Envelope Sig-
`nals.“ issued Oct. 9, 2001.
`Switcher 1600 has high efficiency and delivers a majority
`of the supply current for power amplifier 130.
`linvelope
`amplifier 170a operates as a linear stage and has relatively
`high bandwidth (eg. in the MHZ range). Switcher 160a
`operates to reduce the output current from envelope amplifier
`1709. which improves overall efficiency.
`It may be desirable to support operation of‘wireless device
`100 with a low battery voltage (cg. below 2.5V). This may be
`achieved by operating switcher 160 based on theVbal voltage
`and operating envelope amplifier 170 based on the higher
`Waoost voltage. However. efficiency may be improved by
`operating envelope amplifier 170 based on the Vboost voltage
`only when needed for large amplitude envelope and based on
`the V’bat voltage the remaining time. as shown in FIG. 3 and
`described above.
`
`FIG. 4A shows plots o I‘ an example of the PA supply
`current (Ipa) and the inductor current (Iind) from inductor
`162 versus time for a casein which switcher 160a has a supply
`voltage (sz) of 3.7V and envelope amplifier 170;: has a
`supply voltage (Venv) of 3.7V. The Iind current is the current
`through inductor 162 and is shown by a plot 410. The lpa
`current is the current provided to power amplifier 130 and is
`shown by a plot 420. The Ipa current includes the Iind current
`as well as the Ienv current from envelope atnplifier 170a.
`Envelope amplifier 170a provides output current whenever
`the lpa current is higher than the Iind current. The efficiency
`of switcher 160a and envelope zunplifier 17011 is approxi-
`mately 80% in one exemplary design.
`FIG. 4B shows plots of the PA supply current (lpa) and the
`inductor current (Iind) versus time for a case in which
`switcher 1606 has a supply voltage of 2.3V and envelope
`amplifier 170a has a supply voltage of3.7V. The Iind current
`is shown by a plot 412. and the lpa current is shown by plot
`420. When the supply voltage of switcher 1600 is reduced to
`2.3V. inductor 162 charges more slowly, which results in a
`lower average Iind current as compared to the case in which
`the supply voltage ol‘switcher 160:: is at 3.7V in FIG. 4A. The
`lower Iind current causes envelope amplifier 170a to provide
`more of the Ipa current. This reduces the overall efficiency to
`approximately 65% in one exemplary design because enve—
`lope amplifier 1700 is less efficient than switcher 160m The
`drop in efficiency may be ameliorated by increasing the Iind
`current from the switcher.
`
`FIG. 5 shows a schematic diagram of a switcher 1603'),
`which is another design of switcher 160 in FIG. 1. Switcher
`160!) includes current sense amplifier 330. driver 332. and
`MOS transistors 334 and 336, which are coupled as described
`above for switcher 1600 in 1“ 1G. 3. Switcher 160?) funher
`
`includes a current summer 328 having a first input coupled to
`
`

`

`7
`
`US 8,698,558 BZ
`
`10
`
`current sensor 164. a second input receiving an offset (e.g.. an
`offset current}, and an output coupled to the input of current
`sense amplifier 330. Summer 328 may be implemented with
`a summing circuit (eg. an amplifier]. a summing node. etc.
`
`Switcher 16% operates as follows. Summer 328 receives
`the Isen current from current sensor 164. adds an offset cur—
`
`rent. and provides a summed current that is lower than the
`[sen current by the offset current. The remaining circuits
`within switcher 160b operate as described above for switcher
`160a in FIG. 3. Summer 328 intentionally reduces the Isen
`current provided to current sense amplifier 33!]. so that
`switcher 16B is turned On for a longer time period and can
`provide a larger Iind current. which is part of the Ipa current
`provided to power amplifier 130. The offset provided to sums
`mer 328 determines the amount by which the Iind current is
`increased by switcher 160!) relative to the Iind current pro-
`vided by switcher 1600 in FIG. 3.
`
`In general. a progressively larger ofi'set may be used to
`generate a progressively larger inductor current than without
`the olfset. In one design. the offset may be a fixed value
`selected to provide good performance. e.g.. good efficiency.
`In another design. the offset may be determined based on the
`battery voltage. For example. a progressively larger offset
`tnay be used for a progressively lower battery voltage. The
`offset may also be detemiined based on the envelope signal
`andtor other infomiation.
`
`An offset to increase the inductor current may be added via
`summer 3 28. as shown in FIG. 5. An offset may also be added
`by increasing the pulse width ofan output signal from current
`sense amplifier via any suitable meclutnism.
`
`3r]
`
`FIG. 4C shows plots of the PA supply current (Ipa) and the
`inductor current (Iind) versus time for a case in which
`switcher 160!) in FIG. 5 has a supply voltage of 2.3V and
`envelope amplifier 1700 has a supply voltage of3.7V. The
`Iind current is shown by a plot 414. and the Ipa current is
`shown by plot 420. When the supply voltage ol‘switcher 1605
`is reduced to 2.3V". inductor I62 charges more slowly. which
`results in a lower Iind current as shown in FIG. 4B. The o ll‘set
`added by summer 3228 in FIG. 5 reduces the sensed current
`provided to current sense amplifier 330 and results in switcher
`160!) being turned On longer. Hence. switcher 160!) with
`offset
`in FIG. 5 can provide a higher Iind current
`than
`switcher 160a without offset in FIG. 3. The overall efficiency
`for switcher 160:!) and envelope amplifier 170:: is improved to
`approximately 78% in one exemplary design.
`FIG. 6 shows a schematic diagram of a design of boost
`converter 180 in I-‘IGS. 1. Sand 5. Within boost converter 180.
`an inductor 612 has one end receiving the Vbat voltage and
`the other end coupled to node D. An NMOS transistor 614 has
`its source coupled to circuit ground. its gate receiving a Cb
`control signal. and its drain coupled to node D. A diode 616
`has its anode coupled to node D and its cathode coupled to the
`output of boost converter 180. A capacitor 618 has one end
`coupled to circuit grotuid and the other end coupled to the
`output of boost Convener 180.
`Boost converter 180 operates as follows. In an On state.
`NMOS transistor 614 is closed.
`inductor 612 is coupled
`between the V'bat voltage and circuit ground. and the current
`via inductor 612 increases. In an Off state, NMOS transistor
`614 is opened. and the current from inductor 612 fiows via
`diode 616 to capacitor 618 and a load at the output of boost
`converter 180 (not shown in FIG. 6}. The V'boost voltage may
`