`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________
`
`NICHIA CORPORATION AND
`EVERLIGHT ELECTRONICS CO., LTD.,
`Petitioners,
`
`v.
`
`DOCUMENT SECURITY SYSTEMS, INC.,
`Patent Owner.
`
`_______________
`
`Case IPR2018-009651
`Patent 7,919,787
`
`____________
`
`
`PATENT OWNER’S RESPONSE
`
`
`1 Everlight Electronics Co., Ltd., who filed a petition in IPR2018-01260, has been
`joined as a petitioner in this proceeding.
`
`
`
`TABLE OF CONTENTS
`
`
`
`I.
`
`II.
`
`THE BOARD’S IMPROPER ADDITIONS TO THE PETITION’S
`ANALYSIS CONFIRM THAT THE PETITION WAS DEFICIENT IN
`EACH OF ITS CHALLENGES ...................................................................... 1
`
`THE ’787 PATENT CLAIMS, INTER ALIA, A SPECIFIC
`ARRANGEMENT OF THE ANODE AND CATHODE ON A
`SEMICONDUCTOR DIE ............................................................................... 4
`
`III. THE STATUTES AND REGULATIONS GOVERNING INTER PARTES
`REVIEW REQUIRE THAT THIS PROCEEDING BE DISMISSED ........... 8
`
`IV. PETITIONERS FAIL TO ACCURATELY IDENTIFY THE SCOPE OF
`THE CLAIMS BEING CHALLENGED ...................................................... 10
`
`A. Disputed Claims .................................................................................. 10
`
`B.
`
`Claim Construction ............................................................................. 19
`
`V.
`
`THE CHALLENGED CLAIMS ARE NOT UNPATENTABLE OVER THE
`ASSERTED REFERENCES ......................................................................... 24
`
`A. Grounds 1-3 Fail Because Weeks, Wirth, and Negley Do Not Dislcose
`Anodes/Cathodes On a Bottom Major Plane of an LED Die That is
`Also a Bottom Surface of the LED Die’s Substrate ............................ 24
`
`1.
`
`Petitioners Acknowledge that Lumbard Does Not Disclose or
`Suggest the Claimed Light Emitting Semiconductor Die .............. 24
`
`2. Weeks Fails to Remedy Lumbard’s Shortcomings ........................ 27
`
`3. Wirth Also Fails to Remedy Lumbard’s Shortcomings ................. 33
`
`4.
`
`Negley Also Fails to Remedy Lumbard’s Shortcomings .............. 36
`
`B.
`
`Grounds 4-6 Fail Because Ishidu and the Secondary References Do
`Not Disclose or Suggest the Claimed Light Emitting Semiconductor
`Die ....................................................................................................... 40
`
`- i -
`
`
`
`C.
`
`Grounds 7-9 Fail Because Ogawa and the Secondary References Do
`Not Disclose or Suggest the Claimed Light Emitting Semiconductor
`Die ....................................................................................................... 43
`
`VI. CONCLUSION .............................................................................................. 46
`
`
`
`
`
`
`
`- ii -
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`
`
`TABLE OF AUTHORITIES
`
`Cases
`
`Innova/Pure Water, Inc. v. Safari Water Filtration Systems, Inc.,
`381 F.3d 1111 (Fed. Cir. 2004) ..................................................................... 20
`
`SAS Institute Inc. v. Iancu,
`138 S. Ct. 1348 (2018) ...................................................................... 2, 3, 8, 29
`
`Sirona Dental Sys. GmbH v. Institut Straumann AG,
`892 F.3d 1349 (Fed. Cir. 2018) ................................................................ 2, 29
`
`Statutes
`
`35 U.S.C. § 154(a)(2) ............................................................................................... 19
`
`35 U.S.C. § 314(a) .............................................................................................. 8, 10
`
`35 U.S.C. § 316 ............................................................................................... 8, 9, 10
`
`35 U.S.C. § 316(e) ..................................................................................................... 3
`
`35 U.S.C. § 318(a) ................................................................................................... 10
`
`Rules
`
`37 C.F.R. § 42 ..................................................................................................... 8, 10
`
`37 C.F.R. § 42.100(b) .............................................................................................. 19
`
`37 C.F.R. § 42.104(b) .............................................................................................. 29
`
`37 C.F.R. § 42.107 ..................................................................................................... 1
`
`37 C.F.R. § 42.108(c) ................................................................................................. 8
`
`Other Authorities
`
`Office Patent Trial Practice Guide, 77 Fed. Reg. 48679 (Aug. 14, 2012) .............8, 9
`
`
`
`
`
`
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`- iii -
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`
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`PATENT OWNER’S LIST OF EXHIBITS
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`
`
`Exhibit Number
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`Exhibit Description
`
`2001-2007
`
`Reserved
`
`2008
`
`Deposition Transcript of Dr. James R. Shealy
`
`2009-2199
`
`Reserved
`
`2200-2202
`
`Expunged
`
`
`
`
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`- iv -
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`
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`IPR2018-00965 Patent Owner’s Response
`
`Pursuant to 37 C.F.R. § 42.107, Patent Owner Document Security Systems,
`
`Inc. (“DSS” or “Patent Owner”) files this Response to the Petition, setting forth
`
`reasons why the Board should determine that claims 1-14 of U.S. Patent No.
`
`7,919,787 (the “’787 patent”) are not unpatentable, contrary to the Petition for inter
`
`partes review (“IPR”) filed by Nichia Corporation and joined by Everlight
`
`Electronics Co., Ltd. (collectively “Petitioners”). This Response is accompanied
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`by the deposition testimony of Dr. James Shealy, Petitioners’ declarant (Ex. 2008).
`
`I.
`
`THE BOARD’S IMPROPER ADDITIONS TO THE PETITION’S
`ANALYSIS CONFIRM THAT THE PETITION WAS DEFICIENT IN
`EACH OF ITS CHALLENGES
`
`The challenged independent claims of the ’787 patent each recite the
`
`following features: “the bottom major surface of the light emitting semiconductor
`
`die is a bottom surface of a substrate of the die, each of the anode and cathode
`
`comprises a metallization layer formed on the bottom major surface of the light
`
`emitting semiconductor die.” In Patent Owner’s Preliminary Response (Paper 10,
`
`“POPR”), Patent Owner noted that Petitioners failed to substantiate their assertions
`
`that secondary references Weeks,2 Wirth,3 and Negley4 include a “bottom major
`
`surface” possessing all claimed features. See POPR, 22-31.
`
`2 Ex. 1007, U.S. Patent No. 6,611,002 (“Weeks”).
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`3 Ex. 1008, International Patent Application Publication No. WO 2005/081319,
`
`with English translation (“Wirth”).
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`-1-
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`IPR2018-00965 Patent Owner’s Response
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`In the Institution Decision (Paper 15), the Board independently discussed the
`
`dimensions of a substrate 12 (i.e. a wafer, not an LED die) disclosed in Weeks (see
`
`Paper 15, 12), and then relied upon its own independent consideration of Weeks’
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`wafer dimensions to conclude that “Weeks’ backside, corresponding to the bottom
`
`of substrate 12, meets the limitation of a ‘bottom major surface’” of an LED die.
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`Paper 15, 18-19. But Petitioners never discussed the disclosure of Weeks’ wafer
`
`dimensions in their analysis of whether Weeks discloses a “bottom major surface”
`
`of the LED die. See, e.g., Pet., 20-21, 32. Further, Dr. Shealy confirmed at
`
`deposition that the Board’s Institution Decision misinterpreted Weeks’ disclosure,
`
`explaining that the relied-upon dimensions in Weeks refer to the entire wafer, not
`
`an individual LED die. Ex. 2008, 150:3-151:1 (testifying that Weeks, Col. 4, lines
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`40-50 disclose a “wafer dimension,” not an LED dimension).
`
`It would “not be proper for the Board to deviate from the grounds in the
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`petition and raise its own obviousness theory,” Sirona Dental Sys. GmbH v. Institut
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`Straumann AG, 892 F.3d 1349, 1356 (Fed. Cir. 2018), and the Board’s need to
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`look outside the Petition in order to determine whether Weeks discloses this
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`particular feature of the challenged claims confirms that the Petition itself is
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`deficient in its analysis. As the Supreme Court ruled in SAS Institute Inc. v. Iancu,
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`584 U.S. ___, 138 S. Ct. 1348, 1355 (2018), the AIA’s statutory scheme confirms
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`4 Ex. 1009, U.S. Patent Application Publication No. 2004/0217360 (“Negley”).
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`-2-
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`
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`IPR2018-00965 Patent Owner’s Response
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`that the petition must govern the proceedings, not the Board’s independent
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`consideration of whether the claimed features are disclosed or suggested by the
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`asserted references. Id. (“From the outset, we see that Congress chose to structure
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`a process in which it’s the petitioner, not the Director, who gets to define the
`
`contours of the proceeding. … Nothing suggests the Director enjoys a license to
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`depart from the petition and institute a different inter partes review of his own
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`design”).
`
`The Board’s analysis of Wirth contains a similar flaw in that it converts the
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`burden of providing unpatentability, which is always on the Petitioners (see 35
`
`U.S.C. § 316(e)), into Patent Owner’s burden of proving patentability.
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`Specifically, in evaluating whether this same feature was disclosed by Wirth,
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`namely whether Wirth discloses a “bottom major surface” of the LED die
`
`substrate, the Board reasons that “Patent Owner fails to explain why the bottom of
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`Wirth’s optoelectronic component 1 and hence carrier 3 fails to meet the claim
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`language.” Paper 15, 19-20. But the Petition includes no basis to justify its
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`assertion that Wirth allegedly discloses a “bottom major surface” of an LED die
`
`substrate, and it is not Patent Owner’s burden to defeat unsupported
`
`characterizations that are neither explained nor developed in the Petition.
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`Finally, the Board instituted the grounds based on Negley even though the
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`Board noted that “Petitioner does not explain how contact 255 that is formed
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`-3-
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`IPR2018-00965 Patent Owner’s Response
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`adjacent to substrate 210b is also formed on substrate 210b.” Paper 15, 20
`
`(emphasis added). Each of the challenges asserted in the Petition relies on Weeks,
`
`Wirth, or Negley to allegedly disclose the “bottom major surface” of the LED die
`
`substrate, but the Petition is defective in established all claimed features in each of
`
`these challenges.
`
`Moreover, the deposition of Petitioners’ declarant, Dr. Shealy, reveals that
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`even more is missing from the Petition’s analysis. Dr. Shealy took the position at
`
`deposition that a bottom major “surface” must be planar, something at least Weeks
`
`and Wirth clearly lack and something else not explained in the Petition. This
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`failure of the Petition is explained in more detail in Sections IV.B and V below.
`
`II. THE ’787 PATENT CLAIMS, INTER ALIA, A SPECIFIC
`ARRANGEMENT OF THE ANODE AND CATHODE ON A
`SEMICONDUCTOR DIE
`
`The ’787 patent, entitled “Semiconductor Device Incorporating with a Light
`
`Emitting Semiconductor Die,” discloses a semiconductor device having a
`
`semiconductor die arranged on a packaging device. To avoid use of a bonding
`
`wire to link the semiconductor die with a bonding pad, the semiconductor die has
`
`both an anode and a cathode on a bottom major surface of the semiconductor die,
`
`where the bottom major surface of the die is also a bottom surface of a substrate of
`
`the semiconductor die.
`
`-4-
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`
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`IPR2018-00965 Patent Owner’s Response
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`FIGS. 8A, 8B, and 8C of the ’787 patent show examples of a semiconductor
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`device having a semiconductor die 750, bond pads 760 and 762, bonding pads 730
`
`and 732, substrate 710, connecting pads 740 and 742, and edge interconnecting
`
`elements 770 and 772. The top view from FIG. 8A of this exemplary
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`semiconductor device 800 and a side view from FIG. 8B are reproduced below:
`
`
`
`
`
`
`
`-5-
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`
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`IPR2018-00965 Patent Owner’s Response
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`In this exemplary embodiment, the semiconductor die 750 has both an anode
`
`and a cathode on a bottom major surface of the semiconductor die, respectively
`
`connected to bond pads 760 and 762. Further, the bottom major surface of the
`
`semiconductor die is also the bottom surface of a substrate of the semiconductor
`
`die. Petitioners provided the following annotation of FIG. 7B in this Petition, with
`
`the bottom major surface of semiconductor die 750 marked:
`
`
`
`Pet., 11.
`
`However, Petitioners’ challenges against the ’787 patent set forth proposed
`
`constructions of terms relating to “the LED” (Pet., 10)5 that unreasonably broaden
`
`the scope of the challenged claims. Petitioners’ unreasonably broad constructions
`
`include structures which do not have a light emitting semiconductor die with an
`
`5 Petitioner uses “LED” in the Petition to refer to a light emitting semiconductor
`
`die. Pet., 5 n.2.
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`-6-
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`
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`IPR2018-00965 Patent Owner’s Response
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`anode and a cathode formed on a bottom major surface of the semiconductor die,
`
`the bottom major surface of the semiconductor die also being a bottom surface of a
`
`substrate of the semiconductor die. Further, as explained in Section IV.B below,
`
`Dr. Shealy explains that a “surface” must be planar, another feature missing from
`
`the asserted references, including at least the primary references, Weeks, and
`
`Wirth. Under the correct constructions, the asserted art fails to disclose all features
`
`recited in the claims.
`
`In particular, when properly construed, the claims are neither disclosed nor
`
`suggested by the relied-upon art in the Petition. The primary references,
`
`Lumbard,6 Ishidu,7 and Ogawa8 do not disclose (either expressly or inherently) a
`
`bottom major surface of the LED die having both an anode and a cathode formed
`
`thereon, where the bottom major surface is also bottom surface of a substrate of the
`
`semiconductor die. Petitioners acknowledge this shortcoming of the primary
`
`references, and therefore look to secondary references Weeks, Wirth, and Negley
`
`in a failed attempt to remedy these shortcomings. But Petitioners incorrectly
`
`characterize the references’ features, and each challenged claim must survive.
`
`Each of these defects, and other defects in the Petition, are addressed below.
`
`6 Ex. 1006, U.S. Patent No. Re. 36,614 (“Lumbard”).
`
`7 Ex. 1010, U.S. Patent Application Publication No. 2006/0198162 (“Ishidu”).
`
`8 Ex. 1011, U.S. Patent Application Publication No. 2006/0113906 (“Ogawa”).
`
`-7-
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`
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`IPR2018-00965 Patent Owner’s Response
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`III. THE STATUTES AND REGULATIONS GOVERNING INTER
`PARTES REVIEW REQUIRE THAT THIS PROCEEDING BE
`DISMISSED
`In order for the Board to institute an inter partes review, a petitioner must
`
`establish that there is a “reasonable likelihood that the petitioner would prevail
`
`with respect to at least 1 of the claims challenged in the petition.” 35 U.S.C. §
`
`314(a). Further, prior to SAS Institute Inc. v. Iancu, 584 U.S. ___, 138 S. Ct. 1348
`
`(2018), the Director, as required by 35 U.S.C. § 316, implemented regulations in a
`
`manner that required claim-by-claim and ground-by-ground evaluation and
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`permitted claim-by-claim and ground-by-ground institution. See 37 C.F.R. § 42.
`
`Under the heading “Sufficient grounds,” 37 C.F.R. § 42.108(c) provided that
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`“Inter partes review shall not be instituted for a ground of unpatentability unless
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`the Board decides that the petition supporting the ground would demonstrate that
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`there is a reasonable likelihood that at least one of the claims challenged in the
`
`petition is unpatentable.” (emphasis added).
`
`In implementing its final rules, the Agency stated, “[t]he Board will identify
`
`the grounds upon which the review will proceed on a claim-by-claim basis. Any
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`claim or issue not included in the authorization for review is not part of the
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`review.” See 77 Fed. Reg. 48,689. Indeed, the Agency specifically stated that the
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`regulations did not adopt comments requesting that “all challenged claims to be
`
`included in the inter partes review when there is a reasonable likelihood of
`
`-8-
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`
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`IPR2018-00965 Patent Owner’s Response
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`prevailing with respect to one challenged claim.” See 77 Fed. Reg. 48,702-03.
`
`Post-SAS, and though required under 35 U.S.C. § 316(a)-(b), the Agency has not
`
`issued new rules that would permit the Board to institute all grounds against all
`
`challenged claims even though a petitioner failed to establish a reasonable
`
`likelihood of prevailing on all challenged claims and all grounds.
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`Moreover, the Patent Office can and should, consistent with SAS, reject any
`
`petition containing any deficient challenge, as 35 U.S.C. § 316 permits the Board
`
`to prescribe regulations after considering “the effect of any such regulation on the
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`economy, the integrity of the patent system, the efficient administration of the
`
`Office, and the ability of the Office to timely complete proceedings instituted
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`under this chapter.” Therefore, once the Board finds any challenge to any claim
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`deficient, the sole permissible outcome, consistent with both the binary decision
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`required under SAS (either all challenged claims or none must be instituted) and the
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`Board’s governing regulations (only challenged claims in which there is a
`
`reasonable likelihood of prevailing on unpatentability may be instituted), is for the
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`Board to deny inter partes review for any petition containing any deficient ground.
`
`Here, among the other defects addressed in Section I above and Sections IV-
`
`V below, the Petition failed to establish that Negley’s anode is formed on a bottom
`
`major surface of an LED die substrate, as required by the challenged claims. Paper
`
`15, 20 (“We agree with Patent Owner, however, that Petitioner has not shown that
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`-9-
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`
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`IPR2018-00965 Patent Owner’s Response
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`the anode (first electrical contact 255) is formed on the bottom major surface of the
`
`substrate as claimed. … Based on the record before us, Petitioner does not explain
`
`how contact 255 that is formed adjacent to substrate 210b is also formed on
`
`substrate 210b.”) (citing Prelim. Resp. 29). This clear defect confirms that
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`Petitioners failed to establish a “reasonable likelihood” of establishing
`
`unpatentability of any challenged claim based on Negley. See 35 U.S.C. § 314(a).
`
`Accordingly, in order for the Board to be in compliance with both its
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`statutory authority, 35 U.S.C. et. seq., as interpreted by SAS, and the Regulations
`
`promulgated under 35 U.S.C. § 316 (37 C.F.R. § 42), this inter partes review
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`should be dismissed without a final written decision. See 35 U.S.C. § 318(a)
`
`(indicating dismissal obviates requirement for a final written decision).
`
`IV. PETITIONERS FAIL TO ACCURATELY IDENTIFY THE SCOPE
`OF THE CLAIMS BEING CHALLENGED
`A. Disputed Claims
`Elements of an exemplary semiconductor device are claimed in the ’787
`
`patent, of which claims 1-14 are at issue in this IPR proceeding. In full, the
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`challenged claims of the ’787 patent recite (with the highlighting of the elements to
`
`be addressed below):
`
`1. A semiconductor device comprising:
`a substantially planar substrate having first and second
`major surfaces, the first and second major surfaces
`being opposed surfaces;
`
`-10-
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`
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`IPR2018-00965 Patent Owner’s Response
`
`a light emitting semiconductor die comprising a top
`major light emitting surface and an oppositely-
`disposed bottom major surface, the light emitting
`semiconductor die having an anode and a cathode
`on the bottom major surface of the light emitting
`semiconductor die, the anode and the cathode of
`the
`light emitting semiconductor die being
`electrically connected
`to
`first and
`second
`electrically conductive bonding pads located on the
`first major surface,
`the semiconductor
`light
`emitting die being mounted on at least the first
`electrically conductive bonding pad such that one
`of the anode and the cathode on the bottom major
`surface of the light emitting semiconductor die is
`electrically connected
`to the first electrically
`conductive bonding pad;
`first and second electrically conductive connecting pads
`located on the second major surface;
`a first electrically conductive interconnecting element
`electrically connected
`to the first electrically
`conductive bonding pad and the first electrically
`conductive connecting pad; and
`a second electrically conductive interconnecting element
`electrically connected to the second electrically
`conductive bonding pad and the second electrically
`conductive connecting pad,
`
`-11-
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`
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`IPR2018-00965 Patent Owner’s Response
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`wherein the bottom major surface of the light emitting
`semiconductor die is a bottom surface of a
`substrate of the die, each of the anode and
`cathode comprises a metallization layer formed
`on the bottom major surface of the light emitting
`semiconductor die.
`
`
`2.
`
`
`3.
`
`The semiconductor device of claim 1 wherein at
`least one of the first and second electrically
`conductive interconnecting elements is on at least
`one sidewall of the substantially planar substrate
`and electrically interconnects one of the first and
`second electrically conductive bonding pads to one
`of the first and second electrically conductive
`connecting pads.
`
`The semiconductor device of claim 2 wherein the
`first
`electrically
`conductive
`interconnecting
`element is on a sidewall of the substantially planar
`substrate and electrically interconnects the first
`electrically conductive bonding pad to the first
`electrically conductive connecting pad and the
`second electrically conductive
`interconnecting
`element is on the same sidewall or another
`sidewall of the substantially planar substrate and
`electrically interconnects the second electrically
`
`-12-
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`
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`IPR2018-00965 Patent Owner’s Response
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`
`4.
`
`
`5.
`
`
`6.
`
`conductive bonding pad to the second electrically
`conductive connecting pad.
`
`The semiconductor device of claim 2 wherein the
`at least one of the first and second electrically
`conductive interconnecting elements is situated
`within a partial cylindrical depression in the at
`least one sidewall of the substantially planar
`substrate.
`
`The semiconductor device of claim 1, wherein the
`light emitting semiconductor die is also mounted
`on the second electrically conductive bonding pad
`such that the anode and the cathode of the light
`emitting
`semiconductor die, are electrically
`connected to the first and second electrically
`conductive bonding pads, respectively.
`
`The semiconductor device of claim 1 wherein the
`light emitting semiconductor die is a light emitting
`diode die.
`
`
`7. A semiconductor device comprising:
`a substantially planar substrate having first and second
`major surfaces, the first and second major surfaces
`being opposed surfaces;
`
`-13-
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`IPR2018-00965 Patent Owner’s Response
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`first and second electrically conductive bonding pads
`located on the first major surface;
`a light emitting semiconductor die comprising a top
`major light emitting surface and an oppositely-
`disposed bottom major surface, the light emitting
`semiconductor die having an anode and a cathode
`on the bottom major surface of the light emitting
`semiconductor die,
`the semiconductor
`light
`emitting die being mounted on the first and second
`electrically conductive bonding pads such that the
`anode of the light emitting semiconductor die is
`electrically connected
`to the first electrically
`conductive bonding pad and the cathode of the
`light emitting semiconductor die is electrically
`connected to the second electrically conductive
`bonding pad;
`first and second electrically conductive connecting pads
`located on the second major surface;
`a first electrically conductive interconnecting element
`electrically connected
`to the first electrically
`conductive bonding pad and the first electrically
`conductive connecting pad; and
`a second electrically conductive interconnecting element
`electrically connected to the second electrically
`conductive bonding pad and the second electrically
`conductive connecting pad,
`
`-14-
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`
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`IPR2018-00965 Patent Owner’s Response
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`wherein the bottom major surface of the light emitting
`semiconductor die is a bottom surface of a
`substrate of the die, each of the anode and
`cathode comprises a metallization layer formed
`on the bottom major surface of the light emitting
`semiconductor die.
`
`
`8.
`
`
`9.
`
`The semiconductor device of claim 7 wherein at
`least one of the first and second electrically
`conductive interconnecting elements is on at least
`one sidewall of the substantially planar substrate
`and electrically interconnects one of the first and
`second electrically conductive bonding pads to one
`of the first and second electrically conductive
`connecting pads.
`
`The semiconductor device of claim 8 wherein the
`first
`electrically
`conductive
`interconnecting
`element is on a sidewall of the substantially planar
`substrate and electrically interconnects the first
`electrically conductive bonding pad to the first
`electrically conductive connecting pad and the
`second electrically conductive
`interconnecting
`element is on the same sidewall or another
`sidewall of the substantially planar substrate and
`electrically interconnects the second electrically
`
`-15-
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`IPR2018-00965 Patent Owner’s Response
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`conductive bonding pad to the second electrically
`conductive connecting pad.
`
`
`10. The semiconductor device of claim 8 wherein the
`at least one of the first and second electrically
`conductive interconnecting elements is situated
`within a partial cylindrical depression in the at
`least one sidewall of the substantially planar
`substrate.
`
`
`11. A semiconductor device comprising:
`a substantially planar substrate having first and second
`major surfaces, the first and second major surfaces
`being opposed surfaces;
`first and second electrically conductive bonding pads
`located on the first major surface;
`a light emitting semiconductor die comprising a top
`major light emitting surface and an oppositely-
`disposed bottom major surface, the light emitting
`semiconductor die having an anode and a cathode
`on the bottom major surface of the light emitting
`semiconductor die, the anode and the cathode of
`the
`light emitting semiconductor die being
`electrically connected to the first and second
`electrically
`conductive
`bonding
`pads,
`the
`semiconductor light emitting die being mounted on
`at least the first electrically conductive bonding
`
`-16-
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`IPR2018-00965 Patent Owner’s Response
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`pad such that one of the anode and the cathode on
`the bottom major surface of the light emitting
`semiconductor die is electrically connected to the
`first electrically conductive bonding pad;
`first and second electrically conductive connecting pads
`located on the second major surface;
`a first electrically conductive interconnecting element
`electrically connected
`to the first electrically
`conductive bonding pad and the first electrically
`conductive connecting pad; and
`a second electrically conductive interconnecting element
`electrically connected to the second electrically
`conductive bonding pad and the second electrically
`conductive connecting pad, wherein at least one of
`the
`first and second electrically conductive
`interconnecting elements is located on at least one
`sidewall of the substantially planar substrate,
`wherein the bottom major surface of the light emitting
`semiconductor die is a bottom surface of a
`substrate of the die, each of the anode and
`cathode comprises a metallization layer formed
`on the bottom major surface of the light emitting
`semiconductor die.
`
`
`12. The semiconductor device of claim 11 wherein the
`first
`electrically
`conductive
`interconnecting
`element is on a sidewall of the substantially planar
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`IPR2018-00965 Patent Owner’s Response
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`substrate and electrically interconnects the first
`electrically conductive bonding pad to the first
`electrically conductive connecting pad and the
`second electrically conductive
`interconnecting
`element is on the same sidewall or another
`sidewall of the substantially planar substrate and
`electrically interconnects the second electrically
`conductive bonding pad to the second electrically
`conductive connecting pad.
`
`
`13. The semiconductor device of claim 11 wherein the
`at least one of the first and second electrically
`conductive interconnecting elements is situated
`within a partial cylindrical depression in the at
`least one sidewall of the substantially planar
`substrate.
`
`
`14. The semiconductor device of claim 11, wherein the
`light emitting semiconductor die is also mounted
`on the second electrically conductive bonding pad
`such that the anode and the cathode of the light
`emitting
`semiconductor die are electrically
`connected to the first and second electrically
`conductive bonding pads, respectively.
`’787 patent, 14:6-16:57.
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`B. Claim Construction
`The ’787 patent was filed in the United States on August 14, 2007 as a
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`continuation-in-part of U.S. Patent Application No. 10/608,605, filed on June 27,
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`2003 (now U.S. Patent No. 7,256,486), and issued on April 5, 2011. Accordingly,
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`the ’787 patent is not expected to expire prior to any Final Written Decision in this
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`IPR. See 35 U.S.C. § 154(a)(2); 37 C.F.R. § 42.100(b).
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`Petitioners state that the Board applies the “broadest reasonable construction
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`(‘BRI’) in light of the specification” to the ’787 patent. Pet., 10. Allegedly
`
`applying BRI, Petitioners propose the following constructions “with respect to
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`limitations of the LED, not the substrate packaging assembly:”
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` “[top] major light emitting surface” means “of the two largest faces of
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`the LED, the face through which light is emitted;”
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` “an oppositely-disposed [bottom] major surface” means “of the two
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`largest faces of the LED, the face opposite the light emitting face;”
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`and
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` “the [bottom] major surface … is a bottom surface of a substrate of
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`the die” means “the face of the LED opposite the light emitting face is
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`on the substrate side of the LED.”
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`Pet., 10-13 (emphasis added). As is clear from Petitioners’ proposed constructions,
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`Petitioners incorrectly interpret the major surfaces of the LED to be synonymous
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`IPR2018-00965 Patent Owner’s Response
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`with the largest faces of the LED. Petitioners repeat this unsupported exchange of
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`terms in their analysis of the claims as well, stating that the ’787 patent “is
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`consistent in its usage of ‘major surface’ to refer, as a matter of geometric
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`orientation, to a face that is greater in size than the other faces of the element being
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`described.” Pet., 11 (citing Ex. 1003, ¶¶49-51) (emphasis added).
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`But Petitioners’ interpretation exceeds the broadest reasonable interpretation
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`of “surface” according to the ’787 patent specification, and there is no justification
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`presented in the Petition, Dr. Shealy’s declaration, or even Dr. Shealy’s deposition
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`transcript for this unsupported substitution of “surface” for “face.” Of course, the
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`purpose of claim construction is not simply to identify potential synonyms of claim
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`terms and swap them out without reason; rather, the purpose is to “accord a claim a
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`meaning it would have to a person of ordinary skill in the art at the time of the
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`invention.” Innova/Pure Water, Inc. v. Safari Water Filtration Systems, Inc., 381
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`F.3d 1111, 1116 (Fed. Cir. 2004).
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`Indeed, Dr. Shealy’s deposition testimony confirms that the Petition’s
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`proposed constructions are contrary to law because they fail to capture the
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`understanding of a POSITA. Dr. Shealy testified at deposition that the term
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`“surface” cannot simply be swapped with the term “face.” Ex. 2008, 139:22-140:7
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`(testifying, as to “face” and “surface,” that “the terms aren’t equivalent”). Dr.
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`Shealy then clarifies that the terms could be equivalent in specific circumstances,
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`IPR2018-00965 Patent Owner’s Response
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`such as with a “rectangular box” (Ex. 2008, 142:11-21; 143:6-7), which is not the
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`shape of the LED dies being asserted from Weeks and Wirth.9
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`Importantly, Dr. Shealy placed an additional, unqualified limitation on the
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`proper construction of “surface” in the context of the ’787 patent in the following
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`exchange:
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`Q: -- for the record. So how would a person of ordinary
`skill in the art on August 14, 2007, have understood the
`term "surface"?
`MR. COLSHER: Objection to form.
`THE WITNESS: Well, in the context -- if I can add a
`slight restriction, the context that's used here, the surface
`would be a plane.
`BY MR. JACKSON: Q: Okay.
`A: A mathematical plane.
`Ex. 2008, 139:11-21 (emphasi