`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`
`INTEL CORP., and CAVIUM, LLC
`Petitioner,
`
`v.
`
`ALACRITECH, INC.
`Patent Owner.
`
`________________________
`
`Case IPR. IPR2018-002341
`U.S. Patent No. 8,805,948
`Title: INTELLIGENT NETWORK INTERFACE SYSTEM AND METHOD FOR
`PROTOCOL PROCESSING
`________________________
`
`
`
`
`INTEL CORPORATION’S UPDATED EXHIBIT LIST
`
`
`
`
`Mail Stop “PATENT BOARD”
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`
`1 Cavium, LLC, which filed a Petition in Case IPR2018-00403, has been joined as a petitioner in
`
`this proceeding.
`
`
`
`1
`
`
`
`Intel’s Updated Exhibit List
`
`Exhibit #
`Ex.1001
`
`Description
`U.S. Patent No. 8,805,948 (“948 Patent”)
`
`Ex.1002
`
`Excerpts from Prosecution File History of U.S. Patent No.
`8,805,948 (“948 File History”)
`
`Ex.1003
`
`Declaration of Robert Horst
`
`Ex.1004
`
`Curriculum Vitae of Robert Horst
`
`Ex.1005
`
`U.S. Patent No. 5,768,618 (“Erickson”)
`
`Ex.1006
`
`Ex.1007
`
`Ex.1008
`
`Ex.1009
`
`Tanenbaum, Andrew S., Computer Networks, Prentice-Hall, Inc.,
`New Jersey (1996). (“Tanenbaum96”)
`
`Transmission Control Protocol, “Darpa Internet Protocol
`Specification”, RFC: 793, Sept. 1981. (“RFC 793”)
`
`Stevens, W. Richard, TCP/IP Illustrated Volume 1: The
`Protocols, Addison-Wesley (1994). (“Stevens1”)
`
`Lilinkamp, J., Mandell. R. and Padlipsky, M., “Proposed Host-
`Front End Protocol”, Network Working Group Request for
`Comments: 929, Dec. 1984. (“RFC 929”)
`
`Exs.1010 Not Used
`
`Ex. 1011
`
`Librarian Declaration of Rice Mayors regarding Andrew S.
`Tanenbaum, Computer Networks (3rd ed. 1996) (Ex.1006,
`“Tanenbaum96”)
`
`Ex. 1012
`
`Not Used
`
`Ex.1013
`
`Stevens, W. Richard and Gary R. Wright, TCP/IP Illustrated
`Volume 2: The Implementation, Addison-Wesley (1995).
`(“Stevens2”)
`
`Ex.1014
`
`Not Used
`
`
`
`2
`
`
`
`Intel’s Updated Exhibit List
`
`
`Exhibit #
`
`Ex.1015
`
`Description
`Thia, Y.H., Woodside, C.M., “A Reduced Operation Protocol
`Engine (ROPE) for a Multiple-Layer Bypass Architecture”,
`Protocols for High Speed Networks (Dordrecht), 1995. (“Thia
`and Woodside”)
`
`Ex.1016
`
`Ex.1017
`
`Ex.1018
`
`Ex.1019
`
`Biersack, E. W., Rütsche E., “Demultiplexing on the ATM
`Adapter: Experiments with Internet Protocols in User Space”,
`Journal on High Speed Networks, Vol. 5, No. 2, May 1996.
`(“Biersack”)
`
`Rütsche, E., Kaiserswerth, M., “TCP/IP on the Parallel Protocol
`Engine”, Proceedings, IFIP Conference on High Performance
`Networking, Liege (Belgium), Dec. 1992. (“Rütsche92”)
`
`Rütsche, E., “The Architecture of a Gb/s Multimedia Protocol
`Adapter”, Computer Communication Review, 1993.
`(“Rütsche93”)
`
`Padlipsky, M. A., “A Proposed Protocol for Connecting Host
`Computers to Arpa-Like Networks Via Directly-Connected Front
`End Processors”, Network Working Group RFC #647, Nov.
`1974. (“RFC 647”)
`
`Ex.1020
`
`U.S. Patent No. 5,619,650 (“Bach”)
`
`Ex.1021
`
`U.S. Patent No. 5,915,124 (“Morris”)
`
`Ex.1022
`
`Ex.1023
`
`Ex.1024
`
`Cooper, E.C., et al., “Protocol Implementation on the Nectar
`Communication Processor”, School of Computer Science,
`Carnegie Mellon University, Sept. 1990. (“Cooper”)
`
`Kung, H.T., et al., “A Host Interface Architecture for High-Speed
`Networks”, School of Computer Science, Carnegie Mellon
`University and Network Systems Corporation. (“Kung”)
`
`Exhibit D to Declaration of Dr. Gregory L. Chesson in Support of
`Microsoft’s Opposition to Alacritech’s Motion for Preliminary
`Injunction: “Protocol Engine Handbook”, Protocol Engines
`Incorporated, Oct. 1990. (“Chesson”)
`
`
`
`
`
`Intel’s Updated Exhibit List
`
`
`Exhibit #
`
`Ex.1025
`
`Description
`Kanakia, H., Cheriton, D.R., “The VMP Network Adapter Board
`(NAB): High-Performance Network Communication for
`Multiprocessors”, Communications Architectures & Protocols,
`Stanford University, Aug. 1988. (“Kanakia”)
`
`Ex.1026
`
`Ex.1027
`
`Ex.1028
`
`Ex.1029
`
`Ex.1030
`
`Ex.1031
`
`Ex.1032
`
`Ex.1033
`
`Ex.1034
`
`Kung, H.T., Cooper, E.C., et al., “Network-Based
`Multicomputers: An Emerging Parallel Architectures”, School of
`Computer Science, Carnegie Mellon University. (“Kung and
`Cooper”)
`
`Dalton, C., et al., “Afterburner: Architectural Support for High-
`Performance Protocols”, Networks & Communications
`Laboratories, HP Laboratories Bristol, July 1993. (“Dalton”)
`
`Murphy, E., Hayes, S., Enders, M., TCP/IP Tutorial and
`Technical Overview Fifth Edition, Prentice-Hall, Inc. New Jersey,
`(1995). (“Murphy”)
`
`MacLean, A.R., Barvick, S. E., “An Outboard Processor for High
`Performance Implementation of Transport Layer Protocols”,
`IEEE Globecom ’91, Phoenix, AZ, Dec. 1991. (“MacLean”)
`
`Clark, D.D., et al., “An Analysis of TCP Processing Overhead”,
`IEEE Communications Magazine, June 1989. (“Clark”)
`
`Provisional Application 60/061,809 (“Alacritech 1997
`Provisional Application”)
`
`Culler, E.C., et al., “Parallel Computing on the Berkeley NOW”,
`Computer Science Division, University of California, Berkeley.
`(“Culler”)
`
`“Gigabit Ethernet Technical Brief: Achieving End-to-End
`Performance”, Alteon Networks, Inc. First Edition, Sept. 1996.
`(“Alteon”)
`
`Smith, J.A., Primmer, M., “Tachyon: A Gigabit Fibre Channel
`Protocol Chip”, Hewlett-Packard Journal, Article 12, Oct. 1996.
`(“Smith”)
`
`
`
`
`
`Intel’s Updated Exhibit List
`
`
`Exhibit #
`
`Ex.1035
`
`Description
`Patterson, D.A., Hennessy, J.L., Computer Architecture: A
`Quantitative Approach, Morgan Kaufmann Publishers, Inc., San
`Mateo, CA (1990). (“Patterson”)
`
`Exs.1036
`
`Internet Protocol, “Darpa Internet Protocol Specification”, RFC:
`791, Sept. 1981. (“RFC 791”)
`
`Ex. 1037
`
`Not Used
`
`Ex.1038
`
`Woodside, C. M., Ravindran, K., and Franks, R. G. “The protocol
`bypass concept for high speed OSI data transfer.” IFIP Workshop
`on Protocols for High Speed Networks. 1990. (“Woodside”)
`
`Exs.1039-
`1062
`
`Not Used
`
`Ex.1063
`
`Librarian Declaration of Pamela Stansbury regarding Gary R.
`Wright & W. Richard Stevens, TCP/IP Illustrated: The
`Implementation (1995) (Ex.1013, “Stevens2”).
`
`Ex.1064
`
`Ex.1065-
`1094
`
`Ex. 1095
`
`Librarian Declaration of Lisa Rowlison de Ortiz re Y.H. Thia &
`C.M. Woodside, A Reduced Operation Protocol Engine (ROPE)
`for a Multiple-layer Bypass Architecture (1995) (Ex.1015,
`“Thia”)
`
`Not Used
`
`Stevens, W. Richard and Gary R. Wright, TCP/IP Illustrated
`Volume 2: The Implementation, Addison-Wesley (1995) (With
`1995 Copyright Page) (“Stevens2”)
`
`Ex.1096
`
`U.S. Pat. No. 6,011,795
`
`Ex.1097-
`1099
`
`Ex. 1100
`
`Not Used
`
`Increasing TCP Throughput By Using an Extended
`Acknowledgement Interval (1995)
`
`
`
`
`
`Intel’s Updated Exhibit List
`
`
`Exhibit #
`Ex.1101
`
`Not Used
`
`Description
`
`Ex.1102
`
`Ex.1103
`
`Ex.1104
`
`Ex.1105
`
`Internetworking over ATM: Experiences with IP/IPng and RSVP
`Alexander Schill, Sabine Kühn, Frank Breiter Computer
`Networks and ISDN Systems Volume 28, Issue 14, November
`1996, Pages 1915-1927
`
`Thesis: Multimedia Realtime Transport Protocol Over ATM
`Network (Dec. 1996)
`
`Network Security Via Reverse Engineering of TCP Code:
`Vulnerability Analysis and Proposed Solutions (Nov. 7, 1995)
`
`PROLAC: A LANGUAGE FOR PROTOCOL COMPILATION
`(Sep. 1997)
`
`Ex.1106
`
`Protocols for Adaptive Wireless and Mobile Networking (1996)
`
`Ex.1107
`
`RFC 2001 (Jan. 1997)
`
`Ex.1108
`
`Ex.1109
`
`The Performance of TCP/IP for networks with high bandwidth-
`delay products and random loss
`
`Thesis: Measurements and Analysis of End-to-End Internet
`Dynamics (Apr. 1997)
`
`Ex.1110
`
`October 2, 2018 Telephonic Hearing Transcript
`
`
`Dated: October 9, 2018
`
`
`
`Respectfully submitted,
`/s/ Garland T. Stephens
`Garland T. Stephens, Reg. No. 37,242
`Justin L. Constant, Reg. No. 66,883
`Weil, Gotshal & Manges LLP
`700 Louisiana, Suite 1700
`Houston, TX 77002
`Tel: (713) 546-5000
`Fax: (713) 224-9511
`garland.stephens@weil.com
`
`
`
`
`
`Intel’s Updated Exhibit List
`
`
`justin.constant@weil.com
`
`Anne M. Cappella, Reg. No. 43,217
`Adrian Percer, Reg. No. 46,986
`Weil, Gotshal & Manges LLP
`201 Redwood Shores Parkway
`Redwood Shores, CA 94065
`Tel: (650) 802-3141
`Fax: (650) 802-3100
`anne.cappella@weil.com
`adrian.percer@weil.com
`
`William S. Ansley, Reg. No. 67,828
`Weil, Gotshal & Manges LLP
`2001 M Street, N.W, Suite 600
`Washington, DC 20036
`Tel: (202) 682-7000
`Fax: (202) 857-0940
`sutton.ansley@weil.com
`Attorneys for Petitioner Intel Corporation
`
`
`
`
`
`
`
`
`
`
`
`Intel’s Updated Exhibit List
`
`
`CERTIFICATE OF SERVICE (37 C.F.R. § 42.6(e))
`The undersigned hereby certifies that the above-captioned “Intel
`
`
`
`Corporation’s Updated Exhibit List,” along with Exhibit 1110, were served in their
`
`entirety on October 9, 2018, upon the following parties via email:
`
`James M. Glass
`Registration No. 46,729
`Quinn Emanuel Urquhart & Sullivan LLP
`51 Madison Ave., 22nd Fl.
`New York, NY 10010
`Tel.: (212) 849-7000
`Email: jimglass@quinnemanuel.com
`
`Joseph M. Paunovich
`Registration No. 59,033
`Quinn Emanuel Urquhart & Sullivan LLP
`865 S. Figueroa Street, 10th Fl.
`Los Angeles, CA 90017
`Tel.: (213) 443-3000
`Email: joepaunovich@quinnemanuel.com
`
`Brian E. Mack
`Registration No. 57,189
`Quinn Emanuel Urquhart & Sullivan LLP
`50 California Street, 22nd Fl.
`San Francisco, CA 94111
`Tel.: (415) 875-6600
`Email: brianmack@quinnemanuel.com
`
`Mark Lauer
`Registration No. 36,578
`Silicon Edge Law Group LLP
`7901 Stoneridge Dr., Ste. 528
`Pleasanton, CA 94588
`Tel.: (925) 621-2121
`Email: mark@siliconedgelaw.com
`
`
`
`
`
`Dated: October 9, 2018
`
`
`
`Intel’s Updated Exhibit List
`
`
`
`
`By: /s/ Garland T. Stephens
`Garland T. Stephens
`Registration No. 37,242
`(garland.stephens@weil.com)
`Weil, Gotshal & Manges LLP
`700 Louisiana St., Suite 1700
`Houston, TX 77002
`T: 713-546-5011
`F: 713-224-9511
`
`
`
`
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