Dr. Gabriel Robins
`Professor of Computer Science
`
`
`
`
`
`Department of Computer Science
`School of Engineering and Applied Science
`University of Virginia
`85 Engineer's Way, P.O. Box 400740
`Charlottesville, VA 22904-4740, USA
`
`robins@cs.virginia.edu
`www.cs.virginia.edu/robins
`Phone: (434) 249-0809
`Office: 406 Rice Hall
`
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`Vitae:
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`Birth place: New York City, NY
`Citizenship: USA
`
`Education
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`• Ph.D. in Computer Science, UCLA, 1992
`• M.S.E. in Computer Science, Princeton University, 1985
`• B.S. in Mathematics and Computer Science, UCLA, 1983
`• A.A., Los Angeles Valley College, 1981
`
`Honors and Awards
`
`1. Society for Industrial and Applied Mathematics (SIAM) Outstanding Paper Prize, 2007
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`2. Packard Foundation Fellowship, 1995-2001 ($550,000)
`
`3. National Science Foundation Young Investigator Award, 1994-1999 ($312,500)
`
`4. Best Presentation Award, IEEE International Conference on Localization and Global
`Navigation Satellite Systems, Torino, Italy, 2013
`
`5. Member of the Army Science Board, U.S. Army, 1998-2001
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`6. Member of the Defense Science Study Group, U.S. Department of Defense, 1994-1995
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`7. Member of the Navy Future Study (of the National Academy of Sciences), 1996-1997
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`8. Walter N. Munster Endowed Chair, 1997-2002
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`9. Two-year early promotion to Associate Professor (with tenure), 1996
`
`10. Promotion to Full Professor (with tenure), 2002
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`11. Faculty Mentor Award, UVa School of Engineering, 1997
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`12. All-University Outstanding Teaching Award, University of Virginia, 1994-1995
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`13. University Teaching Fellowship, University of Virginia, 1995-1996
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`14. Faculty Appreciation Award, Virginia Engineering Foundation, 1998
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`15. Award for "Tireless Dedication to Improving the Department in All Aspects", Department of
`Computer Science, 1998
`
`16. Web Team Award - "In Appreciation for Founding and Leading the Department's Excellent
`Web Team for 6 Years", 2001
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`17. Member of the Faculty Senate, University of Virginia, 1999-2002
`
`18. Member of the School of Engineering Faculty Council, University of Virginia, 1999-2002
`
`19. Associate Editor of IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
`2000-2005
`
`20. Member of the Editorial Board of Research Letters in Electronics, 2007-present
`
`21. Expert Witness for major software and intellectual property litigations, 1996-present
`
`22. Invited paper in IEEE International Conference on Electronics, Circuits and Systems, 2004
`
`23. Nomination for Virginia state-wide (SCHEV) Outstanding Faculty Award, 1995
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`24. Nomination for NSF Presidential Faculty Fellows Award, 1995-1996
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`25. National Science Foundation Research Initiation Award, 1993
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`26. Nomination for ACM Best Dissertation Award, 1992
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`27. IBM Graduate Fellowship, 1991-1992
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`28. Distinguished Paper Award, IEEE International Conference on Computer-Aided Design,
`1990
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`29. Nomination for Best Paper Award, Asia and South Pacific Design Automation Conference,
`Hong Kong, January 1999.
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`30. Distinguished Teaching Award, UCLA, 1989
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`31. Chancellor's Distinguished Honor Award
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`32. University of California Regents Scholarship
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`33. Dean's list (10 times)
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`34. Top ranked by students at "Rate My Professor" (RateMyProfessor.com)
`
`Research Interests
`
`Algorithms, optimization, RFID, genomics, bioinformatics, big data, computational geometry,
`computer-aided design (CAD), VLSI, national security, and intellectual property.
`
`Teaching Interests
`
`Theory of computation, algorithms, problem solving, discrete math, VLSI CAD, data structures,
`and computational geometry.
`
`Experience
`
`1. Professor of Computer Science (with tenure), Department of Computer Science, University
`of Virginia (6/2002 to present).
`
`2. Walter N. Munster (endowed chair) Associate Professor of Computer Science (with tenure),
`Department of Computer Science, University of Virginia (6/1997 to 6/2002).
`
`3. Associate Professor (with tenure), Department of Computer Science, University of Virginia,
`(9/1996 to 6/1997).
`
`4. Assistant Professor, Department of Computer Science, University of Virginia (9/1992 to
`9/1996).
`
`5. Co-Founder of Diorama Technologies, an RFID-based startup company that commercializes
`the RFID localization technology that was co-invented, published, and patented by Professor
`Gabriel Robins and his graduate student.
`
`6. Member of the National Academy of Sciences study: Technology for the United States Navy
`and Marine Corps, 2000-2035 - Becoming a 21st Century Force, 1996-1997: our task for this
`DoD advisory panel was to provide the U.S. Navy with a comprehensive strategic vision
`through the year 2035.
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`7. DoD Advisor, Defense Science Study Group (DSSG), Institute for Defense Analysis (IDA)
`(11/93 to present): In the context of this advisory board to the U.S. Department of Defense,
`we met with U.S. Secretary of Defense Bill Perry, as well as with numerous military experts,
`to discuss science and technology issues. We also visited a number of military bases and
`installations.
`
`8. Expert Witness, Cislo & Thomas, Los Angeles, CA (2007-present): Analyzed evidence,
`performed prior art searches, and testified in multi-party patent and intellectual property
`litigations. (Girafa.com Inc. v. Amazon Web Services LLC et al, case number 1:07-cv-
`00787, Delaware District Court, 2007-2010, I assisted Snap Technologies Inc.; Diopsys Inc.
`v. Konan Medical USA Inc., case number 2:15-cv-05882, New Jersey District Court, 2015-
`present, I assisted Konan Medical USA Inc.)
`
`9. Expert Witness, Drinker Biddle & Reath, Chicago, Illinois (2017-present): Performed prior
`art searches and analyzed evidence in a multi-party patent and intellectual property litigation.
`(Papst Licensing GmbH v. Apple Inc. et al, case number 6:15-cv-1095-RWS, Eastern Texas
`District Court, I assisted Samsung, LG, Huawei, and ZTE)
`
`10. Expert Witness, Wilmer Cutler Pickering Hale & Dorr LLP, Palo Alto, CA (2011-2012):
`Analyzed evidence, performed prior art searches, and prepared to testify in a major multi-
`party intellectual property litigation. (Intellectual Ventures v. Altera, Xilinx, et al, case
`number 1:10-cv-01065, Delaware District Court, 2010-2012, I assisted Altera Corp)
`
`11. Expert Witness, Hogan and Lovell, New York, NY (2012-2013): Analyzed evidence and
`performed prior art searches in patent and software intellectual property litigations.
`(Motorola Solutions, Inc. v. Round Rock Research LLC, case number 1:12-cv-00309,
`Delaware District Court, 2012-2013, I assisted Motorola Solutions Inc.)
`
`12. Expert Witness, Covington and Burling LLP, Redwood Shores, CA (2012): Analyzed
`evidence, performed prior art searches, and performed validity analyses RE technology
`patents and intellectual property litigations. (No formal declarations filed nor testimony
`given.)
`
`13. Expert Witness, Federal Bureau of Investigation, San Diego, CA (2004-2006): Analyzed
`evidence in a major software and intellectual property litigation between two large public
`companies. (No formal declarations filed nor testimony given.)
`
`14. Expert Witness, O'Melveny and Myers, San Francisco; Banner and Witcoff, Washington,
`D.C. (2005): Analyzed evidence, created patent claims charts, and helped draft patent
`invalidity filings and re-exam requests in a major patent litigation between two public
`companies. (Synopsys Inc. v. Magma Design Automation Inc., case number 3:04-cv-03923,
`California Northern District Court, 2005, I assisted Magma Design Automation Inc.)
`
`15. Expert Witness, O'Melveny and Myers, San Francisco, CA (1996-2002): Analyzed evidence,
`performed prior art searches, and testified in a billion-dollar software infringement and
`intellectual property litigation between major public companies. (Cadence Design Systems
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`Inc. v. Avant! Corporation, case number 99-17648, United States Ninth Circuit; case
`number S098266, Supreme Court of California, 1996-2002, I assisted Avant! Corporation)
`
`16. Consultant, Morrison & Foerster LLP, San Francisco, CA (2002-2009): Analyzed evidence
`and performed prior art searches and validity analyses in intellectual property litigations. (No
`formal declarations filed nor testimony given.)
`
`17. Consultant, Earl Industries, Newport News, VA, (2008-2011): Performed due-diligence
`analyses, conducted prior art searches, and evaluated technology patent portfolios during
`corporate buyouts. (No formal declarations filed nor testimony given.)
`
`18. Consultant, BOSH Global Services, Newport News, VA, (2012-2014): Conducted prior art
`searches and evaluated IP and technology patents and applications. (No formal declarations
`filed nor testimony given.)
`
`19. Expert Witness, Russ, August and Kabat, Los Angeles, CA (2016-present): Analyzed
`evidence, drafted reports, and testified in patent litigations.
`
`20. Research Assistant, UCLA (9/89 to 7/92): I performed research in layout algorithms for
`performance-driven interconnection, circuit testing, computational geometry, and motion
`planning.
`
`21. Teaching Assistant, UCLA (9/87 to 1/90): I developed and taught a graduate-level course in
`computational geometry, as well as an upper-division course in formal languages and
`automata theory.
`
`22. Researcher, USC Information Sciences Institute (6/85 to 1/89): I helped develop the
`knowledge representation language NIKL. I also designed and implemented the ISI Grapher,
`a portable tool for displaying arbitrary graphs pictorially. My system generated considerable
`interest worldwide, and was marketed commercially.
`
`23. Teaching Assistant, Princeton University (9/83 to 6/85): I taught an undergraduate
`programming course in Pascal using the Apple MacIntosh.
`
`24. Consultant, Xerox Electro-Optical Systems (7/84 to 9/84): I designed and implemented
`critical Ethernet software, allowing VAX 11/780 computers to communicate with Xerox
`1108 workstations.
`
`25. Lab Supervisor, UCLA Mathematics Department (10/82 to 6/83): I supervised an
`undergraduate computing laboratory, helping students with Pascal and C.
`
`26. Programmer, Carnation Research (9/79 to 9/82): I programmed an IBM mainframe computer
`in Fortran, and designed and implemented numerous scientific applications for food-products
`manufacturing.
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`Membership in Professional Societies
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`1. Institute of Electrical and Electronics Engineering (IEEE)
`2. Association for Computing Machinery (ACM)
`3. ACM Special Interest Group on Design Automation (SIGDA)
`4. ACM Special Interest Group on Automata and Comp. Theory (SIGACT)
`
`Books and Book Chapters
`
`1. Robins, G., The ISI Grapher: a Portable Tool for Displaying Graphs Pictorially,
`Multicomputer Vision, Levialdi, S., Chapter 12, Academic Press, London, 1988, pp.
`185-202.
`
`2. Kahng, A. B. and Robins, G., On Optimal Interconnections for VLSI, Kluwer Academic
`Publishers, Boston, MA, 1995, 304 pages.
`
`3. Kahng, A. B., Robins, G., and Walkup, E. A., Optimal Algorithms for Substrate Testing
`in Multi-Chip Modules, in High Performance Design Automation for Multi-Chip
`Modules and Packages, J.-D. Cho and P. D. Franzon, Editors, World Scientific
`Publishing Co., 1996, pp. 181-198.
`
`4. Robins, G. and Zelikovsky, A. Minimum Steiner Tree Construction, in "The Handbook
`of Algorithms for VLSI Physical Design Automation", C. J. Alpert, D. P. Mehta, and S.
`S. Sapatnekar (editors), CRC Press, 2009, Chapter 24, pp. 487-508.
`
`5. Hu, J., Robins, G, and Sze C. N., Timing-Driven Interconnect Synthesis, in "The
`Handbook of Algorithms for VLSI Physical Design Automation", C. J. Alpert, D. P.
`Mehta, and S. S. Sapatnekar (editors), CRC Press, 2009, Chapter 25, pp. 509-534.
`
`6. Bolotnyy, L, and Robins, G., Multi-tag RFID Systems, in "Security in RFID and Sensor
`Networks", Auerbach Publications, CRC Press, Taylor & Francis Group, 2009, pp. 3-
`28.
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`7. Bolotnyy, L, and Robins, G., Physical Privacy and Security in RFID Systems, in
`"Security in RFID and Sensor Networks", Auerbach Publications, CRC Press, Taylor &
`Francis Group, 2009, pp. 77-97.
`
`8. Bolotnyy, L, and Robins, G., Generalized 'Yoking-Proofs' and Inter-Tag Communication,
`in "Development and Implementation of RFID Technology", I-Tech Education and
`Publishing, Vienna, Austria, 2009, Chapter 24, pp. 447-462.
`
`9. Chawla, K. and and Robins, G., Mitigating Covert Channel Attacks in RFID-Enabled
`Supply Chains, in Advanced Security and Privacy for RFID Technologies, IGI Global,
`Hershey, PA, USA, 2013, pp. 176-190.
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`Refereed Journal Papers
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`10. Foster, L., and Robins, G., Solution to a Number Theory Problem, American
`Mathematical Monthly, Vol. 89, No. 7, Aug-Sep, 1982, pp. 499-500.
`
`11. Robins, G., On Style, Expressibility, and Efficiency in Functional Programming
`Languages, UCLA Computer Science Department Quarterly, Fall 1987, pp. 105-121.
`
`12. Kahng, A. B., and Robins, G., Optimal Algorithms for Extracting Spatial Regularity in
`Images, Pattern Recognition Letters, 12, December 1991, pp. 757-764.
`
`13. Cong, J., Kahng A. B., Robins, G., Sarrafzadeh, M., and Wong, C. K., Provably-Good
`Performance-Driven Global Routing, IEEE Transactions on Computer-Aided Design of
`Integrated Circuits and Systems, Vol. 11, No. 6, June 1992, pp. 739-752.
`
`14. Kahng, A. B., and Robins, G., A New Class of Iterative Steiner Tree Heuristics With
`Good Performance, IEEE Transactions on Computer-Aided Design of Integrated
`Circuits and Systems, Vol. 11, No. 7, July 1992, pp. 893-902.
`
`15. Hu, T. C., Kahng, A. B., and Robins, G., Solution of the Discrete Plateau Problem,
`Proceedings of the National Academy of Sciences, Vol. 89, October 1992, pp. 9235-
`9236.
`
`16. Kahng, A. B., and Robins, G., On Performance Bounds for a Class of Rectilinear Steiner
`Tree Heuristics in Arbitrary Dimension, IEEE Transactions on Computer-Aided Design
`of Integrated Circuits and Systems, Vol. 11, No. 11, November 1992, pp. 1462-1465.
`
`17. Cong, J., Kahng A. B., and Robins, G., Matching-Based Methods for High-Performance
`Clock Routing, IEEE Transactions on Computer-Aided Design of Integrated Circuits
`and Systems, Vol. 12, No. 8, August 1993, pp. 1157-1169.
`
`18. Hu, T. C., Kahng, A. B., and Robins, G., Optimal Robust Path Planning in General
`Environments, IEEE Transactions on Robotics and Automation, Vol. 9, No. 6,
`December 1993, pp. 775-784.
`
`19. Alpert, C., Cong, J., Kahng, A. B., Robins, G., and M. Sarrafzadeh, On the Minimum
`Density Interconnection Tree Problem, VLSI Design: an International Journal of
`Custom-Chip Design, Simulation, and Testing, Vol. 2, No. 2, February 1994, pp. 157-
`169.
`
`20. Boese, K., Kahng, A. B., McCoy, B. A., and Robins, G., Near-Optimal Critical Sink
`Routing Tree Constructions, IEEE Transactions on Computer-Aided Design of
`Integrated Circuits and Systems, Vol. 14, No. 12, December 1995, pp. 1417-1436. Final
`journal submission version
`
`21. Griffith, J., Robins, G., Salowe, J. S., and Zhang, T., Closing the Gap: Near-Optimal
`Steiner Trees in Polynomial Time, IEEE Transactions on Computer-Aided Design of
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`Integrated Circuits and Systems, Vol. 13, No. 11, November 1994, pp. 1351-1365.
`Journal scanned/OCRed version and Steiner code (UNIX tar format)
`
`22. Robins, G., and Salowe, J. S., Low-Degree Minimum Spanning Trees, Discrete and
`Computational Geometry, Vol. 14, September 1995, pp. 151-165.
`
`23. McCoy, B. A., and Robins, G., Non-Tree Routing, IEEE Transactions on Computer-
`Aided Design of Integrated Circuits and Systems, Vol. 14, No. 6, June 1995, pp. 780-
`784. Journal scanned/OCRed version
`
`24. Kahng, A. B., Robins, G., and Walkup, E. A., Optimal Algorithms for Substrate Testing
`in Multi-Chip Modules, International Journal on High-Speed Electronics and Systems,
`Vol. 6, No. 4, December 1995, pp 595-612.
`
`25. Alexander, M. J., Cohoon, J. P., Ganley, J. L., Robins, G., Placement and Routing for
`Performance-Oriented FPGA Layout, VLSI Design: an International Journal of
`Custom-Chip Design, Simulation, and Testing, Vol. 7, No. 1, 1998.
`
`26. Alexander, M. J., and Robins, G., New Performance-Driven FPGA Routing Algorithms,
`IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.
`15, No. 12, December 1996, pp. 1505-1517. FPGA benchmarks and routings
`
`27. Kahng, A. B., Robins, G., and Walkup, E. A., How to Test a Tree, Networks, 32, 1998,
`pp. 189-197.
`
`28. Pearson, W. R., Robins, G., Wrege, D. E., and Zhang, T., On the Primer Selection
`Problem for Polymerase Chain Reaction Experiments, Discrete and Applied
`Mathematics, Vol. 71, 1996, pp. 231-246.
`
`29. Pearson, W. R., Robins, G., and Zhang, T., Generalized Neighbor-Joining: More Reliable
`Phylogenetic Tree Reconstruction, Journal of Molecular Biology and Evolution, Vol.
`16, No. 6, pp. 806-816, 1999.
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`30. Kahng, A. B., Robins, G., Singh, A., and Zelikovsky, A., Filling Algorithms and
`Analyses for Layout Density Control, IEEE Transactions on Computer-Aided Design
`of Integrated Circuits and Systems, Vol. 18, No. 4, April 1999, pp. 445-462.
`
`31. Robins, G., Robinson, B. L., and Sethi, B. S., On Detecting Spatial Regularity in Noisy
`Images, Information Processing Letters, No. 69, 1999, pp. 189-195. Final journal
`submission version
`
`32. Helvig, C. S., Robins, G., and Zelikovsky, A., New Approximation Algorithms for
`Routing with Multi-Port Terminals, IEEE Transactions on Computer-Aided Design of
`Integrated Circuits and Systems, Vol. 19, No. 10, October 2000, pp. 1118-1128.
`
`33. Hu, T. C., Kahng, A. B., and Robins, G., Optimal Minimum-Surface Computations Using
`Network Flow, to appear in Mathematical Programming.
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`34. Helvig, C. S., Robins, G., and Zelikovsky, A., An Improved Approximation Scheme for
`the Group Steiner Problem, Networks, Vol. 37, No. 1, January 2001, pp. 8-20.
`
`35. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Area Fill Synthesis for Uniform
`Layout Density, IEEE Transactions on Computer-Aided Design of Integrated Circuits
`and Systems, Vol. 21, No. 10, October 2002, pp. 1132-1147.
`
`36. Helvig, C. S., Robins, G., and Zelikovsky, A., The Moving-Target Traveling Salesman
`Problem, Journal of Algorithms, Vol. 49, No. 1, October 2003, pp. 153-174.
`
`37. Haspel, D., Robins, G., and Street, B., A New Generalized Authority-Based Framework
`for Web Page Discovery, Undergraduate Research Journal.
`
`38. Robins, G. and Zelikovsky, A., Tighter Bounds for Graph Steiner Tree Approximation,
`SIAM Journal on Discrete Mathematics, Vol. 19, No. 1, 2005, pp. 122-134. This paper
`won the SIAM Outstanding Paper Prize in 2007
`
`39. Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng, Y., Compressible Area
`Fill Synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits
`and Systems, Vol. 24, No. 8, pp. 1169-1187, 2005.
`
`40. ..., Dutta, A., Kamani, N., Taylor, C. M., Kim, H. K., Robins, G., et al., The Encode
`(Encyclopedia of DNA Elements) Project, Science, Vol. 306, No. 5696, October 2004,
`pp. 636-640.
`
`41. Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng, Y., Closing the
`Smoothness and Uniformity Gap in Area Fill Synthesis, to appear in ACM Transactions
`on Design Automation of Electronic Systems.
`
`42. Bolotnyy, L. and Robins, G., Multi-Tag RFID Systems, International Journal of Internet
`Protocol Technology, special issue on RFID: Technologies, Applications, and Trends,
`Vol. 2, No. 3/4, December, 2007, pp. 218-231. Invited paper
`
`43. Chawla, K., and Robins, G., An RFID-Based Object Localization Framework,
`International Journal of Radio Frequency Identification Technology and Applications,
`Special Issue on RFID-Enhanced Technology Intelligence and Management, Vol. 3,
`No. 1/2, 2011, pp. 2-30. Invited paper
`
`44. Layer, R., Skadron, K., Robins, G., Hall, I., and Quinlan, A., Binary Interval Search
`(BITS): A Scalable Algorithm for Counting Interval Intersections, Bioinformatics, Vol.
`29, No. 1, 2013, pp. 1-7.
`
`45. Huang, J., Lach, J. and Robins, G., A Circuit Design Methodology for Efficiency-Quality
`Tradeoffs Using Imprecise Hardware, submitted to IEEE Transactions on Computer-
`Aided Design of Integrated Circuits and Systems.
`
`46. Layer, R., McDaniel, M, Robins, G., and Skadron, K., Efficient Mapping to Accelerator
`Hardware: A Case Study in Genomic Analysis with Parallel Sliding Windows on GPUs
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`and Cell, submitted to International Journal of High Performance Computing
`Applications.
`
`47. Chawla, K., McFarland, C., Robins, G., and Thomason, W., An Accurate Real-Time
`RFID-Based Location System, in submission to IEEE Transactions on Emerging
`Topics in Computing.
`
`48. Brunelle, N., Robins, G., and shelat, a., Compression-Aware Algorithms for Big Data, in
`submission.
`
`49. Singh, R., Lanchantin, J., Robins, G., and Qi, Y., DeepChrome: Deep-Learning for
`Predicting Gene Expression from Histone Modifications, Bioinformatics, Vol 32, Issue
`17, pp. i639-i648.
`
`50. Singh, R., Lanchantin, J., Robins, G., and Qi, Y., Transfer String Kernel for Cross-
`Context Sequence Specific DNA-Protein Binding Prediction, to appear in IEEE/ACM
`Transactions on Computational Biology and Bioinformatics.
`
`Refereed Conference Papers
`
`51. Kaczmarek, T., Bates, R., and Robins, G., Recent Developments in NIKL, American
`Association of Artificial Intelligence, Proc. Fifth National Conference on Artificial
`Intelligence, Philadelphia, Pennsylvania, August 1986, pp. 978-985.
`
`52. Robins, G., The ISI Grapher: a Portable Tool for Displaying Graphs Pictorially, Proc.
`Symboliikka '87, Helsinki, Finland, August 17-18, 1987, pp. 44-60.
`
`53. Robins, G., Applications of The ISI Grapher, Proc. Fourth Annual Artificial Intelligence
`and Advanced Computer Conference, Long Beach, California, May 1988, pp. 105-130.
`
`54. Robins, G., Signal Constellation Design Tool: A Case Study in User Interface Synthesis,
`Proc. Second International Conference on Computer-Assisted Learning, Dallas, Texas,
`May 1989, pp. 452-467.
`
`55. Robins, G., An Interactive Gate-Level Simulator of a Classical Von Neumann
`Architecture, as an Educational Aid for Introducing Novices to the Fundamentals of
`Computer Organization, Proc. Third International Conference on Human-Computer
`Interaction, Boston, Massachusetts, September 1989.
`
`56. Kahng, A. B., and Robins, G., A New Class of Steiner Tree Heuristics with Good
`Performance: The Iterated 1-Steiner Approach, Distinguished Paper, Proc. IEEE
`International Conference on Computer-Aided Design, Santa Clara, November 1990, pp.
`428-431.
`
`57. Kahng, A. B., Cong, J., and Robins, G., High-Performance Clock Routing Based on
`Recursive Geometric Matching, Proc. ACM/IEEE Design Automation Conference, San
`Francisco, June 1991, pp. 322-327.
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`58. Kahng, A. B., and Robins, G., Optimal Algorithms for Determining Regularity in
`Pointsets, Proc. Canadian Conference on Computational Geometry, Vancouver, August
`1991, pp. 167-170.
`
`59. Cong, J., Kahng, A. B., and Robins, G., On Clock Routing For General Cell Layouts,
`Proc. IEEE International ASIC Conference, Rochester, September 1991, pp. P14:5.1-
`P14:5.4.
`
`60. Cong, J., Kahng, A. B., Robins, G., M. Sarrafzadeh and C. K. Wong, Performance-
`Driven Global Routing for Cell Based IC's, Proc. IEEE International Conference on
`Computer Design, Cambridge, October 1991, pp. 170-173.
`
`61. Cong, J., Kahng, A. B., Robins, G., M. Sarrafzadeh and C. K. Wong, Provably-Good
`Algorithms for Performance-Driven Global Routing, Proc. IEEE International
`Symposium on Circuits and Systems, San Diego, May 1992, pp. 2240-2243.
`
`62. Kahng, A. B., Robins, G. and Walkup, E. A., New Results and Algorithms for MCM
`Substrate Testing, Proc. IEEE International Symposium on Circuits and Systems, San
`Diego, May 1992, pp. 1113-1116.
`
`63. Alpert, C., Cong, J., Kahng, A. B., Robins, G., and Sarrafzadeh, M., Minimum Density
`Interconnection Trees, Proc. IEEE International Symposium on Circuits and Systems,
`Chicago, May 1993, pp. 1865-1868.
`
`64. Barrera, T., Griffith, J., McKee, S. A., Robins, G., and Zhang, T., Toward a Steiner
`Engine: Enhanced Serial and Parallel Implementations of the Iterated 1-Steiner MRST
`Algorithm, Proc. Great Lakes Symposium on VLSI, Kalamazoo, MI, March 1993, pp.
`90-94. Steiner code (UNIX tar format)
`
`65. Boese, K. D., Kahng, A. B., and Robins, G., High Performance Routing Trees With
`Identified Critical Sinks, Proc. ACM/IEEE Design Automation Conference, Dallas,
`June 1993, pp. 182-187.
`
`66. Boese, K. D., Kahng, A. B., McCoy, B. A. and Robins, G., Toward Optimal Routing
`Trees, Proc. ACM/SIGDA Physical Design Workshop, Lake Arrowhead, CA, April
`1993, pp. 44-51.
`
`67. Barrera, T., Griffith, J., Robins, G., and Zhang, T., Narrowing the Gap: Near-Optimal
`Steiner Trees in Polynomial Time, Proc. IEEE International ASIC Conference,
`Rochester, September 1993, pp. 87-90. Steiner code (UNIX tar format)
`
`68. Boese, K. D., Kahng, A. B., McCoy, B. A. and Robins, G., Fidelity and Near-Optimality
`of Elmore-Based Routing Constructions, Proc. IEEE International Conference on
`Computer Design, Cambridge, October 1993, pp. 81-84.
`
`69. McCoy, B. A., and Robins, G., Non-Tree Routing, Proc. European Design Automation
`Conference, Paris, France, February 1994, pp. 430-434.
`
`Professor Gabriel Robins
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`Vitae
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`70. Alexander, M. J., and Robins, G., A Unified New Approach to FPGA Routing Based on
`Multi-Weighted Graphs, Proc. ACM/SIGDA International Workshop on Field-
`Programmable Gate Arrays, Berkeley, CA, February 1994.
`
`71. Hodes, T. D., McCoy, B. A., and Robins, G., Dynamically-Wiresized Elmore-Based
`Routing Constructions, IEEE International Symposium on Circuits and Systems,
`London, England, May 1994, Volume I, pp. 463-466.
`
`72. Robins, G., and Salowe, J. S., On the Maximum Degree of Minimum Spanning Trees,
`ACM Symposium on Computational Geometry, Stoney Brook, NY, June 1994, pp.
`250-258.
`
`73. Boese, K. D., Kahng, A. B., McCoy, B. A., and Robins, G., Rectilinear Steiner Trees
`with Minimum Elmore Delay, Proc. ACM/IEEE Design Automation Conference, San
`Diego, CA, June 1994, pp. 381-386.
`
`74. Alexander, M. J., and Robins, G., High Performance Routing for Field-Programmable
`Gate Arrays, Proc. IEEE International ASIC Conference, Rochester, NY, September
`1994, pp. 138-141.
`
`75. Alexander, M. J., Cohoon, J. P., Ganley, J. L., and Robins, G., An Architecture -
`Independent Approach to FPGA Routing Based on Multi-Weighted Graphs, Proc.
`European Design Automation Conference, Grenoble, France, September, 1994, pp.
`259-264.
`
`76. Robins, G., and Robinson, B. L., Pattern Minefield Detection from Inexact Data, Proc.
`SPIE International Symposium on Aerospace/Defense Sensing and Dual-Use
`Photonics, Volume 2496, Orlando, FL, April 1995, pp. 568-574.
`
`77. Alexander, M. J., and Robins, G., New Performance-Driven FPGA Routing Algorithms,
`Proc. ACM/IEEE Design Automation Conference, San Francisco, CA, June 1995, pp.
`562-567. FPGA benchmarks and routings
`
`78. Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J., and Robins, G., Three-
`Dimensional Field Programmable Gate Arrays, Proc. IEEE International ASIC
`Conference, Austin, TX, September 1995, pp. 253-256.
`
`79. Pearson, W. R., Robins, G., Wrege, D. E., and Zhang, T., A New Approach to Primer
`Selection in Polymerase Chain Reaction Experiments, Proc. International Conference
`on Intelligent Systems for Molecular Biology, Cambridge, England, July, 1995, pp.
`285-291.
`
`80. Alexander, M. J., Cohoon, J. P., Ganley, J. L., and Robins, G., Performance-Oriented
`Placement and Routing for Field-Programmable Gate Arrays, Proc. European Design
`Automation Conference, Brighton, England, September, 1995, pp. 80-85.
`
`Professor Gabriel Robins
`
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`Vitae
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`81. Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J., Peters, E. L. and Robins, G.,
`Physical Layout for Three-Dimensional FPGAs, 1996 ACM/SIGDA Physical Design
`Workshop, Reston, VA, April, 1996, pp. 142-149.
`
`82. Alexander, M. J., Cohoon, J. P., Colflesh, J. L., Karro, J., Peters, E. L. and Robins, G.,
`Placement and Routing for Three-Dimensional FPGAs, Fourth Canadian Workshop on
`Field-Programmable Devices, Toronto, Canada, May, 1996, pp. 11-18.
`
`83. Bateman, C. D., Helvig, C. S., Robins, G., and Zelikovsky, A., Provably-Good Routing
`Tree Construction with Multi-Port Terminals, ACM/SIGDA International Symposium
`on Physical Design, Napa Valley, CA, April, 1997, pp. 96-102. group Steiner code
`(Java)
`
`84. Helvig, C. S., Robins, G., and Zelikovsky, A., Improved Approximation Bounds for the
`Group Steiner Problem, Proc. Conference on Design Automation and Test in Europe,
`Paris, France, February, 1998, pp. 406-413. group Steiner code (Java)
`
`85. Kahng, A. B., Robins, G., Singh, A., Wang, H., and Zelikovsky, A., Filling and Slotting:
`Analysis and Algorithms, Proc. International Symposium on Physical Design,
`Monterey, California, April, 1998, pp. 95-102.
`
`86. Helvig, C. S., Robins, G., and Zelikovsky, A., Moving-Target TSP and Related
`Problems, Proc. European Symposium on Algorithms, Venice, Italy, August, 1998, pp.
`453-464, published as Lecture Notes in Computer Science, 1461, G. Bilardi, G. F.
`Italiano, A. Pietracaprina and G. Pucci (eds.), 1998.
`
`87. Kahng, A. B., Robins, G., Singh, A., and Zelikovsky, A., New and Exact Filling
`Algorithms for Layout Density Control, Proc. VLSI Design Conference, Goa, India,
`January 1999, pp. 106-110.
`
`88. Kahng, A. B., Robins, G., Singh, A., and Zelikovsky, A., New Multi-Level and
`Hierarchical Algorithms for Layout Density Control, Proc. Asia and South Pacific
`Design Automation Conference, Hong Kong, China, January 1999, pp. 221-224.
`Nominated for Best Paper Award
`
`89. Robins, G., and Zelikovsky, A., Improved Steiner Tree Approximation in Graphs, SIAM-
`ACM Symposium on Discrete Algorithms (SODA), San Francisco, CA, January 2000,
`pp. 770-779.
`
`90. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Monte-Carlo Algorithms for
`Layout Density Control, Proc. Asia and South Pacific Design Automation Conference,
`Yokohama, Japan, January 2000, pp. 523-528.
`
`91. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Practical Iterated Fill Synthesis
`for CMP Uniformity, Proc. Design Automation Conference, Los Angeles, June 2000,
`pp. 671-674.
`
`Professor Gabriel Robins
`
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`Vitae
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`92. Blair, D., and Robins, G., A New Distributed System for Large-Scale Sequence
`Analyses, International Conference on Intelligent Systems for Molecular Biology, San
`Diego, August 2000.
`
`93. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Hierarchical Dummy Fill for
`Process Uniformity, Asia and South Pacific Design Automation Conference,
`Yokohama, Japan, January 2001, pp. 139-144.
`
`94. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Closing the Smoothness and
`Uniformity Gap in Area Fill Synthesis, ACM/SIGDA International Symposium on
`Physical Design, Del Mar, CA, April 2002, pp. 137-142.
`
`95. Chen, Y., Kahng, A. B., Robins, G., and Zelikovsky, A., Monte-Carlo Methods for
`Chemical-Mechanical Planarization on Multiple-Layer and Dual-Material Models,
`Proc. Microlithography 2002, International Society of Optical Engineering (SPIE),
`Santa Clara, CA, March 2002, pp. 421-432.
`
`96. Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng, Y., Area Fill Generation
`With Inherent Data Volume Reduction, Proc. Design Automation and Testing in
`Europe, Munich, Germany, March 2003, pp. 868-873.
`
`97. ..., Robins, G. et al., Intelligence and Planning, Proceedings of the Conference on
`Interagency Requirements for Regional Stability / Capacity Building Research and
`Development, sponsored by the White House Office of Science and Technology Policy,
`the U.S. State Department, and the U.S. Department of Defense, Washington D.C.,
`December 2004.
`
`98. Chen, Y., Kahng, A. B., Robins, G., Zelikovsky, A., and Zheng, Y., Evaluation of the
`N