`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`________________________________
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`________________________________
`
`
`NVIDIA CORPORATION,
`Petitioner
`
`
`v.
`
`
`POLARIS INNOVATIONS LIMITED,
`Patent Owner
`
`________________________________
`
`
`
`Case No. IPR2017-01819
`Patent No. 7,124,325
`
`
`________________________________
`
`
`
`PATENT OWNER’S PRELIMINARY RESPONSE
`TO PETITION FOR INTER PARTES REVIEW
`
`
`
`C.
`
`TABLE OF CONTENTS
`TABLE OF AUTHORITIES ................................................................................... iii
`I.
`INTRODUCTION ........................................................................................... 1
`II.
`BACKGROUND ............................................................................................. 2
`A.
`The ’325 Patent ..................................................................................... 2
`B.
`IPR2017-00382: The Petitioner’s First Petition Against the
`’325 Patent ............................................................................................. 6
`References Cited in the Petition ............................................................ 8
`1.
`Volk ’450 .................................................................................... 8
`2.
`Volk ’105 .................................................................................... 9
`3.
`Hiraki......................................................................................... 10
`III. CLAIM INTERPRETATIONS ..................................................................... 11
`IV. SUMMARY OF ARGUMENTS .................................................................. 13
`V.
`THE PETITION SHOULD BE DENIED AS AN UNWARRANTED
`FOLLOW-ON PETITION ATTACKING THE ’325 PATENT FOR
`A SECOND TIME WITHOUT JUSTIFICATION. ...................................... 15
`A.
`NVIDIA Factor 1: Same Petitioner, Same Claims .............................. 17
`B.
`NVIDIA Factor 2: Should Have Known of Art .................................. 17
`C.
`NVIDIA Factor 3: Using Roadmap .................................................... 19
`D.
`NVIDIA Factor 4: Time Lapse ........................................................... 21
`E.
`NVIDIA Factor 5: Explanation of Time Lapse ................................... 21
`F.
`NVIDIA Factor 6: Board’s Finite Resources ...................................... 22
`G.
`NVIDIA Factor 7: One-Year Requirement ......................................... 23
`
`
`
`
`IPR2017-01819
`
`Prelim. Response
`
`Page i
`
`
`
`B.
`
`C.
`
`VI. CHALLENGE 1 IS NOT REASONABLY LIKELY TO PREVAIL........... 24
`A.
`The Petition Fails to Show a Reasonable Likelihood that Volk
`’450 Has a “Trimming Register,” as Recited in Claim 14. ................. 24
`The Petition Fails to Show a Reasonable Likelihood that Volk
`’450 Has a “Reference Voltage Device and a Voltage Divider,”
`as Recited in Claim 16. ....................................................................... 27
`The Petition Fails to Show a Reasonable Likelihood that Volk
`’450 Has a “Nonvolatile Memory Unit Being Programmed
`Based on a Trimming Value,” as Recited in Claim 18. ...................... 29
`VII. CHALLENGE 2 IS NOT REASONABLY LIKELY TO PREVAIL........... 31
`A.
`The Petition Fails to Show a Reasonable Likelihood That Volk
`’105 has a “Trimming Register,” as Recited in Claim 14. .................. 31
`The Petition Fails to Show a Reasonable Likelihood That Volk
`’105 Discloses “Writing to Said Trimming Register,” as
`Recited in Claim 14. ............................................................................ 32
`VIII. CHALLENGE 3 IS NOT REASONABLY LIKELY TO PREVAIL........... 34
`A.
`The Petition Fails to Show a Reasonable Likelihood That the
`Combination of Volk ’450 and Hiraki Has a “Trimming
`Register,” as Recited in Claim 14. ...................................................... 34
`The Petition Fails to Show a Reasonable Likelihood That the
`Combination of Volk ’450 and Hiraki Has a “Reference
`Voltage Device and a Voltage Divider,” as Recited in Claim 16. ...... 37
`IX. CHALLENGE 4 IS NOT REASONABLY LIKELY TO PREVAIL
`BECAUSE THE PETITION FAILS TO SHOW A REASONABLE
`LIKELIHOOD THAT THE COMBINATION OF VOLK ’450 AND
`HIRAKI HAS A “TRIMMING REGISTER,” AS RECITED IN
`CLAIM 14. .................................................................................................... 38
`THE PETITION PRESENTS REDUNDANT CHALLENGES. ................. 40
`X.
`XI. CONCLUSION .............................................................................................. 42
`
`
`B.
`
`B.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page ii
`
`
`
`TABLE OF AUTHORITIES
`
`Cases
`Alere Inc. v. Rembrandt Diagnostics, LP,
`IPR2017-01130, Paper 10 (Sept. 28, 2017) ................................................... 18
`Apple Inc. v. Evolutionary Intelligence, LLC,
`IPR2014-00079, Paper 8 (Apr. 25, 2014) ...................................................... 39
`Belden Inc. v. Berk-Tek LLC,
`805 F.3d 1064 (Fed. Cir. 2015) ..................................................................... 35
`Bungie, Inc. v. Acceleration Bay, LLC,
`IPR2016-00936, Paper 11 (July 7, 2016) ...................................................... 15
`Butamax Advanced Biofuels LLC v. Gevo, Inc.,
`IPR2014-00581, Paper 8 (Oct. 14, 2014) ................................................ 19, 20
`CaptionCall, LLC v. Ultratec, Inc.,
`IPR2013-00549, Paper 20 (Apr. 28, 2014) .................................................... 39
`Carl Zeiss SMT GmbH v. Nikon Corp.,
`IPR2013-00363, Paper 17 (Jan. 30, 2014) .................................................... 42
`Conopco, Inc. v. Proctor & Gamble Co.,
`IPR2014-00506, Paper 25 (Dec. 10, 2014) (informative) ............................. 15
`Conopco, Inc. v. Proctor & Gamble Co.,
`IPR2014-00628, Paper 23 (Mar. 20, 2015) ....................................... 18, 21, 24
`In re Fine,
`837 F.3d 1071 (Fed. Cir. 1988) ..................................................................... 27
`Gen. Plastic Indus. Co. v. Canon Kabushiki Kaisha,
`IPR2016-01357, Paper 19 (Sept. 6, 2017) (precedential) ......................passim
`Gubelmann v. Gang,
`408 F.2d 758 (CCPA 1969) ........................................................................... 32
`Harmonic Inc. v. Avid Tech., Inc.,
`815 F.3d 1356 (Fed. Cir. 2016) ............................................................... 15, 42
`
`IPR2017-01819
`
`Prelim. Response
`
`Page iii
`
`
`
`Jiawei Tech. v. Richmond,
`IPR2015-00580, Paper 22 (May 1, 2015) ..................................................... 20
`Liberty Mut. Ins. Co. v. Progressive Cas. Ins. Co.,
`CBM2012-00003, Paper 7 (Oct. 25, 2012) ............................................. 41, 42
`McGinley v. Franklin Sports, Inc.,
`262 F. 3d 1339 (Fed. Cir. 2001) .................................................................... 34
`MEHL/Biophile Int’l Corp. v. Milgraum,
`192 F.3d 1365 (Fed. Cir. 1999) ..................................................................... 32
`NVIDIA Corp. v. Polaris Innovations Ltd.,
`IPR2017-00382, Paper 10 (June 23, 2017) ............................................passim
`NVIDIA Corp. v. Polaris Innovations Ltd.,
`IPR2017-00382, Paper 2 (Dec. 19, 2016) ..................................................... 20
`NVIDIA Corp. v. Samsung Elec. Co.,
`IPR2016-00134, Paper 9 (Dec. 19, 2016) ..................................................... 16
`In re Oelrich,
`666 F.2d 578 (CCPA 1981) ........................................................................... 32
`Personal Web Techs., LLC v. Apple, Inc.,
`848 F.3d 987 (Fed. Cir. 2017) ....................................................................... 35
`Synopsys, Inc. v. Mentor Graphics Corp.,
`IPR2012-00041, Paper 16 (Feb. 22, 2013) .................................................... 39
`Tasco, Inc. v. Pagnani,
`IPR2013-00103, Paper 6 (May 23, 2013) ..................................................... 39
`Trintec Indus., Inc. v. Top-U.S.A. Corp.,
`295 F.3d 1292 (Fed. Cir. 2002) ..................................................................... 32
`Wowza Media Sys., LLC v. Adobe Sys., Inc.,
`IPR2013-00054, Paper 16 (July 13, 2013) .................................................... 39
`
`
`
`
`
`
`IPR2017-01819
`
`Prelim. Response
`
`Page iv
`
`
`
`Statutes
`35 U.S.C. § 102(b) ................................................................................................... 42
`35 U.S.C. § 102(e) ................................................................................................... 42
`35 U.S.C. § 312(a)(3) ............................................................................................... 38
`35 U.S.C. § 313 .......................................................................................................... 1
`35 U.S.C. § 314(a) ................................................................................................... 15
`35 U.S.C. § 316(a)(11) ............................................................................................. 23
`35 U.S.C. § 316(b) ................................................................................................... 42
`
`Regulations
`37 C.F.R. § 42.22(a)(2) ............................................................................................ 38
`37 C.F.R. § 42.104(b)(4) .......................................................................................... 38
`37 C.F.R. § 42.104(b)(5) .......................................................................................... 38
`37 C.F.R. § 42.107 ..................................................................................................... 1
`37 C.F.R. § 42.108 ................................................................................................... 15
`
`Other Authorities
`77 Fed. Reg. 48612 (Aug. 14, 2012) ....................................................................... 38
`H.R. Rep. No. 112-98, pt.1, at 48 (2011) ................................................................. 19
`MPEP § 2143.03 ...................................................................................................... 27
`
`
`
`
`IPR2017-01819
`
`Prelim. Response
`
`Page v
`
`
`
`I.
`
`INTRODUCTION
`
`Pursuant to 35 U.S.C. § 313 and 37 C.F.R. § 42.107, the Patent Owner Polaris
`
`Innovations Limited (“Polaris”) hereby provides a preliminary response to the
`
`petition for inter partes review filed July 25, 2017 (Paper 2, herein “petition” or
`
`“Pet.”). A Notice dated August 8, 2017 (Paper 5) set November 8, 2017 as the
`
`deadline for this preliminary response, which is timely filed. No fee is due with this
`
`preliminary response; however, if the Office believes that any additional fee is due,
`
`it is authorized to charge deposit account No. 50-5836.
`
`The petition is the second one filed by the same petitioner against U.S. Patent
`
`No. 7,124,325 (“’325 Patent” herein, Ex. 1001). The first petition was filed
`
`December 19, 2016, assigned case no. IPR2017-00382, presented three challenges
`
`to the ’325 Patent’s claims based on five different references, and denied by a non-
`
`institution decision dated June 23, 2017 (Paper 5). NVIDIA Corp. v. Polaris
`
`Innovations Ltd., IPR2017-00382, Paper 10 (June 23, 2017) (herein “IPR2017-
`
`00382 Non-Inst. Dec’n”).
`
`This petition asserts four more challenges to the claims of the ’325 Patent.
`
`Challenge 1 asserts that claims 14 and 16-18 are anticipated by Volk ’450 (U.S.
`
`Patent No. 6,693,450, Ex. 1004). Pet. at 1. Challenges 2 asserts that claims 14, 16,
`
`and 17 are anticipated by Volk ’105 (U.S. Patent No. 6,356,105, Ex. 1005).
`
`Challenge 3 and 4 assert that the same claims plus one or two others are obvious
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 1 of 43
`
`
`
`over Volk ’450 or Volk ’105, respectively, in view of Hiraki (U.S. Patent No.
`
`6,201,733, Ex. 1008). Id. For at least the reasons provided herein, none of those
`
`challenges has a reasonable likelihood of prevailing with respect to any claim. Id.
`
`Polaris therefore respectfully requests that the Board deny the petition and not
`
`institute trial.
`
`II. BACKGROUND
`
`A. The ’325 Patent
`
`The ’325 Patent concerns trimming of output drivers and terminations of an
`
`integrated circuit. Indeed, the title of the ’325 Patent is “METHOD AND
`
`APPRATUS FOR INTERNALLY TRIMMING OUTPUT DRIVERS AND
`
`TERMINATIONS IN SEMICONDUCTOR DEVICES.”
`
`As background, trimming is adjustment of adjustable parameters in an
`
`integrated circuit, sometimes colloquially referred to in the art as an “IC” or “chip.”
`
`One of the challenges posed by integrated circuits is that their electrical
`
`characteristics can vary from chip to chip. Thus, real-world ICs are not all ideal and
`
`not all instances of the same type of chip are identical in their electrical
`
`characteristics. To compensate for those variations, some ICs are designed to have
`
`some adjustability in critical circuit elements, especially those that drive signals to
`
`the external circuits outside of the IC. “Trimming” is adjusting those adjustable
`
`values so that the chip operates as defined by its specification across a range of
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 2 of 43
`
`
`
`process conditions. Different types of memory ICs, because of their different
`
`constructions and methods of operation, include trimming in different parts of their
`
`designs.
`
`The variations in the electrical characteristics for IC interface connections,
`
`over which high-speed electrical information signals are sent or received, is
`
`especially important for some ICs. For example, if the impedance of an IC’s output
`
`driver does not match the impedance of the signal traces connected to that output
`
`driver, then the signal integrity – the quality of the electrical waveform transmitting
`
`information – is diminished. A consequence of reduced signal integrity is that the
`
`maximum rate at which information can be successfully communicated with another
`
`IC is consequently reduced. Similarly, if there is an impedance mismatch between
`
`a terminating resistor at an IC’s interface connection and the impedance of the signal
`
`traces connected to that interface connection, reflections of the electrical signal
`
`arriving at the interface connection back towards the source of the signal will reduce
`
`the signal integrity and ultimately limit the frequency (i.e., rate or bandwidth) at
`
`which information can be communicated through the interface into the integrated
`
`circuit. Thus, the design of IC interface devices must take into consideration I/O
`
`(input/output) signal integrity in general and impedance matching in particular to
`
`facilitate highest possible frequency of operation.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 3 of 43
`
`
`
`This is certainly true for interface connections in memory ICs and the memory
`
`controller ICs connected to them. This is especially critical when high bandwidth
`
`operation is required. Signal integrity issues have been critical in DRAM (dynamic
`
`random-access memory) IC and memory system design for many years now.
`
`Impedance mismatches on the interface devices of a DRAM memory IC or a DRAM
`
`memory controller IC limit the rate at which data access operations can occur.
`
`The ’325 Patent extensively discusses the need to trim the “interface
`
`parameters” of those “interface devices” in ICs related to DRAM memory. For
`
`example, the ’325 Patent explains that properly trimmed interface parameters are
`
`necessary “to maintain the integrity of the data bus signals transmitted to the data
`
`bus” at high data bus transmission rates:
`
`As data transmission rates increase on the data bus,
`the semiconductor devices effecting access for the purpose
`of writing to the data bus or reading from the data bus
`demand narrower tolerances for the interface parameters
`in order to maintain the integrity of the data signals
`transmitted to the data bus.
`***
`For operation in data bus systems with a high data
`transmission rate, provision is therefore made for the
`semiconductor device’s
`interface parameters
`to be
`trimmed at least once before or during the initial startup of
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 4 of 43
`
`
`
`the semiconductor device or repeatedly during the
`operation of the semiconductor device.
`
`’325 Patent at 1:36-41, 2:6-11.
`
`
`
`The ’325 Patent identifies the two particular interface devices whose relevant
`
`interface parameter needs to be trimmed: Output drivers and terminations. Id. at
`
`1:36-62. In both cases, the interface parameter being tuned is the impedance (e.g.,
`
`resistance). Id. The ’325 Patent illustrates both types of interface devices for an
`
`interface connection in the one and only disclosed embodiment of the invention,
`
`which is illustrated in Figure 3 (reproduced below). In this drawing and the others
`
`in the patent, “Two of the interface devices are output driver devices l0a, l0b. The
`
`two other interface devices are termination devices l0c, 10d.” Id. at 6:65-67
`
`(referring to the same-labeled elements in Fig. 1); see also id. at 8:4-29 (referring to
`
`the same-labeled elements in Fig. 3). These interface devices are colored red in the
`
`drawing below. The trimmed interface parameter of the output drivers 10a and 10b
`
`is an output impedance. The trimmed interface parameter of the termination devices
`
`10c and 10d is resistance. The ’325 Patent refers to both types of trimmed devices
`
`as “control elements” or “settable control elements,” and they are colored orange in
`
`the drawing below.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 5 of 43
`
`
`
`
`
`Id. at Fig. 3 (annotations and coloring added).
`
`B.
`
`IPR2017-00382: The Petitioner’s First Petition Against the ’325
`Patent
`
`The present IPR petition is the second one filed by the same petitioner
`
`challenging the ’325 Patent. The first petition resulted in case no. IPR2017-00382.
`
`The first petition was filed December 19, 2016, and Polaris filed a preliminary
`
`response on April 4, 2017. The Board denied the petition in a non-institution
`
`decision dated June 23, 2017. A little over a month later, the petitioner filed the
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 6 of 43
`
`
`
`present petition, on exactly the one-year anniversary of Polaris’s serving the
`
`petitioner with a complaint for infringement of, inter alia, the ’325 Patent.
`
`The first petition challenged every claim of the ’325 Patent under at least two
`
`different grounds. The first petition presented a total of three different challenges
`
`based on five different references. The first challenge was obviousness over Tanaka
`
`(U.S. Patent No. 7,000,160) in view of Ikehashi (U.S. Patent No. 6,643,180). The
`
`second challenge was obviousness over Garrett (U.S. Patent No. 6,556,052) in view
`
`of Hassoun (U.S. Patent No. 5,844,913). The third challenge was obviousness over
`
`Garrett in view of Hassoun further in view of Ishikawa (U.S. Patent No. 5,991,221).
`
`The first petition did not propose any claim interpretations. Polaris proposed
`
`several claim interpretations in its preliminary response. The Board interpreted only
`
`the phrase “interface device,” which the Board found to be dispositive. Specifically,
`
`the Board interpreted the phrase “interface device” based on “the specification’s
`
`consistent usage of the term,” as urged by Polaris. IPR2017-00382 Non-Inst. Dec’n
`
`at 9. Thus, the Board interpreted “interface device” in the ’325 Patent to mean a
`
`device “associated with an interface,” which the Board interpreted to mean
`
`“‘between the semiconductor device’ and ‘another device external to the
`
`semiconductor device.’” Id. at 10.
`
`The Board found that the first challenge was “two anticipation challenges
`
`improperly paired together and presented as a single obviousness challenge.” Id. at
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 7 of 43
`
`
`
`14.. The Board also found that neither Tanaka nor Ikehashi discloses trimming of
`
`an interface device. Id. at 16-17.. The Board also found that Challenges 2 and 3
`
`were deficient and that the supporting testimony of Dr. Tredennick, the petitioner’s
`
`expert, was unpersuasive and “too vague.” Id. at 22; see generally id. at 19-30..
`
`C. References Cited in the Petition
`
`Now, trying again, the petitioner attempts four new challenges, focused on
`
`claims 14, 16-18, and 20, based on three different references: Volk ’450, Volk ’105,
`
`and Hiraki.
`
`1.
`
`Volk ’450
`
`Volk ’450 discloses a dynamic swing voltage adjustment driver system that
`
`can regulate the swing voltage on a bus line. Volk ’450 at Abstract. Figure 3 of
`
`Volk ’450, reproduced below, illustrates that a “driver system 50 is coupled to a
`
`regulated reference voltage 84 set to the magnitude VSWING” and a resistor 86. Id.
`
`at 2:58-60, 3:4-6.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 8 of 43
`
`
`
`Id. at Fig. 3.
`
`The driver system 50 includes an adder 98 as part of a tuner controller 100.
`
`However, the description of the adder 98 in Volk ’450 is very brief. The entirety of
`
`
`
`the description is in two sentences. Id. at 3:48-52.
`
`2.
`
`Volk ’105
`
`Volk ’105 describes an impedance control system for a center-tapped
`
`termination bus. Volk ’105 utilizes two counters, a pull-up counter 450 and pull-
`
`down counter 456, illustrated in Figure 4, which is reproduced below, to send
`
`selection signals to adjustable elements 466 and 468, respectively.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 9 of 43
`
`
`
`
`
`Volk ’105 at Fig. 4.
`
`3. Hiraki
`
`Hiraki discloses a single chip microcomputer that performs various types of
`
`“trimming” to rectify “internal defects” within the chip. Hiraki at 1:23. For
`
`example, one form of “trimming” in Hiraki is severing or connecting redundant
`
`memory cells to “repair” defects in the cells. Id. at 1:41-56. Another is traditional
`
`trimming voltages used to affect flash memory cells. Id. at 1:57 – 2:10.
`
`Yet another form of trimming in Hiraki is done with a voltage step-down
`
`circuit 31. Hiraki at 23:53-54. Reproduced below is Figure 20 of Hiraki, illustrating
`
`the voltage step-down circuit 31 that steps-down the external power voltage VDD to
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 10 of 43
`
`
`
`generate the internal power voltage VDL. See id. at 23:54-58. The voltage step-
`
`down circuit 31 includes a trimming register 31DR for latching the voltage trimming
`
`information to determine the reference voltage for specifying the level of the internal
`
`power voltage VDL. Id. at 24:1-5. The trimming register 31DR therefore affects
`
`the internal power voltage VDL, not an interface device.
`
`Hiraki at Fig. 20.
`
`
`
`None of the trimming disclosed in Hiraki concerns trimming of a memory’s
`
`
`
`interface device.
`
`III. CLAIM INTERPRETATIONS
`
`As noted above, the Board interpreted “interface device” in the first IPR as
`
`proposed by Polaris. This petition adopts that interpretation. See Pet. at 7. The
`
`petition formally offers no other explicit claim interpretations, id. at 6-8, but does
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 11 of 43
`
`
`
`informally propose an interpretation of the claim term “register” on page 23
`
`(discussed below).
`
`Polaris proposed interpretations of several claim terms and phrases in the first
`
`IPR, but none of those appear at this time to be relevant to this IPR. However, the
`
`interpretation of “register” is relevant in this IPR, and Polaris disputes the
`
`petitioner’s interpretation of “register” and proposes that this term be afforded its
`
`plain and ordinary meaning.
`
`The petition says, “A register is a circuit ‘with memory elements that can store
`
`from a few to millions of bits of coded information . . .’.” Pet. at 23 (citing Ex.
`
`1011). Dr. Tredennick’s declaration says the exact same thing at paragraph 47, also
`
`citing Exhibit 1011. However, Exhibit 1011 does not support the petition’s
`
`contention. Exhibit 1011 is a three-page exhibit containing one single page of the
`
`body of the McGraw-Hill Dictionary of Computing & Communications. That page
`
`does not contain a definition of “register.” Instead, it contains definitions of several
`
`words beginning with the letter C. Notably, one of those definitions is for the word
`
`“counter.” That definition contemplates that a counter may or may not involve a
`
`“register,” defining a “counter” as “[a] register or storage location used to represent
`
`the number of occurrences of an event” (emphasis added). This definition is relevant
`
`to the petition’s contention that a counter in Volk ’105 corresponds to the “register”
`
`claimed in the ’325 Patent.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 12 of 43
`
`
`
`In fact, definitions of “counter” in many other technical dictionaries confirm
`
`that a counter may involve a register or other non-register storage. E.g., IEEE
`
`Dictionary, 6th Ed. (1996) (Ex. 2001) at 228 (defining “counter” as “[a] device such
`
`as a register or storage location used to represent the number of occurrences of an
`
`event” (emphasis added)); IBM Dictionary of Computing (1994) (Ex. 2002) at 152
`
`(defining “counter” as “[a] register or storage location to accumulate number of
`
`event occurrences” (emphasis added)). Other dictionaries confirm that a counter
`
`need not have or involve a “register.” E.g., Microsoft Computer Dictionary, 5th Ed.
`
`(2002) (Ex. 2003) at 131 (defining “counter” as “[i]n electronics, a circuit that counts
`
`a specified number of pulses before generating an output”); Penguin Dictionary of
`
`Elecs., 3rd Ed. (1998) (Ex. 2004) at 104 (defining “digital counter” as [a]ny electronic
`
`circuit that counts electronic pulses”).
`
` For at least the foregoing reasons, the Board should reject the petition’s
`
`interpretation of “register.”
`
`IV. SUMMARY OF ARGUMENTS
`
`This petition is an unwarranted second attack on the ’325 Patent after the
`
`petitioner failed with its first petition. This petition represents the petitioner’s
`
`strategic reaction to Polaris’s arguments made in its preliminary response to the first
`
`petition and the Board’s earlier non-institution decision. The impropriety of this
`
`tactic is apparent from the fact that every one of the seven NVIDIA factors applicable
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 13 of 43
`
`
`
`in situations like this points in favor of denying this second petition on discretionary
`
`grounds.
`
`On the merits, Challenges 1 and 3 based on Volk ’450 are not reasonably
`
`likely to prevail because Volk ’450 does not disclose a trimming register. The
`
`petition alleges, without support, that an adder in Volk ’450 is a trimming register,
`
`but that is not so. Volk ’450 also fails to disclose features recited in some of the
`
`dependent claims, including a “reference voltage device and a voltage divider,” as
`
`recited in claim 16, and a “nonvolatile memory unit being programmed based on a
`
`trimming value,” as recited in claim 18. The addition of Hiraki to Volk ’450 does
`
`not cure these deficiencies in Volk ’450.
`
`Challenges 2 and 4 based on Volk ’105 are also not reasonably likely to
`
`prevail because Volk ’105 also does not disclose a trimming register. The petition
`
`asserts, without support, that a counter is a trimming register, but that assertion is
`
`contrary to dictionary evidence supplied by the petitioner and other technical
`
`dictionaries. In addition, the petition’s assertion that incrementing or decrementing
`
`a counter constitutes “writing to [a] register” is unsupported. Finally, the petition’s
`
`vague proposal to add Hiraki to Volk ’105 is problematic because the type of
`
`“trimming” described in Hiraki is not the same “trimming” as in Volk ’105 nor the
`
`same as the trimming of interface devices described and claimed in the ’325 Patent.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 14 of 43
`
`
`
`V. THE PETITION SHOULD BE DENIED AS AN UNWARRANTED
`FOLLOW-ON PETITION ATTACKING THE ’325 PATENT FOR A
`SECOND TIME WITHOUT JUSTIFICATION.
`
`Institution of inter partes review is subject to the Board’s discretion under 35
`
`U.S.C. § 314(a). Gen. Plastic Indus. Co. v. Canon Kabushiki Kaisha, IPR2016-
`
`01357, Paper 19 at 8 (Sept. 6, 2017) (precedential, seven-judge panel including Chief
`
`Admin. J. Ruschke and Deputy Chief Admin. J. Boalick); Conopco, Inc. v. Proctor
`
`& Gamble Co., IPR2014-00506, Paper 25 at 3–4 (Dec. 10, 2014) (informative)
`
`(“Conopco I”); see also Bungie, Inc. v. Acceleration Bay, LLC, IPR2016-00936,
`
`Paper 11 at 9 (July 7, 2016). Congress provided that the Director may, but not must,
`
`institute a review when a reasonable likelihood has been shown that the petitioner
`
`would prevail with respect to at least one claim challenged in the petition. See
`
`Harmonic Inc. v. Avid Tech., Inc., 815 F.3d 1356, 1367 (Fed. Cir. 2016) (citing 35
`
`U.S.C. § 314(a) and 37 C.F.R. § 42.108).
`
`In general, the Board is, understandably, skeptical of follow-on petitions such
`
`as this one because they raise serious questions about the allocation of the Board’s
`
`“limited resources” and “fundamental fairness” to patent owners like Polaris:
`
`We are concerned about the limited resources of the
`Board and fundamental fairness for both Petitioner and
`Patent Owner.
` Petitioner cannot expect automatic
`acceptance of multiple petitions for consideration, if they
`are against the same claims of the same patent and filed so
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 15 of 43
`
`
`
`long apart that Petitioner received the benefit of having
`studied Patent Owner’s Preliminary Response in the first
`petition or the Board’s decision on whether to institute
`review in the first petition, prior to filing the second
`petition. That is especially so if Petitioner, at the time of
`filing of the first petition[,] was aware of or should have
`been aware of the prior art references applied in the second
`petition.
`
`The potential inequity based on a petitioner’s filing
`of serial attacks against the same claims of the same
`patent, while having the opportunity to adjust litigation
`positions along the way based on either patent owner’s
`contentions responding to prior challenges or the Board’s
`decision on prior challenges, is real and cannot be ignored.
`. . .
`
`NVIDIA Corp. v. Samsung Elec. Co., IPR2016-00134, Paper 9 at 7-8 (Dec. 19,
`
`2016).1 The scenario about which the Board was so concerned in the NVIDIA case
`
`quoted above is exactly the situation here. The petitioner has used Polaris’s
`
`
`
`
`
`1 The petitioner in this case is the same NVIDIA Corporation, whose follow-on
`
`petition was denied and criticized in the quoted NVIDIA case.
`
`IPR2017-01819
`
`Prelim. Response
`
`Page 16 of 43
`
`
`
`preliminary response and the Board’s non-institution decision from the previous IPR
`
`as a roadmap to mount new challenges to the same claims and has done so without
`
`offering any reasonable explanation or justification for why it deserves to have a
`
`second chance to attack the ’325 Patent.
`
`In the precedential General Plastic case, the Board considered seven factors
`
`when determining whether to institute based on a follow-on petition. General
`
`Plastic at 9–10. These seven factors are known as the NVIDIA factors because they
`
`were first set forth in the NVIDIA case quoted above. Analysis of those seven
`
`NVIDIA factors shows that the follow-on petition in this case should be denied, as
`
`discussed factor-by-factor in the following subsections.
`
`A. NVIDIA Factor 1: Same Petitioner, Same Claims
`
`The first NVIDIA factor to consider is “whether the same petitioner previously
`
`filed a petition directed to the same claims of the same patent.” General Plastic at
`
`9. The first petition challenged claims 1–20, and the present petition challenges five
`
`of those claims (14, 16–18, and 20) again. The petitioner acknowledges that it
`
`previously challenged the same claims in its earlier petition. See Pet. at