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`Page 1 of 6
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`Samsung Exhibit 1020
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`Page 1 of 6
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`Samsung Exhibit 1020
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`

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` .JE£H&L%¥
`
`Edited by
`5. N1. Sze
`b’u'.’ [.ul')(vr.-:.'m‘1¢=5. Iwrorrmrgn'eu'
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`McGraw-Hill Book Company
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`Page 2 of 6
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`Page 2 of 6
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`
`
`This book was set in Tints Roman by Infommiun Sciences Corporation.
`The editors were'T. Michael Slaughter and Mark-lain: Eichmrg:
`the production supcnism' was Lcro_ \. Young.
`
`The cow: was designed by Jmcph (J .
`.
`Th: drawings were done by Bell hibcvrmrics. Incorporalsdr
`Halliday Lithograph Curprmalinn was pnme: and binder
`
`V1.8! TECHNOLOGY
`
`Cupping “Q 1933 by Bell T:lcphonc Laborzmrien. Incurporazcd, All rigth mscnco Primed in
`the United Scam of America Exccpt d.\ pvt-muted 1111631 111: L'mzcd Slat-:3 Copyligh‘. Act or
`1976. no pan of this publicalzon may be reproduced or diarn'buzcd in any for. nr h}; an} mean».
`or stored in a ($41.2 base or remewj sysl:m. withnur the prior Mtnsn pcmm'ssion of Bull Tclc-
`phunc laboratories. sz‘nquami.
`
`23d567890HALHALS987654
`
`ISBN 0-07-052585-3
`
`Library of COT.de Cataloging ir. Puhlication Data
`Main entry under title:
`VI 51 technology.
`
`(.Vichw-Hxll s‘crics in electrical cnginccring.
`Elomonics and electroch cimuhs'l
`Includcs indcx.
`
`
`
`“71292,—..A
`
`
`
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`Inzegrared cirvuzls—Vcry large flak
`l.
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`I. 522. S. M.. data
`11. Series.
`1983
`TK7STA.V’566
`ISBN 0010626803
`
`621.38l‘73
`
`8324947
`
`
`
`
`
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`Page 3 of 6
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`Page 3 of 6
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`

`CHAPTER
`
`EIGHT
`
`DRY ETCHING
`
`C. J. MOGAB
`
`303
`
`ist pattems defined by the lithographic techniques described in Chapter 7 are not
`.
`:errnancnt elements of the final device but only replicas of circuit features. To pro~
`Lsce circuit features. these resist patterns must be transferred into the layers compris-
`e; the device. One method of transferring the pattems is to selectively remove
`-rgztasked portions of a layer. a process generally known
`etching.
`As the title of this chapter suggests. “dry etching“ methods are particularly suit-
`:bic for VLSI processing. Dry etching is synonymous with plasma-assisted etchingl
`--hic':t denotes several techniques that use plasmas in the form of low-pressure gas-
`:3us discharges. These techniques are commonly used in VLSI processing because of
`“heir potential for very-high-fidelity transfer of resist patterns.
`The earliest application of plasmas to silicon le dates back to the late 19605.
`«hen oxygen plasmas were being explored for the stripping of photoresists.2 Work on
`:L-ic use of plasmas for etching silicon was also initiated in the late 1960s and was sig-
`naled by a patent3 detailing the use of CF,-O;
`mixtures. At that time. there was
`no universal endorsement of dry methods which were largely novel replacements for
`e\isting wet chemical techniques.
`This early work set the stage for an important period in the evolution of [C tech—
`rzology. From [9'32 to 1974. workers at several major laboratories were heavily
`:nvolved in the development of an inorganic passivation layer for .VIOS devices. The
`preferred passivatinn tumetl out to be a plasma-deposited silicon nitride layer. While
`:his material exhibited many desirable characteristics. there was one immediate diffi-
`:ulty. No suitable uet chemical etchant could be found to etch wind0ws in the ninjde
`:tt order to expose underlying metallization for subsequent bonding. This problem
`
`11 INTRODUCTION
`
`Page 4 of 6
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`Page 4 of 6
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` _;
`
`ii; 2 Et
`lrxc‘
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`‘m .425“
`
`304 VLSI TECHNOLOGY
`
`'0:
`was circumvented by the use of CF.»—O_1 plasma etching.‘ Concummtly. CF;
`plasma etching was developed for patterning CV’D silicon nitride layers being used as
`junction seals.3 These efforts marked the first significant applications of plasma etch-
`ing in IC manufacture and the beginning of large—scale efforts to develop plasma etch—
`ing techniques.
`Not long after this. an awareness of the potential of plasma techniques for highly
`anisotropic etching evolved.
`In particular. there were many observations of a vertical
`etch rate that greatly exceeded the lateral etch rate when etching through a layer of
`material.
`will become apparent. anisotropy is necessary for high-resolution pat
`tern transfer. The significance of etch anisotropy “as recognich by researchers who
`were hoping to achieve ever larger scales of integration by designing circuits with
`ever smaller features. By the mid-19?(ls. therefore. most major IC manufacturers had
`mounted substantial efforts to develop plasma-assisted etching methods. These
`methods were no longer seen as merely noyel substitutes for wet etching. but rather as
`echniques having capabilities uniquely suited to meeting t‘orseeable requirements on
`pattern transfer.
`
`8.2 PATTERN TRANSFER
`
`"Pattern transfer" refers to the transfer of a pattern. defined by a masking layer. luv
`21 film or substrate by chemical or physical methods that produce surface relief.
`
`8.2.1 Subtractive and Additive Methods
`
`la. the film is deposith
`In the subtractive method of pattern transfer shown in Fig.
`first. a patterned masking layer is then generated lithograp'nically. and the unmasked
`portions of the film are removed by etching.
`In the additive tor iit't-offi metho:
`shown in Fig.
`lb. the lithographic mask is generated first. the film is then deposited
`Over the mask and substrate. and those portions of the film over the mask are removed
`by selectively dissolving the masking layer in an appropriate liquid so that the overly-
`ing film is lifted off and removed.
`The subtractive methods collectively known as. dry etching arc the preferred
`means for pattern transfer in VLSI processing today. The lift-off process is capable of
`high resolution. but is not as; widely applicable as dry etching.
`
`8.2.2 Resolution and Edge Profiles in Subtractive Pattern Transfer
`
`The resolution of an etching process is a measure of the fidelity of pattem transfer.
`which can be quantified by two parameters. Bias is the difference in lateral dimen-
`sion between the ezched image and the mask image. defined as shown in Fig. 2
`Tolerance is a measure of the statistical distribution of bias values that characterize~
`the lateral uniformity of etching.
`
`
`
`
`
`‘h
`
`
`z._.l
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`Page 5 of 6
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`Page 5 of 6
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`l Schematicillustrationsor(atselxructiwand:thaltlmvcmethodsm'punerntruml‘cr.
`
`A zumbias process produces a ver‘tieal edge profile coincident with the edge of
`1‘: :nusk. as shown in Fig. 3:1.
`[[1 this case. there is no etching in the lateral direction
`.in the pattern is transferred with perfect fidelity. This case represents the extreme of
`.-:-:vurropir etching. “hen the veniqu and lateral clch rates are equal or. more pre-
`_-~;l_\'. when the etch rate :~ independent of direction. the edge profile appears as a
`;-.ner-circlc after etching has been curried just to completion an shown in Fig. 3b.
`chi: L‘iiSC of isotropic etching. the bias '1.» twice the film thickness.
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`EMS = 5 - c, — a".
`
`
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`Page 6 of 6
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`Page 6 of 6
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`

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