`
`WN.uns&s
`
`:
`
`:J
`
`wey
`
`/O -o/-O
`
`
`20/12/60
`
`
`
`
`Attorney: Docket No.
`‘UTILITY PATENT APPLICATION TRANSMITTAL
`
`CS Fs
`hag
`(New Nonprovisional Applicatioiis Under 37 CFR § 1.53(b))°%
`
`
`
`TO THE COMMISSIONER FOR PATENTS:
`Transmitted herewith is a patent application idcntificd as follows:
`First-named inventor: Laurence B. Boucher
`i
`i
`Assignee: Alacritech, Inc.
`Filing Date: September 27, 2002
`Title: FAST-PATH APPARATUS FOR RECEIVING DATA CORRESPONDING TO A TCP CONNECTION
`
`‘“ALA-006E *:
`lye
`SS Rt o
`Bees
`. woo~——oo
`=
`eo Sa
`a= =o
`2
`==
`
`;
`,
`
`This application claims the benefit under 35 USC §120 (prior application not abandoned)of:
`(PriorApplication: “Fast-Path Apparatus For ReceivingDataCorrespondingtoa TCPConnection
`‘| Serial No.: 10/092,967__ f
`“Filing Date:March 6, 2002
`Atty, Docket:ALA-006C
`(Examiner: Zami Maung\
`
`This application claims the benefit under 35 USC §120 of Application Serial No. 10/092,967, filed March6,
`2002, whichin turn claims the benefit under 35 USC §120 of Application Serial No. 10/023,240, filed December
`15, 2001, which in turn claims the benefit under 35 USC §120 of Application Serial No. 09/464,283, filed
`December 15, 1999, which in turn claims the benefit under 35 USC §120 of Application Serial No. 09/439,603,
`filed November 12, 1999, which in turn claims the benefit under 35 USC §120 of Application Serial No.
`09/067,544, filed April 27, 1998, which in turn claims the benefit under 35 USC §119 of Provisional Application
`Serial No. 60/061,809, filed October 14, 1997.
`
`x
`a
`
`This application also claims the hencfit under 35 USC §120 of Application Serial No. 09/384,792, filed
`August 27, 1999, which in turn claims the benefit under 35 USC §120 of Application Serial No. 09/141,713, filed
`August 28, 1998, which in turn claims the benefit under 35 USC §119 of Provisional Application Serial No.
`60/098 ,296, filed August 27, 1998.
`
`-
`
`.
`
`i
`
`This application also claims the benefit under 35 U.S.C. §120 of the following:
`U.S. Patent Application Serial No. 09/416,925 (ALA-005), filed October 13, 1999;
`US. Patent Application Serial No; 09/514,425 (ALA-007), filed February 28, 2000;
`USS. Patent Application Serial No. 09/675,484 (ALA-010A),filed September 29, 2000;
`U.S. Patent Application Serial No. 09/675,700 (ALA-010B), filed September 29, 2000;
`US. Patent Application Serial No. 09/789,366 (ALA-013), filed February 20, 2001;
`US. Patent Application Serial No. 09/801,488 (ALA-011), filed March 7, 2001;
`U.S. Patent Application Serial No. 09/802,551 (ALA-012), filed March 9, 2001;
`U.S. Patent Application Serial No. 09/802,426 (ALA-014), filed March 9, 2001;
`U.S. Patent Application Serial No. 09/802,550 (ALA-015), filed March 9, 2001;
`U.S. Patent Application Serial No. 09/855,979 (ALA-016), filed March 14, 2001; and
`U.S. Patent Application Serial No. 09/970,124 (ALA-020), filed October 2, 2001.
`
`(x)
`
`(X) The specification contains a statement claiming priority under 35 USC § 120 and claiming the benefit under
`35 U.S.C. §119.
`The entire disclosure of each of the prior applications (10/092,967; 10/023,240; 09/464,283; 09/439,603;
`09/067,544; 09/384,792; 09/141,713; 09/416,925; 09/514,425; 09/675,484; 09/675,700; 09/789,366;
`09/801,488; 09/802,551; 09/802,426; 09/802,550; 09/855,979; 09/970,124) 1s considered as being part of the
`disclosure of the accompanying application and is hereby incorporated byreferencetherein.
`(X) The entire disclosure of each ofthe prior provisional applications (60/061,809; 60/098,296) is considered as
`being part of the disclosure of the accompanying application and is hereby incorporated by reference therein.
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 001
`
`
`
`y
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`b a o
`
`Enclosedare:
`
`2
`145
`5
`1
`89
`4
`
`4
`Ne
`
`x
`
`pages Application Transmittal Letter
`pages Specification
`pages Claims
`page Abstract
`pages Drawings
`pages Declaration/Powerof Attorney from prior
`application 10/092,967 (signed - copy)
`pages Declaration/Power of Attorney from prior
`application 10/092,967 (signed - copy)
`page CD Appendix Transmittal Letter
`CD Appendix (two copies)
`
`°
`
`Ss
`
`ip
`Bomb oy oe
`ah BBS Hee hb Le
`
`~
`
`page Terminal Disclaimer Over A Prior Patent
`A checkfor filing fee ($ 922.00)
`Return Receipt Postcard
`
`Newly Executed Declaration Not Required:
`A newly executed declaration is not filed in this application because, under 37 CFR 1.63(d)(1), a newly exccuted
`declaration is not required because:
`ihe prior application containcd a declaration as prescribed by 37 CFR 1.63;
`the
`continuation application (this application) is filed by all of the inventors namedin the prior application; the specification
`and drawingsin the continuation application (this application) contain no matter that would have been new matter in the
`prior application; and a copy of the executed declaration (there were two) in the prior application is being submitted in the
`continuation application (this application).
`
`Thefiling fee is calculated as follows:
`
`
`CLAIMS AS FILED
`
`FOR
`NO. EXTRA
`
`
`
`Total Claims
`
`
`
`Independent Claims 3884.00$0100
`
`
`
`
`
`Multiple Dependent Claims (if applicable)
`
`
`Assignment Recording Fee
`
`
`Terminal Disclaimer Fee (37 CFR 1.20(d))
`
`
`
`Basic Filing Fee
`
`
`
`
` Total Filing Fce
`e
`
`$110.00
`$740.00
`$922.00
`
`I herebycertify that this is being deposited with the U.S. Postal
`Service “Express Mail Post Office to Addressee” service under
`37-CFR§ 1.10 on the date indicated below and1s addressed to:
`ae
`Box Patent Application
`Assistant Commissionerfor Patents
`:
`Washington, D.C. 20231
`
`
`By
`
`Typed Name: Mark Lauer
`
`-
`
`Respectfully submitted,
`By: gee
`
`
`Mark Lauer
`
`.
`Attorney for Applicants
`Reg. No. 36,578
`ao
`— Customer No. 24,5017~~
`Date: GS-27 -22.
`
`Express Mail Label No.: EL928548779US.,
`Date ofDeposit: P-~a2P-L
`.
`>
`_
`
`
`Correspondence Address:
`Mark Lauer, Patent Attorney
`Pleasanton, California 94566
`7041 Koll Center Parkway, Suite 280
`
`Phone:
`Fax:
`
`(925) 484-9295
`(925) 484-9291
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 002
`
`
`
`
`
`TO THE ASSISTANT COMMISSIONER FOR PATENTS:
`
`Inventors:
`
`Laurence B. Boucher,et al.
`
`Atty Docket: ALA-OO6E
`
`Filing Date:
`
`September 27, 2002
`
`Serial No.:
`
`Unknown
`
`Title:
`
`FAST-PATH APPARATUS FOR RECEIVING DATA CORRESPONDING TO
`A TCP CONNECTION
`
`
`Compact Disk Transmittal Letter per 37 CFR 1.52(e)3(ii))
`
`Sir:
`
`Transmitted herewith are:
`
`Two Labeled Compact Discs — Recordable (CD-R)
`
`“Copy !” and “Copy2,” each in a
`
`CD case and contained in a padded envelope.
`
`The content on the two discsis identical
`
`The machine format is: IBM-PC
`
`The operating system is: MS-Windows
`
`The creation date of the CDs is: September 26, 2002
`
`The name, date and size of the files on the CDs are listed below:
`
`There are three folders on each disc: 1) CD Appendix A,
`
`2) CD Appendix B, and
`
`3) CD Appendix C.
`
`Folder Appendix A contains twofiles:
`
`CD Appendix A Title Page.txt. Its size is 370 bytes. It was created 9/26/02.
`
`Rev.v. Its size is 84.4KB. It was created 1/7/99.
`
`Folder Appenidix B contains twofiles:
`
`CD Appendix B Title Page.txt.
`
`Its size is 495 bytes. It was created 9/26/02.
`
`Microcode.txt. Its size is 105 KB. It was created 10/1/99.
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 003
`
`
`
`
`
`Folder Appendix C containsthree files:
`
`CD Appendix C Title Page.txt. Its size is 416 bytes. It was created 9/26/02.
`
`atcpsource.wrd.txt. Its size is 778 KB. It was created (written to disc) 2/19/02.
`?
`
`simbasource.wrd.txt. Its size is 262 KB. It was created (written to disc) 2/19/02.
`
`Respectfully submitted,
`
`Sf—
`
`CERTIFICATE OF MAILING
`
`I hereby certify that this correspondencets being deposited with
`the United States Postal Service as Express Mail Label No.
`EL928365779USin an envelope addressed to: Box PATENT
`APPLICATION,Assistant Commissionerfor Patents,
`Washington, D.C. 20231, on September 27, 2002.
`
`Date:
`
`2 2? m2 Se
`
`Mark Lauer
`
`Mark Lauer
`Reg. No. 36,578
`7041 Koll Center
`Parkway
`Suite 280
`Pleasanton, CA 94566
`Tel:
`(925) 484-9295
`Fax:
`(925) 484-9291
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 004
`
`
`
`
`ALA-006E
`
`TERMINAL DISCLAIMER OVER A PRIOR PATENT
`[:
`10/03/2002 BTESSEM 00000026 10260878
`In re Application of: Laurence B. Boucheret al.
`93 FC=148
`110.00 op
`
`Application No.:
`
`Unknown
`
`Filed:
`
`Title:
`
`September 27, 2002
`
`FAST-PATH APPARATUS FOR RECEIVING DATA
`CORRESPONDING TO A TCP CONNECTION
`
`Express Mail No.:
`
`EL928365779US
`
`The owner, Alacritech, Inc., of a one hundred percentinterest in the instant
`_ application hereby disclaims, except as provided below, the terminalpart of the statutory
`’ term of any patent grantedon the instant application, which would extend beyondthe
`expiration date of the full statutory term defined in 35 U.S.C. 154 to 156 and 173, as
`presently shortened by any terminal disclaimer, of prior U.S. Patent Nos. 6,226,680 and
`6,247,060. The owner hereby agrees that any patent so granted on the instant application
`shall be enforceable only for and during such periodthat it and the prior patents are
`commonly owned. This agreement runs with any patent granted on the instant application
`and is binding upon the grantce, its successors or assigns.
`
`In making the above disclaimer, the owner does not disclaim the terminal part of
`any patent granted on the instant application that would extend to the expiration date of
`the full statutory term as defined in 35 U.S.C. 154 to 156 and 173 ofthe prior patents, as
`presently shortened by any terminal disclaimer, in the eventthat they later: expire for
`failure to pay a maintenance fee, are held unenforceable, are found invalid by a court of
`competent jurisdiction, are statutorily disclaimed in whole or terminally disclaimed under
`37 CFR 1.321, haveall claims canceled by a reexaminationcertificate, are reissued, or
`are in any mannerterminated prior to the expiration ofits full statutory term as presently
`shortened by any terminal disclaimer.
`
`I hereby declare that all statements made herein of my own knowledgeare true
`and that all statements made on informationand belief are believed to be true; and further
`that these statements were made with the knowledge that willful false statements and the
`like so made are punishable by fine or imprisonment, or both, under Section 1001 of Title
`18 of the United States Code and that such willful false statements may jeopardize the
`validity of the application or any patent issued thereon.
`
`Date:
`
`The undersigned is an attorney or agent of record.
`7 ~2 7-2,
`GE
`
`Mark Lauer
`Registration No. 36,578
`
`_—_
`
`The terminal disclaimer fee under 37 CFR 1.20(d) is included.
`
`ae
`No See
`
`
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 005
`
`
`
`
`
`4e
`
`eBAY\
`
`1 |
`*
`otae
`
`1 ALA-006E
`
`FAST-PATH APPARATUS FOR RECEIVING DATA
`
`CORRESPONDING TO A TCP CONNECTION
`
`Laurence B. Boucher
`
`Stephen E. J. Blightman
`
`Peter K. Craft
`
`David A. Higgen
`
`Clive M. Philbrick
`
`Daryl D. Starr
`
`10
`
`20
`
`25
`
`30
`
`CROSS-REFERENCE TO RELATED APPLICATIONS
`
`This application claims the benefit under 35 U.S.C. §120 of U.S. Patent Application Serial
`
`No. 10/092,967, entitled “FAST-PATH APPARATUS FOR RECEIVING DATA
`
`CORRESPONDING TO A TCP CONNECTION,”filed March 6, 2002, by Laurence B.
`
`Boucheret al., which in tur claimsthe benefit under 35 U.S.C. §120 of U.S. Patent
`
`Application Serial No. 10/023,240 (Attorney Docket No. ALA-006A), entitled “TRANSMIT
`
`FAST-PATH PROCESSING ON TCP/IP OFFLOAD NETWORK INTERFACE DEVICE,”
`filed December 15, 2001, by Laurence B. Boucheret al., which in turn claimsthe benefit
`under 35 U.S.C. §120 of U.S. Patent Application Serial No. 09/464,283 (Attorney Docket No.
`
`ALA-006), entitled “INTELLIGENT NETWORK INTERFACE DEVICE AND SYSTEM
`
`FOR ACCELERATED COMMUNICATION”,filed December 15, 1999, by LaurenceB.
`
`Boucheret al., which in turn claims the benefit under 35 U.S.C. §120of U.S. Patent
`
`Application Serial No. 09/439,603 (Attorney Docket No. ALA-009), entitled “INTELLIGENT
`
`NETWORK INTERFACE SYSTEM AND METHOD FOR ACCELERATED PROTOCOL
`
`PROCESSING’,filed November 12, 1999, by Laurenee B. Boucheret al., which in turn
`
`claims the benefit under 35 U.S.C. §120 of U.S. Patent Application Serial No. 09/067,544
`
`(Attorney Docket No. ALA-002), entitled “INTELLIGENT NETWORK INTERFACE
`
`SYSTEM AND METHOD FOR ACCELERATED PROTOCOL PROCESSING”,filed April
`
`27, 1998, which in turn claimsthe benefit under 35 U.S.C. § 119(e)(1) of the Provisional
`
`Application filed under 35 U.S.C. §111(b) entitled “INTELLIGENT NETWORK
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 006
`
`
`
`ALA-006E
`
`ene
`JME Foe Meoe
`Pans aoa Hed “35
`
`INTERFACE CARD AND SYSTEM FOR PROTOCOL PROCESSING,” Serial No.
`
`60/061,809 (Attomey Docket No. ALA-001), filed on October 14, 1997.
`
`This application also claims the benefit under 35 U.S.C. §120 of U.S. Patent Application
`
`Serial No. 09/384,792 (Attorney Docket No. ALA-008), entitled “INTELLIGENT
`NETWORK INTERFACE DEVICE AND SYSTEM FOR ACCELERATED
`
`COMMUNICATION,”filed August 27, 1999, which in turn claims the benefit under 35
`
`U.S.C. §120 of U.S, Patent Application Serial No. 09/141,713 (Attorney Docket No, ALA-
`
`003), entitled “INTELLIGENT NETWORK INTERFACE DEVICE AND SYSTEM FOR
`
`ACCELERATED PROTOCOL PROCESSING”, filed August 28, 1998, which both claim the
`
`benefit under 35 U.S.C. § 119(e)(1) of the Provisional Application filed under 35 U.S.C.
`
`§111(b) entitled “INTELLIGENT NETWORK INTERFACE DEVICE AND SYSTEM FOR
`
`ACCELERATED COMMUNICATION,”Serial No. 60/098,296 (Attorney Docket No. ALA-
`
`004), filed August 27, 1998.
`
`This application also claimsthe benefit under 35 U.S.C. §120 of U.S. Patent Application
`Serial No. 09/416,925 (Attorney Docket No. ALA-005), entitled “QUEUE SYSTEM FOR
`- MICROPROCESSORS,”filed October 13, 1999, U.S. Patent Application Serial No.
`
`09/514,425 (Attorney Docket No. ALA-007), entitled “PROTOCOL PROCESSING STACK
`
`FOR USE WITH INTELLIGENT NETWORK INTERFACE CARD,”filed February 28,
`
`2000, U.S. Patent Application Serial No. 09/675,484 (Attorney Docket No. ALA-O10A),
`
`entitled “INTELLIGENT NETWORK STORAGE INTERFACESYSTEM,”filed September
`
`29, 2000, U.S. Patent Application Serial No. 09/675,700 (Attorney Docket No. ALA-010B),
`
`entitled “INTELLIGENT NETWORK STORAGE INTERFACE DEVICE,”filed September
`
`29, 2000, U.S. Patent Application Serial No. 09/789,366 (Attorney Docket No. ALA-013),
`
`entitled “OBTAINING A DESTINATION ADDRESS SO THAT A NETWORK
`
`10
`
`15
`
`20
`
`25
`
`INTERFACE DEVICE CAN WRITE NETWORK DATA WITHOUT HEADERS
`
`DIRECTLY INTO HOST MEMORY,”filed February 20, 2001, U.S. Patent Application
`
`Serial No, 09/801,488 (Attorney Docket No. ALA-011), entitled “PORT AGGREGATION
`
`FOR NETWORK CONNECTIONS THAT ARE OFFLOADED TO NETWORK
`
`INTERFACE DEVICES,”filed March 7, 2001, U.S. Patent Application Serial No. 09/802,551
`
`30
`
`(Attorney Docket No. ALA-012), entitled “INTELLIGENT NETWORK STORAGE
`
`INTERFACE SYSTEM,”filed March 9, 2001, U.S. Patent Application Serial No. 09/802,426
`
`(Attorney Docket No. ALA-014), entitled “REDUCING DELAYS ASSOCIATED WITH
`2
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 007
`
`
`
`ALA-006E
`
`
`
`INSERTING A CHECKSUM INTO A NETWORK MESSAGE,”filed March 9, 2001, U.S.
`Patent Application Serial No. 09/802,550 (Attorney Docket No. ALA-015), entitled
`
`“INTELLIGENT INTERFACE CARD AND METHOD FOR ACCELERATED PROTOCOL
`
`PROCESSING,”filed March 9, 2001, U.S. Patent Application Serial No. 09/855,979
`
`(Attorney Docket No. ALA-016), entitled “NETWORK INTERFACE DEVICE
`
`EMPLOYING DMA COMMANDQUEUE,”filed March 14, 2001, U.S. Patent Application
`
`Serial No. 09/970,124 (Attorney Docket No. ALA-020), entitled “NETWORK INTERFACE
`
`DEVICE THAT FAST-PATH PROCESSES SOLICITED SESSION LAYER READ
`
`COMMANDS,” filed October 2, 2001.
`
`10
`
`The subject matter ofall of the above-identified patent applications (including the
`
`subject matter in the Microfiche Appendix of U.S. Application Serial No. 09/464,283), and of
`
`the two above-identified provisional applications, is incorporated by reference herein.
`
`REFERENCE TO COMPACT DISC APPENDIX
`
`The Compact Disc Appendix (CD Appendix), whichis a part of the presentdisclosure,
`
`includes three folders, designated CD Appendix A, CD Appendix B, and CD Appendix C on
`
`the compact disc. CD Appendix A contains a hardware description language (verilog code)
`
`description of an embodiment of a receive sequencer. CD Appendix B contains microcode
`
`executed by a processor that operates in conjunction with the receive sequencer of CD
`
`20
`
`Appendix A. CD Appendix C contains a device driver executable on the host as well as ATCP
`
`code executable on the host. A portion of the disclosure of this patent document contains
`
`material (other than any portion of the “free BSD” stack included in CD Appendix C) whichis
`
`subject to copyright protection. The copyright owner of that material has no objection to the
`
`facsimile reproduction by anyone of the patent documentor the patent disclosure, as it appears
`
`in the Patent and Trademark Office patent files or records, but otherwise reservesall copyright
`
`rights.
`
`TECHNICAL FIELD
`
`The present invention relates generally to computer or other networks, and more
`
`particularly to processing of information communicated between hosts such as computers
`
`connected to a network.
`
`25
`
`30
`
`
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 008
`
`
`
`oa thay 5
`tee Eo ut BY
`
`ALA-006E
`
`BACKGROUND
`
`The advantages of network computing are increasingly evident. The convenience and
`
`efficiency of providing information, communication or computational power to individuals at
`their personal computer or other end user devices has led to rapid growth of such network
`computing, including internet as well as intranet devices and applications.
`
`Asis well known, most network computer communication is accomplished with the aid of
`
`a layered software architecture for moving information between host computers connected to
`the nctwork. The layers help to segregate information into manageable segments, the general
`functions of each layer often based on an international standard called Open Systems
`
`Interconnection (OSI). OST sets forth seven processing layers through which information may
`
`pass when received by a host in order to be presentable to an end user. Similarly, transmission
`
`of information from a host to the network may pass through those seven processing layers in
`
`reverse order. Each step of processing and service by a layer may include copying the
`processed information.. Another reference modelthat is widely implemented, called TCP/IP
`
`(TCPstands for transport control protocol, while IP denotes internet protocol) essentially
`
`employsfive of the seven layers of OSI.
`
`10
`
`15
`
`Networks may include, for instance, a high-speed bus such as an Ethernet connection or an
`
`internet connection between disparate local area networks (LANs), each of which includes
`
`multiple hosts, or any ofa variety of other known meansfor data transfer between hosts.
`
`20
`
`According to the OSI standard, physical layers are connected to the network at respective
`
`hosts, the physical layers providing transmission and receipt of raw data bits via the network.
`
`A data link layer is serviced by the physical layer of each host, the data link layers providing
`framedivision and error correction to the data received from the physical layers, as well as
`
`processing acknowledgmentframessent by the recciving host. A nctwork layer of each hostis
`serviced by respective data link layers, the network layers primarily controlling size and
`
`25
`
`coordination of subnets of packets of data.
`
`A transport layer is serviced by each network layer andasession layer is serviced by each
`transport layer within each host. Transport layers accept data from their respective session
`
`layers and split the data into smaller units for transmission to the other host’s transport layer,
`
`30
`
`which concatenates the data for presentation to respective presentation layers. Session layers
`
`allow for enhanced communication control between the hosts. Presentation layers are serviced
`
`by their respective session layers, the presentation layers translating bctwecn data semantics
`4
`
`CAVIUM-1002
`Cavium, Inc. v. Alacritech, Inc.
`Page 009
`
`
`
`ALA-006E
`
`
`
`and syntax which maybepeculiar to each host and standardizedstructures of data
`representation. Compression and/or encryption of data may also be accomplished at the
`presentation level. Application layers are serviced by respective presentation layers, the
`
`application layers translating between programsparticular to individual hosts and standardized
`
`programsfor presentation to either an application or an end user. The TCP/IP standard
`includes the lower four layers and application layers, but integrates the functions of session
`layers and presentation layers into adjacent layers. Generally speaking, application,
`
`presentation and session layers arc defined as upper layers, while transport, network and data
`
`link layers are defined as lowerlayers.
`
`10
`
`15
`
`Therules and conventions for each layer are called the protocol of that layer, and since the
`
`protocols and general functions of each layer are roughly equivalent in various hosts, it is
`
`useful to think of communication occurring directly between identical layers of different hosts,
`
`even though these peer layers do not directly communicate without information transferring
`
`sequentially through each layer below. Each lower layer performsa service for the layer
`
`~
`
`immediately above it to help with processing the communicated information. Each layer saves
`the information for processing and scrvicc to the next layer. Due to the multiplicity of
`hardware and software architectures, devices and programs commonly employed, each layer is
`
`necessary to insure that the data can makeit to the intended destination in the appropriate
`
`form, regardless of variations in hardware and software that may intervene.
`
`20
`In preparing data for transmission fromafirst to a second host, some control data is added
`
`at each layer of thefirst host regarding the protocol of that layer, the control data being
`
`indistinguishable from the original (payload) data for all lower layers of that host. Thus an
`
`application layer attaches an application header to the payload data and sends the combined
`
`data to the presentation layer of the sending host, which receives the combined data, operates
`on it and addsa presentation headerto the data, resulting in another combined data packet.
`
`25
`
`The data resulting from combination of payload data, application header and presentation
`
`header is then passed to the session layer, which performs required opcrations including
`
`attaching a session headerto the data and presenting the resulting combination of data to the
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`transport layer. This process continues as the information movesto lower layers, with a
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`transport header, network header and data link header andtrailer attached to the data at each of
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`those layers, with each step typically including data moving and copying, before sending the
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`data as bit packets over the network to the second host.
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`The receiving host generally performs the converse of the above-described process,
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`beginning with receiving the bits from the network, as headers are removed and data processed
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`in order from the lowest (physical) layer to the highest (application) layer before transmission
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`to a destination of the receiving host. Each layer of the receiving host recognizes and
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`manipulates only the headers associated with that layer, since to that layer the higher layer
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`control data is included with and indistinguishable from the payload data. Multiple interrupts,
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`valuable central processing unit (CPU) processing time and repeated data copies may also be
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`necessary for the receiving hostto place the data in an appropriate form at its intended
`destination.
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`The above description of layered protocol processing is simplified, as college-level
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`textbooks devoted primarily to this subject are available, such as Computer Networks, Third
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`Edition (1996) by Andrew S. Tanenbaum, which is incorporated herein by reference. As
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`defined in that book, a computer network is an interconnected collection of autonomous
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`computers, such as internet and intranet devices, including local area networks (LANs), wide
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`. area networks (WANs), asynchronoustransfer mode (ATM),ring or token ring, wired,
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`wireless, satellite or other means for providing communication capability between separate
`processors. A computeris defined herein to include a device having both logic and memory
`functions for processing data, while computers or hosts connected to a network are said to be
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`heterogencousif they function according to different operating devices or communicate via
`different architectures.
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`Asnetworks grow increasingly popular and the information communicated thereby
`becomesincreasingly complex and copious, the need for such protocol processing has
`increased. It is estimated that a large fraction of the processing power of a host CPU may be
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`devoted to controlling protocol processes, diminishing the ability of that CPU to perform other
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`tasks. Network interface cards have been developed to help with the lowest layers, such as the
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`physical and data link layers. It is also possible to increase protocol processing speed by
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`simply adding more processing power or CPUs according to conventional arrangements. This
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`solution, however, is both awkward and expensive. But the complexities presented by various
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`networks, protocols, architectures, operating devices and applications gencrally require
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`extensive processing to afford communication capability between various network hosts.
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`SUMMARYOF THE INVENTION
`The current invention provides a device for processing network communicationthat greatly
`increases the speedofthat processing and the efficiency of transferring data being
`communicated. The invention has been achieved by questioning the long-standing practice of
`performing multilayered protocol processing on a general-purpose processor. The protocol
`processing methodand architecture that results effectively collapses the layers of a connection-
`based, layered architecture such as TCP/IP into a single wider layer which is able to send
`network data moredirectly to and from a desired location or buffer on a host. This accclerated
`processing is provided to a host for both transmitting and receiving data, and so improves
`performance whetherone or both hosts involved in an exchangeof information have such a
`feature.
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`The accelerated processing includes employing representative control instructions for a
`given message that allow data from the message to be processed via a fast-path which accesses
`messagedata directly at its source or deliversit directly to its intended destination. This fast-
`path bypasses conventional protocol processing of headers that accompanythe data. Thefast-
`path employsa specialized microprocessor designed for processing network communication,
`avoiding the delays andpitfalls of conventional software layer processing, such as repeated
`copying andinterrupts to the CPU.
`Ineffect, the fast-path replaces the states that are
`traditionally found in several layers of a conventional network stack with a single state
`machine encompassingall thoselayers, in contrast to conventionalrules that require rigorous
`differentiation and separation of protocol layers. The hostretains a sequential protocol
`processing stack which can be employed forsetting up a fast-path connection or processing
`message exceptions. The specialized microprocessor and the host intelligently choose whether
`a given messageorportion ofa messageis processed by the microprocessor or the host stack.
`One embodiment is a method of generating a fast-path response to a packet reccived onto a
`network interface device where the packet is received over a TCP/IP network connection and
`where the TCP/IP network connectionis identified at least in part by a TCP source port, a TCP
`destination port, an IP source address, and an IP destination address. The method comprises:
`1) Examining the packet and determining from the packet the TCP source port, the TCP
`destination port, the IP source address, and the IP destination address; 2) Accessing an
`appropriate template header stored on the network interface device. The template header has
`TCP fields and IP fields; 3) Employing a finite state machinethat implements both TCP
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`3ot.
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`protocol processing and IP protocol processingto fill in the TCP fields and IP fields of the
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`template header; and 4) Transmitting the fast-path response from the network interface device.
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`Thefast-path response includesthefilled in template header and a payload. Thefinite state
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`machine doesnot entail a TCP protocol processing layer and a discrete IP protocol processing
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`layer where the TCPand IP layers are executed one alter another in sequence. Rather, the
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`finite state machine covers both TCP andIP protocol processing layers.
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`In one embodiment, buffer descriptors that point to packets to be transmitted are pushed
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`onto a plurality of transmit queues. A transmit sequencer popsthe transmit queues and obtains
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`the buffer descriptors. The buffer descriptors are then used to retrieve the packets from buffers
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`where the packets are stored. The retrieved packets are then transmitted from the network
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`interface device. In one embodiment, there are two transmit queues, one having a higher
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`transmission priority than the other. Packets identified by buffer descriptors on the higher
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`priority transmit queue are transmitted from the network interface device before packets
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`identified by the lower priority transmit queue.
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`Other structures and methodsare disclosed in the detailed description below. This
`summary does not purport to define the invention. The invention is defined by the claims.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`FIG. 1 is a plan view diagram ofa device of the present invention, including a host
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`20°
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`computer having a communication-processing device for accelerating network
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`communication.
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`FIG.2 is a diagram of information flow for the host of FIG. 1 in processing network
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`communication, including a fast-path, a slow-path and a transfer of connection context
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`between the fast and slow-paths.
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`FIG. 3 is a flow chart of message receiving according to the present invention.
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`FIG.4A is a diagram of information flow for the host of FIG. | receiving a message packet
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`processed by the slow-path.
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`FIG.4B is a diagram of information flow for the host of FIG. 1 receiving an initial message
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`packet processed by the fast-path.
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`FIG. 4C is a diagram of information flow for the host of FIG. 4B receiving a subsequent
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`message packet processed by the fast-path.
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`FIG. 4D is a diagram of information flow for the host of FIG. 4C receiving a message
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`packet having an error that causes processing to revert to the slow-path.
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`FIG. 5 is a diagram of information flow for the host of FIG. 1 transmitting a message by
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`either the fast or slow-paths.
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`FIG.6 is a diagram of information flow for a first embodiment of an intelligent network
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`interface card (INIC) associated with a client having a TCP/IP processing stack.
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`FIG.7 is a diagram of hardware logic for the INIC embodiment shownin FIG.6, including
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`a packet control sequencer and a fly-by sequencer.
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`FIG. 8 is a diagram ofthe fly-by sequencer of FIG. 7 for analyzing header bytes as they are
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`received by the INIC.
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`FIG.9 is a diagram of information flow for a second embodiment of an INIC associated
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`with a server having a TCP/IP processing stack.
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`FIG. 10 is a diagram of a commanddriverinstalled in the host of FIG. 9 for creating and
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`controlling a communication control block for the fast-path.
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`FIG. 11 is a diagram of the TCP/IP stack and command driver of FIG. 10 configured for
`NetBios communications.
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`FIG. 12 is a diagram of a communication exchange between the client of FIG. 6 and the
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`server of FIG. 9,
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`FIG. 13 is a diagram of hardware functions included in the INIC of FIG. 9.
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`FIG. 14 is a diagram ofa trio of pipelined microprocessors included in the INIC of FIG. 13,
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`including three phases with a processor in each phase.
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`FIG. 15A is a diagram ofa first phase of the pipelined microprocessor of FIG. 14.
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`FIG. 15B is a diagram of a second phaseofthe pipelined microprocessor of FIG. 14.
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`FIG. 15C is a diagram ofa third phase of the pipelined microprocessor of FIG. 14.
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`FIG. 16 is a diagram of a plurality of queue storage units that interact with the
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`microprocessor of FIG. 14 and include SRAM and DRAM.
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`FIG. 17 1s a diagram ofa set of