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`LG Ex. 1002
`LG v. ATI
`IPR2017-01225
`
`LG Ex. 1002, pg 1
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`LG Ex. 1002, pg 1
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`LG Ex. 1002
`LG v. ATI
`IPR2017-01225
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`Application Data Sheet 37 CFR 1.76
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`Title of Invention|GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
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`Applicant Authority @/nventor|()Legal Representative under 35 U.S.C. 117 CParty ofInterest under 35 U.S.C. 118
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`Prefix} Given Name Family Name Middle Name
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`Stephen
`L.
`Morein
`
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`(©) Active USner Service
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`Residence Information (Select One)
`Cambridge
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`SicersipnrTERIA[UE
`Mailing Address of Applicant.
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`
`Address 1
`10 Magazine
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`Apt. 801
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`Applicant2
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`
`Applicant Authority (@)Inventor|()Legal Representative under 35 U.S.C. 117 C)Party ofInterest under 35 U.S.C. 118
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`Laurent Lefebvre
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`Lachgnaie
`Country Of Residencei
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`
`Citizenship under 37 CFR 1.41{b}i
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`Mailing Address of Applicant:
`Address 1
`124 Parenchere
`
`Postal Code
`JeW 6A5
`Countryi
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`Applicant 3
`
`Applicant Authority @!/nventor|(Legal Representative under 35 U.S.C. 117 ©)Partyof Interest under 35 U.S.C. 118
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`Prefix} Given Name
`Middle Name
`Family Name
`Andrew
`E.
`Gruber
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`Residence Information (Select One)
`(@) US Residency
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`EFS Web 2.2.2
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`LG Ex. 1002, pg 2
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`LG Ex. 1002, pg 2
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`Application Data Sheet 37 CFR 1.76
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`Title of Invention|GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
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`Address 1
`215 Pleasant Street
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`Skende
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`Shrewsbury
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`Us
`
`Address 1
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`49 Sheridan Drive, #11
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`City
`Shrewsbury
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`Postal Code | 01545 Countryi | Us
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`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
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`Suggested Figure for Publication (if any}
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`Attorney Docket Number| 00100.36.0001 Small Entity Status Claimed [|
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`Nonprovisional
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`Utility
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`EFS Web 2.2.2
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`LG Ex. 1002, pg 3
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`LG Ex. 1002, pg 3
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`EFS Web 2.2.2
`
`LG Ex. 1002, pg 4
`
`LG Ex. 1002, pg 4
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`
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`PTO/SB/14 (11-08)
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`Attorney Docket Number|00100.36.0001
`Application Data Sheet 37 CFR 1.76
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`
`Title of Invention|GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
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`ATI Technologies ULC
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`1 Commerce Valley Drive East
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`Address 2
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`fciy«idthom——SSC«dSterovinceNCS
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`Signature=|/Christopher J. Reckamp/ Date (YYYY-MM-DD)| 2011-05-17
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`First Name|Christopher Last Name|Reckamp Registration Number|34414
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`EFS Web 2.2.2
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`LG Ex. 1002, pg 5
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`LG Ex. 1002, pg 5
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`LG Ex. 1002, pg 6
`
`LG Ex. 1002, pg 6
`
`
`
`
`
`Electronic Patent Application Fee Transmittal
`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`First Named Inventor/Applicant Name: Stephen L. Morein
`
`Filer:
`
`Christopher J. Reckamp/Christine Wright
`
`Filed as Large Entity
`
`Utility under 35 USC 111(a)Filing Fees
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`
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`
`Sub-Total in
`USD($)
`
`
`
`Quantity
`
`Claims:
`
`Independent Claimsin excess of
`
`el
`
`Miscellaneous-Filing:
`
`LG Ex. 1002, pg 7
`
`LG Ex. 1002, pg 7
`
`
`
`
`
`
`
`Sub-Total in
`Fee Code Quantity AmountDescription USD(S)
`
`1970
`
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`
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`
`Patent-Appeals-and-Interference:
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`Extension-of-Time:
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`LG Ex. 1002, pg 8
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`LG Ex. 1002, pg 8
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`Electronic Acknowledgement Receipt
`
`10111290
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`
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`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`
`
`First Named Inventor/Applicant Name:
`
`Stephen L. Morein
`
`Customer Number:
`
`29153
`
`re Christopher Reckemp/ChristineNeigh
`
`
`
`Filer Authorized By: Christopher J, Reckamp
`
`Attorney Docket Number:
`
`00100,36.0001
`
`17:29:16
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`LG Ex. 1002, pg 9
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`Charge any Additional Fees required under 37 C.F.R. Section 1.19 (Document supply fees)
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`DocumentDescription|Flee Message Digest|Part/.zip| (ifappl.)
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`360001_Application.pdf
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`Drawings-only black and white line
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`360001_Drawings.pdf
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`LG Ex. 1002, pg 10
`
`LG Ex. 1002, pg 10
`
`
`
`Information:
`
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`Total Files Size (in bytes) 3009427
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`This AcknowledgementReceipt evidences receipt on the noted date by the USPTO ofthe indicated documents,
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`LG Ex. 1002, pg 11
`
`LG Ex. 1002, pg 11
`
`
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`RELATED APPLICATIONS
`
`[0001]
`
`This application is a continuation of co-pending U.S. Application Serial No.
`
`12/791,597,
`
`filed June 1, 2010, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`EMPLOYING A UNIFIED SHADER”, having as inventors Steven Morein et al., owned by
`
`instant assignee and is incorporated herein by reference, which is a continuation of co-pending
`
`U.S. Application Serial No. 11/842,256,
`
`filed August 21, 2007, entitled “GRAPHICS
`
`PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER”, having as inventors
`
`Steven Morein et al., owned by instant assignee and is incorporated herein by reference, whichis
`
`a continuation of U.S. Application Serial No. 11/117,863, filed April 29, 2005, which has issued.
`
`into U.S. Patent No. 7,327,369, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`EMPLOYING A UNIFIED SHADER”, having as inventors Steven Morein et al., and owned by
`
`instant assignee and is incorporated herein by reference which is a continuation of U.S.
`
`Application Serial No. 10/718,318, filed on November 20, 2003, which has issued into U.S.
`
`Patent No. 6,897,871, entitled “GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A
`
`UNIFIED SHADER’, having as inventors Steven Morein et al., and owned by instant assignee
`
`and is incorporated herein by reference.
`
`FIELD OF THE INVENTION
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`[0002]
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`The present
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`invention generally relates
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`to graphics processors and, more
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`particularly, to a graphics processor architecture employing a single shader.
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`BACKGROUND OF THE INVENTION
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`[0003]
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`In computer graphics applications, complex shapes and structures are formed
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`through the sampling, interconnection and rendering of more simple objects, referred to as
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`CHICAGO/#2201074.1
`
`LG Ex. 1002, pg 12
`
`LG Ex. 1002, pg 12
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`
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`primitives. An example of such a primitive is a triangle, or other suitable polygon. These
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`primitives, in turn, are formed by the interconnection of individual pixels. Color and texture are
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`then applied to the individual pixels that comprise the shape based on their location within the
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`primitive and the primitives orientation with respect to the generated shape; thereby generating
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`the object that is rendered to a corresponding display for subsequent viewing.
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`[0004]
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`The interconnection of primitives and the application of color and textures to
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`generated shapes are generally performed by a graphics processor. Conventional graphics
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`processors include a series of shaders that specify how and with what correspondingattributes, a
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`final
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`image is drawn on a screen, or suitable display device. As illustrated in FIG. 1, a
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`conventional shader 10 can be represented as a processing block 12 that accepts a plurality of
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`bits of input data, such as, for example, object shape data (14) in object space (x,y,z); material
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`properties of the object, such as color (16); texture information (18); luminance information (20);
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`and viewing angle information (22) and provides output data (28) representing the object with
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`texture and other appearance properties applied thereto (x’, y”, z’).
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`[0005]
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`In exemplary fashion,as illustrated in FIGS. 2A-2B, the shader accepts the vertex
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`coordinate data representing cube 30 (FIG. 2A) as inputs and provides data representing, for
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`example, a perspectively corrected view of the cube 30° (FIG. 2B) as an output. The corrected
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`view may be provided, for example, by applying an appropriate transformation matrix to the data
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`representing the initial cube 30. More specifically, the representation illustrated in FIG. 2B is
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`provided by a vertex shader that accepts as inputs the data representing, for example, vertices
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`Vx. Vy and Vz, among others of cube 30 and providing angularly oriented vertices Vx,,Vy: and
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`V7z,, including any appearanceattributes of corresponding cube 30”.
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`CHICAGO/#2201074.1
`
`LG Ex. 1002, pg 13
`
`LG Ex. 1002, pg 13
`
`
`
`[0006]
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`In addition to the vertex shader discussed above, a shader processing block that
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`operates on the pixel level, referred to as a pixel shaderis also used when generating an object
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`for display. Generally, the pixel shader provides the color value associated with each pixel of a
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`rendered object.
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`Conventionally, both the vertex shader and pixel shader are separate
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`components that are configured to perform only a single transformation or operation. Thus, in
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`order to perform a position and a texture transformation of an input, at least two shading
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`operations and hence, at
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`least
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`two shaders, need to be employed. Conventional graphics
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`processors require the use of both a vertex shader and a pixel shader in order to generate an
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`object. Because both types of shaders are required, known graphics processors are relatively
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`large in size, with most of the real estate being taken up by the vertex and pixel shaders.
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`[0007]
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`In addition to the real estate penalty associated with conventional graphics
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`processors,
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`there is also a corresponding performance penalty associated therewith.
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`In
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`conventional graphics processors, the vertex shader and the pixel shader are juxtaposed in a
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`sequential, pipelined fashion, with the vertex shader being positioned before and operating on
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`vertex data before the pixel shader can operate on individual pixel data.
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`[0008]
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`Thus, there is a need for an improved graphics processor employing a shaderthat
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`is both space efficient and computationally effective.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`[0009]
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`The present invention and the associated advantages and features thereof, will
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`become better understood and appreciated upon review of the following detailed description of
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`the invention, taken in conjunction with the following drawings, where like numerals represent
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`like elements, in which:
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`[0010]
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`FIG. | is a schematic block diagram of a conventional shader;
`
`CHICAGO/#2201074.1
`
`LG Ex. 1002, pg 14
`
`LG Ex. 1002, pg 14
`
`
`
`[0011]
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`FIGS. 2A-2B are graphical representations of the operations performed by the
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`shaderillustrated in FIG. 1;
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`[0012]
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`FIG. 3 is a schematic block diagram of a conventional graphics processor
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`architecture;
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`[0013]
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`FIG. 4A is a schematic block diagram of a graphics processor architecture
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`according to the present invention;
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`[0014]
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`FIG. 4B is a schematic block diagram of an optional input componentto the
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`graphics processor according to an alternate embodimentofthe present invention; and
`
`[0015]
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`FIG. 5 is an exploded schematic block diagram of the unified shader employed in
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`the graphics processorillustrated in FIG. 4A.
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`DETAILED DESCRIPTION OF THE INVENTION
`
`[0016]
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`Briefly stated,
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`the present invention is directed to a graphics processor that
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`employs a unified shader that is capable of performing both the vertex operations and the pixel
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`operations
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`in a space saving and computationally efficient manner.
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`In an exemplary
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`embodiment, a graphics processor according to the present invention includes an arbiter circuit
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`for selecting one of a plurality of inputs for processing in response to a control signal; and a
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`shader, coupled to the arbiter, operative to process the selected one of the plurality of inputs, the
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`shader including means for performing vertex operations and pixel operations, and wherein the
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`shader performs one ofthe vertex operations or pixel operations based on the selected one ofthe
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`plurality of inputs.
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`[0017]
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`The shader includes a general purpose register block for storing at least the
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`plurality of selected inputs, a sequencer for storing logical and arithmetic instructions that are
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`used to perform vertex and pixel manipulation operations and a processor capable of executing
`
`CHICAGO/#2201074.1
`
`LG Ex. 1002, pg 15
`
`LG Ex. 1002, pg 15
`
`
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`both floating point arithmetic and logical operations on the selected inputs according to the
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`instructions maintained in the sequencer. The shader of the present invention is referred to as a
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`“unified” shader because it is configured to perform both vertex and pixel operations. By
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`employing the unified shader of the present invention, the associated graphics processor is more
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`space efficient than conventional graphics processors because the unified shader takes up less
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`real estate than the conventional multi-shader processor architecture.
`
`[0018]
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`In addition, according to the present
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`invention,
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`the unified shader is more
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`computationally efficient because it allows the shader to be flexibly allocated to pixels or
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`vertices based on workload.
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`[0019]
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`Referring now to FIG.3, illustrated therein is a graphics processor incorporating a
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`conventional pipeline architecture. As shown, the graphics processor 40 includes a vertex fetch
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`block 42 which receives vertex information relating to a primitive to be rendered from an off-
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`chip memory 55 on line 41. The fetched vertex data is then transmitted to a vertex cache 44 for
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`storage on line 43. Upon request,
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`the vertex data maintained in the vertex cache 44 is
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`transmitted to a vertex shader 46 on line 45. As discussed above, an example of the information
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`that is requested by and transmitted to the vertex shader 46 includes the object shape, material
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`properties (e.g. color), texture information, and viewing angle. Generally, the vertex shader 46 is
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`a programmable mechanism which applies a transformation position matrix to the input position
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`information (obtained from the vertex cache 44),
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`thereby providing data representing a
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`perspectively corrected image of the object to be rendered, along with any texture or color
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`coordinates thereof.
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`[0020]
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`After performing the transformation operation,
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`the data representing the
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`transformed vertices are then provided to a vertex store 48 on line 47. The vertex store 48 then
`
`CHICAGO/#2201074.1
`
`LG Ex. 1002, pg 16
`
`LG Ex. 1002, pg 16
`
`
`
`transmits the modified vertex information contained therein to a primitive assembly block 50 on
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`line 49. The primitive assembly block 50 assembles, or converts, the input vertex information
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`into a plurality of primitives to be subsequently processed. Suitable methods of assembling the
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`input vertex information into primitives is known in the art and will not be discussed in greater
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`detail here. The assembled primitives are then transmitted to a rasterization engine 52, which
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`converts the previously assembled primitives into pixel data through a process referred to as
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`walking. The resulting pixel data is then transmitted to a pixel shader 54 online 53.
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`[0021]
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`The pixel shader 54 generates the color and additional appearanceattributes that
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`are to be applied to a given pixel, and applies the appearance attributes to the respective pixels.
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`In addition, the pixel shader 54 is capable of fetching texture data from a texture map 57 as
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`indexed by the pixel data from the rasterization engine 52 by transmitting such information on
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`line 55 to the texture map. The requested texture data is then transmitted back from the texture
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`map 57 on line 57° and stored in a texture cache 56 before being routed to the pixel shader on
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`line 58. Once the texture data has been received, the pixel shader 54 then performsspecified
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`logical or arithmetic operations on the received texture data to generate the pixel color or other
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`appearance attribute of interest. The generated pixel appearance attribute is then combined with
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`a base color, as provided by the rasterization engine on line 53, to thereby provide a pixel color
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`to the pixel corresponding at the position of interest. The pixel appearanceattribute present on
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`line 59 is then transmitted to post raster processing blocks (not shown).
`
`[0022]
`
`As described above, the conventional graphics proce