PTO/SB/122 (11-08)
`Approved for use through 11/30/2011, OMB 0651-0035
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`
`CHANGED.
`CORRESPONDENCEADDRESS
`
`p'O' BOX 1450
`Alexandria, VA 22313—1450
`
`Examiner Name
`
`Attorney Docket Number
`
`00100360001
`
`Please change the Correspondence Address for the above-identified patent application to:
`
`The address associated with
`Customer Number:
`
`29153
`
`OR
`
`Firm or
`Individual Name
`
`Address
`
`
`
`
`
`Telephone
`
`This form cannot be used to change the data associated with a Customer Number. To change the
`data associated with an existing Customer Number use “Request for Customer Number Data Change" (PTO/SB/124).
`I am the:
`
`Applicantjlnventor
`
`Assignee of record of the entire interest.
`Statement under 37 CFR 3.73(b) is enclosed. (Form PTO/SB/96).
`
`Attorney or agent of record. Registration Number 34414
`
`Registered practitioner named in the application transmittal letter in an application without an
`executed oath or declaration. See 37 CFR 1.33(a)(1). Registration Number
`
`|PR2017-01225
`
`/Christopher J. Reckamp/
`Slgnature
`Typed or Printe
`.
`ainstopher J. Reckamp
`Name
`
`Date May 17, 2011 Telephoneaizsowsss
`NOTE: Signatures of all the inventors or assignees of record of the entire interest or their representative(s) are required, Submit multiple
`forms if more than one sinature is reuired, see below'.
`
`'Total of 1
`
`forms are submitted.
`
`This collection of information is required by 37 CFR 1.33. The information is required to obtain or retain a benefit by the public which is to file (and by the USPTO
`to process) an application. Confidentiality is governed by 35 U.S.C. 122 and 37 CFR 1.11 and 1.14. This collection is estimated to take 3 minutes to complete.
`including gathering, preparing, and submitting the completed application form to the USPTO. Time will vary depending upon the individual case. Any comments on
`the amount of time you require to complete this form and/or suggestions for reducing this burden, should be sent to the Chief Information Officer, US. Patent and
`Trademark Office. US. Department of Commerce. PO. Box 1450, Alexandria. VA 22313-1450. DO NOT SEND FEES OR COMPLETED FORMS TO THIS
`ADDRESS, SEND To: Commissioner for Patents, P.O. Box 1450, Alexandria, VA 22313-1450.
`
`Ifyou need assistance in completing the form, call 1-800~PTO-9199 and select option 2.
`
`LG Ex. 1002
`
`LG v. ATI
`
`LG Ex. 1002, pg 1
`
`LG Ex. 1002
`LG v. ATI
`IPR2017-01225
`
`

`

`PTOISBI14 (11-08)
`Approved for use through 09130/2010. OMB 0651-0032
`US Patent and Trademark Office; US DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`.
`.
`Application Data Sheet 37 CFR 1.76
`Application Number
`
`Title of Invention
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`
`
`The application data sheet is part of the provisional or nonprovisional application for which it is being submitted. The following form contains the
`bibliographic data arranged in a format specified by the United States Patent and Trademark Office as outlined in 37 CFR 1.76.
`This document may be completed electronically and submitted to the Office in electronic format using the Electronic Filing System (EFS) or the
`document may be printed and included in a paper filed application.
`
`
`
`D Portions or all of the application associated with this Application Data Sheet may fall under a Secrecy Order pursuant to
`37 CFR 5.2 (Paper filers only. Applications that fall under Secrecy Order may not be filed electronically.)
`
`Secrecy Order 37 CFR 5.2
`
`A o licant Information:
`
`A licant1
`
`OParty of Interest under 35 U.S.C. 118
`Applicant Authority @Inventor OLegal Representative under 35 U.S.C. 117
`
`Prefix Given Name Suffix Middle Name Family Name
`
`
`Stephen
`L.
`Morein
`
`
`
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`
`Cambridge
`
`StatelProvince
`
`MA
`
`Country of Residence i
`
`US
`
`Mailing Address of Applicant:
`
`Address 1
`10 Magazine
`
`Address 2
`
`Apt. 801
`
`A -Iicant 2
`
`Applicant Authority @Inventor OLegal Representative under 35 U.S.C. 117
`
`OParty of Interest under 35 U.S.C. 118
`
`EFS Web 2.2.2
`
`A - licant 3
`
`Applicant Authority ©lnventor OLegal Representative under 35 U.S.C. 117
`OParty of Interest under 35 U.S.C. 118
`Prefix Given Name
`Middle Name
`Family Name
`Andrew
`E.
`Gruber
`
`
`Laurent
`
`Lefebvre
`
`
`
`Residence Information (Select One) 0 US Residency
`
`6) Non US Residency 0 Active US Military Service
`
`Country Of Residencei
`Lachgnaie
`
`Citizenship under 37 CFR 1.41(b) i
`
`
`
`Mailing Address of Applicant:
`
`J6W 6A5
`Postal Code
`
`
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`
`Arlington
`StatelProvince
`Country of Residence i
`
`LG Ex. 1002, pg 2
`
`

`

`PTOISBI14 (11-08)
`Approved for use through 09130/2010. OMB 0651-0032
`US Patent and Trademark Office; US. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`Attorney Docket Number 00100360001
`
`Application Data Sheet 37 CFR 1.76
`_
`_
`Application Number
`
`Title Of Invention
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Mailing Address of Applicant:
`Address 1
`215 Pleasant Street
`
`
`
`Address 2
`
`Arlington
`
`StatelProvince
`
`MA
`
`A Iicant4
`
`Applicant Authority @Inventor OLegal Representative under 35 U_S_C_ 117
`
`OParty of Interest under 35 U_S_C_ 118
`
`Skende
`Andi
`
`
`Residence Information (Select One) @ US Residency 0 Non US Residency 0 Active US Military Service
`
`Shrewsbury
`
`StatelProvince
`
`Country of Residence i
`
`
`
`Citizenship under 37 CFR 1.41(b) i
`
`US
`
`Mailing Address of Applicant:
`
`Address 1
`
`49 Sheridan Drive, #11
`
`
`
`StatelProvince
`Shrewsbury
`Countryi
`I US
`I 01545
`Postal Code
`Inventor Information blocks may be
`All
`Inventors Must Be Listed — Additional
`generated within this form by selecting the Add button.
`
`MA
`
`Correspondence Information:
`
`Enter either Customer Number or complete the Correspondence Information section below.
`For further information see 37 CFR 1.33(a).
`
`D An Address is being provided for the correspondence Information of this application.
`
`EFS Web 2.2.2
`
`Suggested Class (if any)
`
`Customer Number
`
`29153
`
`
`
`Email Address
`
`creckamp@vedderprice.com
`
`I
`
`Add Email
`
`Application Information:
`
`
`
`Title of the Invention
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Attorney Docket Number 00100360001
`Small Entity Status Claimed
`|:
`Application Type
`Nonprovisional
`
`Subject Matter
`
`Utility
`
`Suggested Technology Center (if any)
`
`Total Number of Drawing Sheets (if any)
`
`Suggested Figure for Publication (if any)
`
`LG Ex. 1002, pg 3
`
`

`

`PTOISBI14 (11-08)
`Approved for use through 09130/2010. OMB 0651-0032
`US Patent and Trademark Office; US. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995. no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`Attorney Docket Number 00100360001
`
`_
`_
`Application Data Sheet 37 CFR 1.76
`Application Number
`
`
`Title of Invention
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Publication Information:
`
`D Request Early Publication (Fee required at time of Request 37 CFR 1 .219)
`
`Request Not to Publish. I hereby request that the attached application not be published under 35 US.
`Cl C. 122(b) and certify that the invention disclosed in the attached application has not and will not be the subject of
`an application filed in another country, or under a multilateral international agreement, that requires publication at
`eighteen months after filing.
`
`Representative Information:
`
`
`Representative information should be provided for all practitioners having a power of attorney in the application. Providing
`this information in the Application Data Sheet does not constitute a power of attorney in the application (see 37 CFR 1.32).
`Enter
`either Customer Number
`or
`complete
`the
`Representative Name
`section
`below.
`If
`both
`are completed the Customer Number will be used for the Representative Information during processing.
`
`sections
`
`
`
`@ Customer NumberPlease Select One: I 0 US Patent Practitioner 0 Limited Recognition (37 CFR 11.9)
`
`
`Customer Number
`29153
`
`
`
`Continuity Type
`Continuation of
`
`Prior Application Number
`12791597
`
`Filing Date (YYYY-MM-DD)
`2010—06—01
`
`Application Number
`
`Additional Domestic Benefit/National Stage Data may be generated within this form
`by selecting the Add button.
`
`Add
`
`Foreign Priority Information:
`
`This section allows for the applicant to claim benefit of foreign priority and to identify any prior foreign application for which priority is
`not claimed. Providing this information in the application data sheet constitutes the claim for priority as required by 35 U.S.C. 119(b)
`and 37 CFR 1.55(a).
`
`EFS Web 2.2.2
`
`Domestic Benefithational Stage Information:
`This section allows for the applicant to either claim benefit under 35 U.S.C. 119(e), 120, 121, or 365(0) or indicate National Stage
`entry from a PCT application. Providing this information in the application data sheet constitutes the specific reference required by
`35 U.S.C. 119(e) or 120, and 37 CFR 1.78(a)(2) or CFR 1.78(a)(4), and need not otherwise be made part of the specification.
`
`Prior Application Status
`Pending
`
`
`Application Number
`Country i
`Parent Filing Date (YYYY-MM-DD)
`Priority Claimed
`
`
`
`
`
`0 Yes O No
`
`Additional Foreign Priority Data may be generated within this form by selecting the
`Add button.
`
`Add
`
`Assignee Information:
`Providing this information in the application data sheet does not substitute for compliance with any requirement of part 3 of Title 37
`of the CFR to have an assignment recorded in the Office.
`
`Assi - nee 1
`
`LG Ex. 1002, pg 4
`
`

`

`PTOISBI14 (11-08)
`Approved for use through 09130/2010. OMB 0651-0032
`US Patent and Trademark Office; US. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`Application Data Sheet 37 CFR 1.76
`Application Number
`
`
`Attorney Docket Number
`00100360001
`
`Title Of Invention
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`If the Assignee is an Organization check here.
`
`Organization Name
`ATI Technologies ULC
`Mailing Address Information:
`
`Address 1
`
`Address 2
`
`1 Commerce Valley Drive East
`
`City
`
`Markham
`
`StateIProvince
`
`Phone Number
`Email Address
`
`905—882—2600
`
`Additional Assignee Data may be generated within this form by selecting the Add
`button.
`
`Signature:
`
`A signature of the applicant or representative is required in accordance with 37 CFR 1.33 and 10.18. Please see 37
`CFR 1.4(d) for the form of the signature.
`
`Signature
`
`lChristopherJ.Reckamp/
`
`Date (YYYY-MM-DD)
`
`2011—05—17
`
`
`
`
`
`ChristopherFirst Name Registration Number Last Name Reckamp
`
`EFS Web 2.2.2
`
`
`
`
`
`
`
`This collection of information is required by 37 CFR 1.76. The information is required to obtain or retain a benefit by the public which
`is to file (and by the USPTO to process) an application. Confidentiality is governed by 35 U.S.C. 122 and 37 CFR 1.14. This
`collection is estimated to take 23 minutes to complete, including gathering, preparing, and submitting the completed application data
`sheet form to the USPTO. Time will vary depending upon the individual case. Any comments on the amount oftime you require to
`complete this form and/or suggestions for reducing this burden, should be sent to the Chief Information Officer, US. Patent and
`Trademark Office, U.S. Department of Commerce, PO. Box 1450, Alexandria, VA 22313—1450. DO NOT SEND FEES OR
`COMPLETED FORMS TO THIS ADDRESS. SEND TO: Commissioner for Patents, P.O. Box 1450, Alexandria, VA 22313-1450.
`
`LG Ex. 1002, pg 5
`
`

`

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`
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`
`A record from this system of records may be disclosed, as a routine use, to a Federal, State, or local law enforcement agency, if the
`USPTO becomes aware of a violation or potential violation of law or regulation.
`
`
`
`LG Ex. 1002, pg 6
`
`

`

`
`
`Electronic Patent Application Fee Transmittal
`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Quantity
`
`
`
`First Named Inventor/Applicant Name: Stephen L. Morein
`
`Filer:
`
`ChristopherJ. Reckamp/Christine Wright
`
`Attorney Docket Number:
`
`00100360001
`
`Utility under 35 USC 11 1 (a) Filing Fees
`
`Description
`
`Fee Code
`
`Sub-Total in
`USD($)
`
`Independent Claims in excess of3
`
`1201
`
`4
`
`220
`
`880
`
`Miscellaneous-Filing:
`
`LG Ex. 1002, pg 7
`
`

`

`Sub-Total in
`Description USD($) Quantity
`
`
`
`
`
`Patent-Appeals—and-lnterference:
`
`Post-AlIowance-and-Post-lssuance:
`
`Extension-of—Time:
`
`Miscellaneous:
`
`
`Total in USD ($)
`
`LG Ex. 1002, pg 8
`
`

`

`Electronic Acknowledgement Receipt
`
`10111290
`
`Confirmation Number:
`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.17 (Patent application and reexamination processing fees)
`
`yes
`Submitted with Payment
`PaymentType Deposit Account
`
`
`
`First Named Inventor/Applicant Name:
`
`Stephen L. Morein
`
`Customer Number:
`
`29153
`
`— ChrIStopherJ. ReCkamp/ChrIStlne
`
`
`
`Filer Authorized By: ChristopherJ. Reckamp
`
`Attorney Docket Number:
`
`00100360001
`
`
`
`Time Stamp: 17:29:16
`
`
`
`Application Type: Utility under 35 USC 111(a)
`
`Payment information:
`
`
`
`Payment was successfully received in RAM
`
`$1970
`
`Deposit Account
`
`220259
`
`The Director ofthe USPTO is hereby authorized to charge indicated fees and credit any overpayment as follows:
`Charge any Additional Fees required under 37 C.F.R. Section 1.16 (National application filing, search, and examination fees)
`
`LG Ex. 1002, pg 9
`
`

`

`Charge any Additional Fees required under 37 C.F.R. Section 1.19 (Document supply fees)
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.20 (Post Issuance fees)
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.21 (Miscellaneous fees and charges)
`
`Document Description
`
`360001_Application.pdf
`
`Pages
`Multi
`Part l.zip (ifappl.)
`
`File Size(Bytes)/
`Message Digest
`76796
`
`5.12195CBSOdic96b37393d43d086ca74d1
`533a1
`
`
`
`Warnings:
`
`Document
`Number
`
`Warnings:
`Information:
`
`Information:
`
`Information:
`
`Multipart Description/PDF files in .zip description
`
`Document Description
`
`Specification
`
`
`Drawings-only black and white line
`drawings
`
`360001_Drawrngs.pdf
`
`lefiabcgce4894ugaee510509j 'l 651 Sa/b/d
`B1f2
`
`100418
`
`Oath or Declaration filed
`
`360001_Declaration.pdf
`
`1711262
`
`16(1034719fh41Pa904d604c9§77dfifid 3017
`96b4e
`
`Change of Address
`
`360001_Change.pdf
`
`dLL3lel05193121879d529ddb5b35dbt‘d6
`39549
`
`Information:
`
`Application Data Sheet
`
`3600017ADS.pdf
`
`1032318
`
`0457161(63792567d97d4613dade7a99db
`6d9934
`
`Warnings:
`Information:
`
`Fee Worksheet (PTO-875)
`
`fee-infopdf
`
`36605
`
`(9542301783d22714df47c76295cf00c937*
`
`37e<
`
`LG Ex. 1002, pg 10
`
`

`

`Information:
`
`
`
`Total Files Size (in bytes) 3009427
`
`This Acknowledgement Receipt evidences receipt on the noted date by the USPTO of the indicated documents,
`characterized by the applicant, and including page counts, where applicable. It serves as evidence of receipt similar to a
`Post Card, as described in MPEP 503.
`
`New Applications Under 35 U.S.C. 111
`lfa new application is being filed and the application includes the necessary components for a filing date (see 37 CFR
`1.53(b)—(d) and MPEP 506), a Filing Receipt (37 CFR 1.54) will be issued in due course and the date shown on this
`Acknowledgement Receipt will establish the filing date ofthe application.
`
`National Stage of an International Application under 35 U.S.C. 371
`Ifa timely submission to enter the national stage of an international application is compliant with the conditions of 35
`U.S.C. 371 and other applicable requirements a Form PCT/DO/EO/903 indicating acceptance of the application as a
`national stage submission under 35 U.S.C. 371 will be issued in addition to the Filing Receipt, in due course.
`
`New International Application Filed with the USPTO as a Receiving Office
`lfa new international application is being filed and the international application includes the necessary components for
`an international filing date (see PCT Article 11 and MPEP 1810), a Notification of the International Application Number
`and of the International Filing Date (Form PCT/RO/105) will be issued in due course, subject to prescriptions concerning
`national security, and the date shown on this Acknowledgement Receipt will establish the international filing date of
`
`the application.
`
`LG Ex. 1002, pg 11
`
`

`

`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`RELATED APPLICATIONS
`
`[0001]
`
`This application is a continuation of co-pending US Application Serial No.
`
`12/791,597,
`
`filed June 1, 2010, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`instant assignee and is incorporated herein by reference, which is a continuation of co—pending
`
`US. Application Serial No. 11/842,256,
`
`filed August 21, 2007, entitled “GRAPHICS
`
`PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER”, having as inventors
`
`Steven Morein et al., owned by instant as signee and is incorporated herein by reference, which is
`
`a continuation of US. Application Serial N o. 11/117,863, filed April 29, 2005, which has issued
`
`into US. Patent No. 7,327,369, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`EMPLOYING A UNIFIED SHADER”, having as inventors Steven Morein et al., and owned by
`
`instant assignee and is incorporated herein by reference which is a continuation of US.
`
`Application Serial No. 10/718,318, filed on November 20, 2003, which has issued into US.
`
`Patent No. 6,897,871, entitled “GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A
`
`UNIFIED SHADER”, having as inventors Steven Morein et al., and owned by instant assignee
`
`and is incorporated herein by reference.
`
`FIELD OF THE INVENTION
`
`EMPLOYING A UNIFIED SHADER”, having as inventors Steven Morein et al., owned by
`
`CHICAGO/#2201074. 1
`
`[0002]
`
`The present
`
`invention generally relates
`
`to graphics processors and, more
`
`particularly, to a graphics processor architecture employing a single shader.
`
`BACKGROUND OF THE INVENTION
`
`[0003]
`
`In computer graphics applications, complex shapes and structures are formed
`
`through the sampling, interconnection and rendering of more simple objects, referred to as
`
`LG Ex. 1002, pg 12
`
`

`

`primitives. An example of such a primitive is a triangle, or other suitable polygon. These
`
`primitives, in turn, are formed by the interconnection of individual pixels. Color and texture are
`
`then applied to the individual pixels that comprise the shape based on their location within the
`
`primitive and the primitives orientation with respect to the generated shape; thereby generating
`
`the object that is rendered to a corresponding display for subsequent viewing.
`
`[0004]
`
`The interconnection of primitives and the application of color and textures to
`
`generated shapes are generally performed by a graphics processor. Conventional graphics
`
`processors include a series of shaders that specify how and with what corresponding attributes, a
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`final
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`image is drawn on a screen, or suitable display device. As illustrated in FIG. 1, a
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`bits of input data, such as, for example, object shape data (14) in object space (x,y,z); material
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`properties of the object, such as color (16); texture information (18); luminance information (20);
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`and viewing angle information ('22) and provides output data (28) representing the object with
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`conventional shader 10 can be represented as a processing block 12 that accepts a plurality of
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`texture and other appearance properties applied thereto (x’, y’, z”).
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`[0005]
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`In exemplary fashion, as illustrated in FIGS. 2A-2B, the shader accepts the vertex
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`coordinate data representing cube 30 (FIG. 2A) as inputs and provides data representing, for
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`example, a perspectively corrected view of the cube 30’ (FIG. 2B) as an output. The corrected
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`view may be provided, for example, by applying an appropriate transformation matrix to the data
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`representing the initial cube 30. More specifically, the representation illustrated in FIG. ZB is
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`provided by a vertex shader that accepts as inputs the data representing, for example, vertices
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`VX, VY and Vz, among others of cube 30 and providing angularly oriented vertices Vx’,VY' and
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`Vyg, including any appearance attributes of corresponding cube 30’.
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`LG Ex. 1002, pg 13
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`

`

`[0006]
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`In addition to the vertex shader discussed above, a shader processing block that
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`operates on the pixel level, referred to as a pixel shader is also used when generating an object
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`for display. Generally, the pixel shader provides the color value associated with each pixel of a
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`rendered object.
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`Conventionally, both the vertex shader and pixel shader are separate
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`components that are configured to perform only a single transformation or operation. Thus, in
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`order to perform a position and a texture transformation of an input, at least two shading
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`operations and hence, at
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`least
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`two shaders, need to be employed. Conventional graphics
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`processors require the use of both a vertex shader and a pixel shader in order to generate an
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`object. Because both types of shaders are required, known graphics processors are relatively
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`large in size, with most of the real estate being taken up by the vertex and pixel shaders.
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`[0007]
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`In addition to the real estate penalty associated with conventional graphics
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`processors,
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`there is also a corresponding performance penalty associated therewith.
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`In
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`conventional graphics processors, the vertex shader and the pixel shader are juxtaposed in a
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`sequential, pipelined fashion, with the vertex shader being positioned before and operating on
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`vertex data before the pixel shader can operate on individual pixel data.
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`[0008]
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`Thus, there is a need for an improved graphics processor employing a shader that
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`become better understood and appreciated upon review of the following detailed description of
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`is both space efficient and computationally effective.
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`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0009]
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`The present invention and the associated advantages and features thereof, will
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`the invention, taken in conjunction with the following drawings, where like numerals represent
`
`like elements, in which:
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`[0010]
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`FIG. 1 is a schematic block diagram of a conventional shader;
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`LG Ex. 1002, pg 14
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`

`

`[0011]
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`FIGS. 2A-2B are graphical representations of the operations performed by the
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`shader illustrated in FIG. 1;
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`[0012]
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`FIG. 3 is a schematic block diagram of a conventional graphics processor
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`architecture;
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`[0013]
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`FIG. 4A is a schematic block diagram of a graphics processor architecture
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`according to the present invention;
`
`[0014]
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`FIG. 4B is a schematic block diagram of an optional input component to the
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`graphics processor according to an alternate embodiment of the present invention; and
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`[0015]
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`FIG. 5 is an exploded schematic block diagram of the unified shader employed in
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`the graphics processor illustrated in FIG. 4A.
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`DETAILED DESCRIPTION OF THE INVENTION
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`CHICAGO/#2201074. l
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`used to perform vertex and pixel manipulation operations and a processor capable of executing
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`[0016]
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`Briefly stated,
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`the present invention is directed to a graphics processor that
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`employs a unified shader that is capable of performing both the vertex operations and the pixel
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`operations
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`in a space saving and computationally efficient manner.
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`In an exemplary
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`embodiment, a graphics processor according to the present invention includes an arbiter circuit
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`for selecting one of a plurality of inputs for processing in response to a control signal; and a
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`shader, coupled to the arbiter, operative to process the selected one of the plurality of inputs, the
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`shader including means for performing vertex operations and pixel operations, and wherein the
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`shader performs one of the vertex operations or pixel operations based on the selected one of the
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`plurality of inputs.
`
`[0017]
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`The shader includes a general purpose register block for storing at least the
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`plurality of selected inputs, a sequencer for storing logical and arithmetic instructions that are
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`LG Ex. 1002, pg 15
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`

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`both floating point arithmetic and logical operations on the selected inputs according to the
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`instructions maintained in the sequencer. The shader of the present invention is referred to as a
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`“unified” shader because it is configured to perform both vertex and pixel operations. By
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`employing the unified shader of the present invention, the associated graphics processor is more
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`space efficient than conventional graphics processors because the unified shader takes up less
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`real estate than the conventional multi—shader processor architecture.
`
`[0018]
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`In addition, according to the present
`
`invention,
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`the unified shader is more
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`computationally efficient because it allows the shader to be flexibly allocated to pixels or
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`vertices based on workload.
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`CHICAGO/#2201074. l
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`perspectiver corrected image of the object to be rendered, along with any texture or color
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`[0019]
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`Referring now to FIG. 3, illustrated therein is a graphics processor incorporating a
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`conventional pipeline architecture. As shown, the graphics processor 40 includes a vertex fetch
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`block 42 which receives vertex information relating to a primitive to be rendered from an off-
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`chip memory 55 on line 41. The fetched vertex data is then transmitted to a vertex cache 44 for
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`storage on line 43. Upon request,
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`the vertex data maintained in the vertex cache 44 is
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`transmitted to a vertex shader 46 on line 45. As discussed above, an example of the information
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`that is requested by and transmitted to the vertex shader 46 includes the object shape, material
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`properties (e. g. color), texture information, and viewing angle. Generally, the vertex shader 46 is
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`a programmable mechanism which applies a transformation position matrix to the input position
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`information (obtained from the vertex cache 44),
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`thereby providing data representing a
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`coordinates thereof.
`
`[0020]
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`After performing the transformation operation,
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`the data representing the
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`transformed vertices are then provided to a vertex store 48 on line 47. The vertex store 48 then
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`LG Ex. 1002, pg 16
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`

`

`transmits the modified vertex information contained therein to a primitive assembly block 50 on
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`line 49. The primitive assembly block 50 assembles, or converts, the input vertex information
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`into a plurality of primitives to be subsequently processed. Suitable methods of assembling the
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`detail here. The assembled primitives are then transmitted to a rasterization engine 52, which
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`converts the previously assembled primitives into pixel data through a process referred to as
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`walking. The resulting pixel data is then transmitted to a pixel shader 54 on line 53.
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`[0021]
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`The pixel shader 54 generates the color and additional appearance attributes that
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`are to be applied to a given pixel. and applies the appearance attributes to the respective pixels.
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`In addition, the pixel shader 54 is capable of fetching texture data from a texture map 57 as
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`indexed by the pixel data from the rasterization engine 52 by transmitting such information on
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`line 55 to the texture map. The requested texture data is then transmitted back from the texture
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`map 57 on line 57’ and stored in a texture cache 56 before being routed to the pixel shader on
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`input vertex information into primitives is known in the art and will not be discussed in greater
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`CHICAGO/#2201074. l
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`line 58. Once the texture data has been received, the pixel shader 54 then peifonns specified
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`logical or arithmetic operations on the received texture data to generate the pixel color or other
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`appearance attribute of interest. The generated pixel appearance attribute is then combined with
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`a base color, as provided by the rasterization engine on line 53, to thereby provide a pixel color
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`to the pixel corresponding at the position of interest. The pixel appearance attribute present on
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`line 59 is then transmitted to post raster processing blocks (not shown).
`
`[0022]
`
`As described above, the conventional graphics processor 40 requires the use of
`
`two separate shaders: a vertex shader 46 and a pixel shader 54. A drawback associated with such
`
`an architecture is that the overall footprint of the graphics processor is relatively large as the two
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`LG Ex. 1002, pg 17
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`

`

`shaders take up a large amount of real estate. Another drawback associated with conventional
`
`graphics processor architectures is that can exhibit poor computational efficiency.
`
`[0023]
`
`Referring now to FIG. 4A, in an exemplary embodiment, the graphics processor
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`60 of the present invention includes a multiplexer