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`
`A. Y. Nakamura, et al., “256 QAM Modem for Multicarrier 400 Mbit/s
`Digital Radio” IEEE Journal on Selected Areas in Communications, Vol.
`5, Issue 3, April 1987.
`
`.
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`I obtained a copy of Exhibit A through IEEE Xplore, where it is maintained in the
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`1 1. Y. Nakamura, et al., “256 QAM Modem for Multicarrier 400 Mbit/s Digital Radio”
`was published in IEEE Journal on Selected Areas in Communications, Vol. 5, Issue 3.
`
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`445 Hoes Lane Piscataway, NJ 08854
`
`Aruba Networks et al. Exhibit 1012 Page 00001
`
`

`
`IEEE Journal on Selected Areas in Communications, Vol. 5, Issue 3 was published in
`April 1987. Copies of this publication were made available no later than the last day
`of the stated publication month. The article is currently available for public download
`from the IEEE digital library, IEEE Xplore.
`
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`he_Like a1:e_punishab1e b;Lfine or imprrsonme
`-
`'
`V H
`
`I declare under penalty of perjury that the foregoing statements4ar/9true and correct.
`Executed on:
`‘:1-(_3(V\. "gal?
`-—f'
`1:
`.
`' ,:K_-——-..-*""”'
`
`L
`
`T
`
`Page 00002
`
`

`
`EXHIBIT A
`
`EXHIBIT A
`
`Page 00003
`
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`1/5/2017
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` Y. Nakamura ; Y. Saito ; S. Aikawa
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`Variable rate QAM for mobile radio
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`Effect of channel estimation error on M-QAM
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`Abstract:
`This paper describes the performance of a 256 QAM modem with 400 Mbit / s transmission capacity. A variety of novel techniques are introduced as
`ways to achieve good performance. Key techniques include 1) an accurate 256 QAM modulator employing a new monolithic multiplier IC, 2) a carrier
`recovery circuit which satisfies such requirements: good phase jitter performance and no false lock phenomenon, 3) a highly stable high-level decision
`circuit, and 4) a forward error correcting code. As an overall modem performance, BER characteristics and signatures are presented. The equivalent
`-4
`-9
`CNR degradations of 1 dB(at BER of 10 ) and 2 dB (at BER of 10 )are obtained using a single Lee-error correcting code and a seven-tap baseband
`-10
`transversal equalizer. The residual bit errors are decreased below the order of 10 . The performance of a 256 QAM multicarrier modem has given
`prospect for the development of 400 Mbit/s digital microwave radio system.
`
`Published in: IEEE Journal on Selected Areas in Communications ( Volume: 5, Issue: 3, Apr 1987 )
`
`Page(s): 329 - 335
`
` DOI: 10.1109/JSAC.1987.1146555
`
`Date of Publication: 06 January 2003
`
`Publisher: IEEE
`
`Print ISSN: 0733-8716
`
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`IEEE Keywords
`Quadrature amplitude modulation, Modems, Digital communication, Bit error rate, Phase modulation,
`Modulation coding, Monolithic integrated circuits, Jitter, Error correction codes, Degradation
`
`INSPEC: Non-Controlled Indexing
`Quadrature amplitude modulation, Digital modulation/demodulation
`
`Authors
`
`Y. Nakamura
`Nippon Telegraph and Telephone Corp., Kanagawa, Japan
`
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`256 QAM Modem for Multicarrier 400 Mbit/s Digital Radio - IEEE Xplore Document
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`Y. Saito
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`S. Aikawa
`
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`
`IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. VOL. SAC-5. N0. 3. APRIL 198'?
`
`256 QAM Modem for Multicarricr 400 Mbit/s
`Digital Radio
`
`YASUI-IISA NAKAMURA, YOICHI SAITO, MEM'hErt,
`
`IEEE, AND SATORU AIKAWA
`
`Absmn-t—This paper describes the performance of a 256 QAM mo-
`dem with 400 Mhlt / s transmission capacity. A variety of novel tech-
`niques are introduced as ways to achieve good performance. Key tech-
`niques include I) an accurate 256 QAM modulator employing a new
`monolithic multiplier IC. 2) a carrier recovery circuit which satisfies
`such requirements: good phase jitter performance and no false lock
`phenomenon, 3) a highly stable high-level decision circuit, and 4) a
`forward error correcting code. As an overall modem performance, BER
`characteristics and signatures are presented. The equivalent CNR deg-
`radations oi‘ 1 dB (at BER of 10“) and 2 dB (at BER of 10”) are
`obtained using a single Lee-error correcting code and a seven-tap
`haseband transversul equalizer. The residual bit errors are decreased
`below the order of 10”". The performance of a 256 QAM multicarrier
`modem has given prospect for the development of 400 Mhitf 5 digital
`microwave radio system.
`
`I.
`
`INTRODUCTION
`
`NE of the most important criteria in the design of
`digital radio systems is the transmission capacity per
`RF bandwidth,
`i.c., bits/second/Hertz. High-level
`modulation schemes for increasing spectrum utilization of-
`ficicncy are now a major subject in the development of.
`digital microwave radio. In recent years, several digital
`radio systems with 16 QAM, and even with as high as 64
`QAM modulation have been developed and are in opera~
`lion in the microwave frequency band [1]~[4]. The trend
`to increase spectrum utilization cfiicicncy may continue
`[5]-
`As the modulation level increases, the system becomes
`more sensitive to multipath induced waveform distortion
`and interference noise. It was already demonstrated [8]
`that the multicarrier transmission method is effective for
`
`high—level modulation schemes in a multipath environ-
`ment. On the basis of the above considerations, this paper
`describes a 25.6 QAM multicarrier modem for the 400
`Mbit / 5 digital microwave radio (DM—400M) system [6].
`[7]-
`First, the performance of a newly developed monolithic
`multiplier IC for 256 QAM modulation and demodulation
`is described. Next, two principal techniques employed in
`a demodulator are stated. One is “a carrier recovery PLL
`with control mode selection function" which satisfies such
`
`requirements as good phase jitter performance and no false
`lock phenomenon. Another is “automatic gain and deci-
`
`Manuscript received September 15, 1986; revised December 12, 1986.
`The authors are with NTT Electrical Communication Laboratories. Nip»
`poo Telegraph and Telephone Corporation, Kanagawa, 238403 Japan.
`IEEE Log Number 8613242.
`-
`
`sion threshold control (AGTC) circuits.” Due to these
`circuits, an excellent 256 QAM BER performance can be
`obtained. Forward error correction (FEC) is one of the
`key techniques for high—level modulation systems, be-
`cause it eliminates residual bit errors. A single Lcc-error
`correcting code with low redundancy is employed.
`Finally, the 256 QAM BER performance, and signature
`with and without adjacent channel interference are pre-
`sented. The equivalent CNR degradations of 1 dB at BER
`of 10*‘ and of 2 dB at BER of 10-9 are obtained. The
`residual bit errors are decreased below the order of 10" ‘°.
`
`II. GENERAL DESCRIPTION
`
`A. Outline of256 QAM Four-Carrier Modem
`For the realization of a digital radio system having a
`transmission capacity of 400 Mbits/s within 80 MHz
`bandwidth, a 256 QAM modulation using the Nyquist
`spectral shaping (CI! = 0.5) is required. This enables the
`frequency utilization efficiency of 10 bits / s /I-Iz when the
`orthogonal dual polarization is employed.
`In a high-level modulation system such as 64 QAM or
`256 QAM. the multipath fading causes large degradation
`of BER perfonnance. A multicarrier system is considered
`to be a promising method for l1igh—lcvel signal transmis-
`sion in a fading channel. From the 256 QAM transmission
`characteristics estimation, 3. four-carrier system with 12.5
`MBaud data rate and rolloff factor of 0.5 was found nec-
`
`essary to achieve 400 Mbits / s [8]. In this situation. the
`frequency spacing between adjacent carriers is 20 MHz
`and the radio channel is composed of four modems. The
`modem block-diagram and major system parameters are
`shown in Fig.
`1 and Table I.
`.
`The transmitting terminal equipment converts 400
`Mbit/ s data into 32 rails of 12.5 MBaud binary signals.
`These 32 binary bit streams are fed to the four modulator
`circuitry. In each modulator, eight binary streams are dif-
`ferentially encoded (quadrant symmetry encoding) and re-
`dundant bits for error correcting are added by an FEC
`coder circuit. These streams are converted by D/A con»
`vertcrs to form in-phase and quadrature 16 level signals.
`Each 16 level signal modulates a local oscillator. The 256
`QAM signals with cosine rolloff spectrum shaping (ct =
`0.5) are then combined by a hybrid circuit and supplied
`to the transmitter. The 256 QAM four-carrier spectrum is
`shown in Fig. 2.
`At a demodulator, the 256 QAM four—carrier signals are
`
`0733-B716f87IO400-0329-$01.00 © 1987 IEEE
`
`Page 00006
`
`

`
`IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. VOL. SAC-5. N0. 3. APRIL I98‘!
`
`Demodulator
`
`Fig. l. Block diagram of 256 QAM four—carn'er modem.
`
`TABLE 1
`‘
`MAIN Puamsrnns or 256 QAM 400 Mbit / s MULTICARRIER MODEM
`
`[mi lwttb orthogonal dual polarization
`
`distributed by a hybrid circuit and coherently detected to
`produce two orthogonal 16 level baseband signals. The
`seven-tap haseband transversal equalizers are employed
`to equalize both in-phase and quadrature waveform dis-
`tortions.
`In order to improve pull-in performance, ZF
`(zero forcing) with MLE (maximum level error) algo-
`rithm is employed [6]. Demodulated 16 level signals are
`regenerated by AID converters to produce eight rails of
`12.5 MBaud binary signals. Error correction is then car-
`ried out in the FEC decoder circuit.
`
`B. Key Techniques for an Accurate 256 QAM Modem
`In order to realize an accurate 256 QAM modern, the
`following novel techniques are applied.
`1) monolithic multiplier IC for the modulator and the
`phase detector,
`'
`' 2) high—level decision circuit with automatic gain and
`decision threshold control (AGTC circuit),
`3) carrier recovery with control-mode selection func-
`tion,
`4) forward error correction (FEC) technique.
`
`III. CIRCUIT DESCRIPTION
`A. Modulation Section
`
`The degradation factors arising at various parts in a mo-
`dem, such as waveform distortion, phase error, carrier jit-
`ter, etc. , were categorized and the effects of these factors
`on 256 QAM equivalent CNR degradation were presented
`
`l20MH2
`
`V I l0dB/div.
`
`H I IUMHZ/div.
`"IF BW I IUUKHZ
`Video BW I 300Hz
`Fig. 2, Four—ca1'rler spectrum.
`
`in [5]. Concerning the modulation section, it was revealed
`that the allowable maximum modulation phase error is
`:i:0.5° to satisfy the requirement for an equivalent CNR
`degradation of 0.6 dB at a BER of lO’° for 256 QAM.
`Therefore. a new monolithic multiplier IC capable of
`reducing the modulation phase and amplitude errors has
`been developed for the 256 QAM [9]. The main perfor-
`mance of the multiplier itself is presented in Table II. The
`new IC has a baseband input voltage linearity of more
`than 1.5 V and modulation phase error is less than 0.2°,
`which are extremely superior to the conventional ring
`modulators and to multiplier IC developed for a 115 QAM
`system. Third—order intermodulation products (IM3) of
`more than 55 dB at the average output power level is ob-
`tained. These performances are achieved with the aid of
`the latest device technology: SST (super self—aligned pro-
`cess technology) [IO]. The modulation phase error ob-
`
`Page 00007
`
`

`
`NAKAMURA at al.: 255 one MODEM FOR MULTICARRIER 400 Mbilfa rncmu. RADIO
`
`
`
`Nurrbarofsignn1Points
`
`New Aeewate
`
`0.5
`[dell
`Phase error
`kduvalopod for IGGAM
`
`1
`
`Fig. 3. Modulation phase error distributions comparing new monolithic [C
`and conventional modulator.
`
`I
`
`' o a
`0.5
`90.4
`it
`fl
`-0.2
`D
`
`CN-R = 5UdB
`
`|§1l]253»lJ3§|lEl-I5
`5 ll]
`Phase error ides.)
`
`Fig. 5. Phase comparator characteristic.
`
`ever, the required carrier jitter for 256 QAM is more than
`45 dB when the equivalent CNR degradation of 0.3 dB is
`permitted. Therefore, it is necessary to design a carrier
`recovery circuit which satisfies such requirements: a) good
`phase jitter performance and b) no false lock phenome-
`non.
`
`The received 256 QAM signal is demodulated into 16-
`level baseband signals at in-phase and quadrature chan-
`nels. The regenerated first-bit signal sets (:21, b1), which
`are the most significant bit (MSB) of A! D converters, and
`the fifth-bit signal sets (as, 195), which are error polarity
`signals, are multiplied and is used as the VCO control
`signal. The phase control voltage W6) is obtained as fol-
`lows.
`'
`
`Via) =5t55 -5165’
`
`(1)
`
`The reduction of a PLL noise bandwidth and the im-
`
`provement of VCO phase jitter are necessary to obtain a
`recovered carrier jitter of more than 45 dB. The carrier
`jitter of more than 45 dB has been achieved by designing
`RF local oscillator frequency stability of the order of 10'
`and employing a voltage controlled crystal oscillator
`{VCXO) in the demodulator. In spite of a good carrier
`jitter performance,
`it has been clarified from the phase
`comparator characteristic that the carrier recovery circuit
`has a false—lock point in the same frequency when input
`CNR is sufficiently high [5].
`.
`The selective gating of VCXO control signal during the
`course of an acquisition is efiective in order to prevent the
`false-lock phenomenon.
`After locking into a normal phase, the operation of se-
`lecting the control signal
`is inhibited. The switching is
`performed by monitoring the intersymbol
`interference
`which is easily estimated from the multiplication of the
`fifth and the sixth bits of AID converter. This technique
`simultaneously enables the improvement of pull-in and
`carrier jitter performance.
`The phase comparator characteristic in a selective gat- _
`ing mode is obtained as follows.
`Let Dst’ be the probability that the signal point 1' is in-_
`volved in a selective area. D51’ is shown as
`
`Dsi =
`
`S§RsUEs Pitt’ y) dx dy
`
`(2)
`
`where, Pi(x, y) is a Gaussian pdf
`
`(i = l - 256).
`
`Fig. 4. 256 QAM signal constellation.
`
`TABLE It
`MCINOLITHIC MULTIPLIER IC Psnronwmcs
`
`modulation phase error
`leaatlmn 0.2 degree
`less than 0.225]!
`modulation amplitude error
`amplitude deviation between
`.
`.
`100MB: and 180MHz is case
`f"““‘”°’ d“"”“"°'“""‘°
`men than L5‘!
`baaebnnd input linearity voltage
`[MB [third-orderintermodulotion more man 55113
`products}
`when the output buclurffis 'l'dl':l.
`
`b .
`
`.
`
`ssr {Super Seif-aligned process
`
`'
`
`tained from the new monoiithic multiplier IC and conven-
`tional one developed for a 16 QAM system are measured.
`_ Fig. 3 shows the number of signal points versus modu-
`lation phase error comparing the two multiplier lC’s. The
`number of signal points of the quadrature multiplier with
`phase error of less than 10.5" are 238 by using thenew
`monolithic lC’s. The measured maximum phase error of
`less than :1: 1 ‘’ has been obtained.
`It is concluded from experimental results that the newly
`developed monolithic multiplier IC almost satisfies the re-
`quirements for 256 QAM modulator. Fig. 4 shows the
`measured 256 QAM signal space diagram.
`
`B. Demodulatfon Section
`
`I) Carrier Recovery with Control Mode Selection
`Function: A variety of carrier tracking loops for the QAM
`signal have been proposed [11],
`[12}. One of the most
`effective methods for 16 QAM carrier recovery was a se-
`lective gated phase locked loop (PLL), which uses only
`the error signal derived from the same phases of a 4—PSK
`signal. The recovered carrier jitter of more than 35 dB for
`a 16 QAM signal was obtained by this method [1 1]. How-
`
`Page 00008
`
`

`
`332
`
`Pi(x, y) = Pi(.t) - Pi(y)
`
`IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. voL. sac-5. No. 3, APRIL 1937
`
`m
`
`in-phase component of signal point i
`Six
`quadrature component of signal point i
`Siy
`white Gaussian noise power
`02
`26 = minimum distance between signal points.
`
`The average CNR (carrier to noise ratio) of 256 QAM
`can be obtained as
`
`CNR = 35 52/02 = 1:5.
`
`(4)
`
`In (2), Rs means the positive area producing correct
`control voltage “+1” and Er means the negative area
`producing error control voltage “ — 1." When the signal
`point i is involved in a selective area, the phase control
`voltage Vt'(6) is shown as
`
`mo=§Lnmnae
`
`— HE; Pi(x. y) dx dy.
`
`(5)
`
`is involved in a nonselective
`When the signal point i
`area, the phase control voltage Vi(9) is put into “hold"
`condition by a sample and hold circuit. Then, the‘ follow-
`ing equations are introduced.
`
`Pe(I9) = :5‘: {V(6) on + Pe(9) (1 — Dst')}/256
`
`Pe(6) = phase comparator characteristic.
`
`(6)
`
`From (6), Pe(9) can be written as
`
`Pe(8) = 2% V(9}Dsi/_2§ Dsi.
`
`(7)
`
`The phase comparator characteristic in a selective gat-
`ing mode is shown in Fig. 5.-The number of error signals
`- used in the selective gating in Fig. 5 is 96 out of 256.
`Note that the loop exhibits no false lock point. The re-
`covered carrier spectrum is shown in Fig. 6. The mea-
`sured carrier jitter was 45.5 dB and the pull-in frequency
`range of more than 8 kHz was obtained.
`2) High-Level Decision Circuit with Automatic Gain
`and Decision Threshoid Control
`(AGTC): In order to
`achieve a good BER performance, an automatic gain and
`decision threshold control (AGTC) circuit is employed
`[14]. It uses the first and fifth bits of AID converter as the
`feedback signals for the amplitude variation and dc drift
`of demodulated signals. These degradations are mainly
`caused by a local leak of the modulator, AGC level vari-
`ation and -temperature characteristic of amplifiers. The’
`feedback signals are fed to the dc amplifier which is Io-
`catcd before the AID converter. Fig. 7 shows the circuit
`configuration.
`
`ll0MH2
`
`v :
`
`|0dB/div.
`
`l0KHz/div.
`H :
`IF BW : lKHz
`
`Video BW I l00Hz
`Fig. 6. Recovered carrier spectrum.
`
`ac level
`monitor
`
`Fig. 7’. Feedback circuit configuration.
`
`
`
`EquivalentEnddegradationrust
`
`yno control
`
`lnnut
`
`level vnrluttun (dB!
`
`Fig. 8. Equivalent C/N degradation due to input level variation.
`
`Let theiinput signal to the AID converter be u(r) and
`applying Laplacian "s” to u( r), in dc drift compensation
`feedback loop [5]:
`U(s) = V(s) + E(s)/(I + in F(s)).
`When F(s) is supposed to be a perfect integrator,
`
`(3)
`
`F(s) = Ka/.5‘,
`
`(9)
`
`then,
`
`U(s)= V(s)+
`
`5 Kd.r( ).
`.r+Ka-
`
`(10)
`
`In amplitude variation compensation feedback loop (see
`Appendix),
`
`Page 00009
`
`

`
`NAKAMURA at al.: 256 QAM MODEM FOR MULTICARRJER 490 Mbit/s DIGITAL RADIO
`
`U(s) = I/(s) + /1(3)/mKg F(s)
`
`(1'1)
`
`therefore, (1 1) becomes
`
`.3‘
`
`Uls) = V(s] +
`
`mKa -
`
`14(5).
`
`Kg
`
`(12)
`
`where
`
`V(s) = 256 QAM demodulated signal
`E (3') = dc drift
`A(s) = amplitude variation
`F (s) = low—pass filter transmitting function
`Kd. Kg = the linearized gain constants of the loop
`at = gain constant of a dc amplifier.
`
`The mathematical model of the feedback system indi-
`cated in (9), (10) has shown that it has a high-pass fre-
`quency characteristic for both amplitude variation and dc
`drift. The high-pass frequency characteristic of the feed-
`back loops enables suppression of low frequency com-
`ponents of these degradations. Fig. 3 shows one experi-
`ment example of the input level variation compensation.
`This figure gives equivalent CNR degradation versus in-
`put level variation at BER of 10*‘ for 256 QAM. Even a
`small level variation causes a large degradation in case of
`no control, while the CNR degradation is suppressed
`within 0.3 dB for the input level variation of i1 dB by
`employing the amplitude control.
`_
`A fifth bit of the A/D converter is used as the feedback
`
`signal for the dc drift compensation, and an exclusive-or
`output of a first and fifth bits is used for amplitude vari-
`ation compensation. However it is revealed that, in both
`cases, if the dc drift or amplitude variation exceeds a half
`of the minimum distance between signal points, the com-
`pensated signal is locked to the incorrect voltage. Once
`the situations occur, burst bit errors are continually pro-
`duced. This phenomenon is called “false-lock" and the
`calculation of the control voltage characteristics also prove
`its existences [5]. The dc level/amplitude monitor circuits
`and gate circuits shown in Fig. 7 are used to slip out from
`this "false-lock” situation. It is effective to change the
`feedback signals. For example, the first and fifth bits of
`the AID converter are exchanged for the dc drift compen-
`sation and the exclusive—or output of the first and second
`bits is selected for the amplitude variation compensation
`once the “false-lock” occurs.
`
`C. Forward Error Correction (FEC)
`
`An application of FEC codes to high-level modulation
`systems greatly improves BER performance, particularly
`useful for the elimination of residual bit errors. Gener-
`
`ally, in high-level modulation schemes, the symbol error
`probability between the adjacent symbols is much larger
`than that between the separate symbols. Therefore, it is
`elfective to select an FEC code which can mainly correct
`the error propagations to adjacent symbols. The represen-
`tative one is Lee-error correcting code [15]. The theoret-
`ical symbol error rate (SER) improvement due to the sin-
`
`0-0 1 without FEC
`u...-o :ui.th
`I‘-‘EC
`Modem back to back
`Clock I
`I2 . 5MB
`
`<1\J
`|_
`“
`
`W-an
`
`ideal value
`
`"""2a st
`
`32
`
`to
`
`la
`
`44
`
`39
`as
`34
`CNFI (eat
`
`Fig. 9. 256 QAM BER performance.
`
`gle Lee-error correcting code (72, '70) is shown as
`
`P2 ,= 107 - P3
`Pa = SER after FEC
`
`P = SER before FEC.
`
`(13)
`
`The rate overhead of this code is only about 3 percent.
`The dilferential decoding is performed after error correc-
`tion.
`
`IV. OVERALL PERFORMANCE
`
`The 256 QAM signal has 16 baseband levels. The
`baseband signal is obtained by D/A converters as
`
`s,=23-e,+22
`
`-a2+2'a3+a4
`
`S2=23-b,+2’-b;+2-b3+b4.
`
`- (as, 324) are binary codes and
`-
`Signal sets (a;-, bl), -
`categorized as “Path 1” to “Path 4" indicating the first
`to fourth bit. The BER of 256 QAM is obtained as the
`average of the BER’s'of each path. Considering a quad-
`rant symmetry differential encoding, the average BER of
`256 QAM becomes
`
`P2 = 19/64 ei-re-(5/«E e)
`
`= 19/64 errelie,/Jfi)
`
`(14)
`
`25 minimum distance between signal points,
`02
`white Gaussian noise power.
`
`The 256 QAM BER’s for Path 4 (modern back to back)
`are shown in Fig. 9. The single Le'e—error correcting code
`and a seven-tap baseband transversal equalizer are imple-
`mented irl this system. The equivalent CNR degradation
`of 1 dB (at a BER of 10*‘) and 2 dB (at a BER of 10"")
`are obtained. The measured coding gain by the FEC at a
`BER of 10-4 is about 2.5 dB. The residual bit errors have
`been reduced below the order of 1 X l0“"’. The de-
`modulated eye pattern is presented in Fig. 10.
`The overall filter system should be designed to mini-
`mize intersymbol and interchannel (adjacent carrier) in-
`
`Page 00010
`
`

`
`IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS. VOL. 5;\c.5_ N()_ 3_ ,.u=Rn_,
`
`|9s7
`
`BER=1 X W"
`I=IUns.
`without adjacent
`carrier interterence
`' with adjacent
`carrier interfenanee
`
`_'
`
`I5
`in
`5
`Relative notch location (MHz)
`: delay difference between direct and
`irrterfering rays
`
`.__M.4toasBUI=U!DU!—'i§ -10 *5 0
`
`
`
`
`
`Ncrtchdepthtee)
`
`it
`
`Fig. 1;. Equipment signatures for 256 QAM.
`
`'
`
`Multicarrier branch filter B( f) is designed as the five
`stage Butterworth filter with 3 dB bandwidth normalized
`by clock frequency, 37', of 1.6.
`The BPF output spectrum and demodulated spectrum of
`256 QAM signals are shown in Fig. 11. The measured
`D/ U of the adjacent carrier interference at BPF output
`under normal conditions is 18 dB. The 256 QAM signal
`is coherently detected, and then rolloff filtered by the re—
`ceiving low-pass filter shown in (16). The measured DX U
`at the decision circuit input under normal conditions is
`54.9 dB, which satisfies almost the design criteria, 55 dB.
`To clarify the effect of adjacent carrier interference, the
`equipment signatures at BER of 10“ are measured using
`a two-ray fading simulator with 10 ns delay difference.
`Fig. 12 shows the measured results. The transversal
`equalizer is a seven-tap baseband type with MLE (maxi-
`mum level error) algorithm [6]. [7]. As shown in this fig-
`ure, there is a small difference between two signatures
`with and without the adjacent carrier interference.
`
`V. CONCLUSION
`
`This paper has presented the 256 QAM muiticarrier
`modern configuration and several hardware techniques.
`New techniques presented here have become powerful
`tools to improve the modem performance. Particularly, 1)
`an accurate 256 QAM modulator employing the newly dc-
`vcloped monolithic multiplier IC, 2) the carrier recovery
`circuit with control mode selection, 3) high—1evel decision
`circuit and 4) FEC coding, have described in detail.
`Moreover,
`the BER characteristic and signatures have
`been presented as an overall modem performance. The
`equivalent CNR degradation of 1 dB (at a BER of 10-4)
`and 2 dB (at 2: BER of 10*”) have been obtained by the
`FEC and seven-tap baseband transversal equalizer. The
`residual bit errors have been reduced below the order of
`10'”. The comparison between two signatures with and
`without adjacent carrier interference has indicated that the
`degradation due to this interference is negligible.
`
`APPENDIX
`
`In Fig. 7, the AID converter input signal it (I) is written
`
`as
`
`u(t) = a(t) * v(t)
`
`(17)
`
`H I IOMHZ/div, VI l[}dB/div
`IF BW I 300kHz
`
`Video BW I 30DHz
`
`'IIII II II
`
`-==EI II
`R!‘
`
`I
`
`H : 2MHz/div, V : l0dB/div
`IF BW : l00kHz
`Video BW1 lUDHz
`Fig. li. Spectnirn characteristics. (a) BPF output spectrurn. (b) Dcmod—
`ulared spectrum.
`
`terferences. From these requirements, overall spectrum
`shaping of the system is designed to be Nyquist’s cosine
`rolloff (or = 0.5).
`The transmitting and receiving filters are designed as
`
`H1(f) = \fRoI1(f)/S(f)
`
`H20") = ~/R0"(f)/B(f)
`
`(15)
`
`(16)
`
`where
`
`Roll’ (f) = Rolloff filter transfer function
`Sif
`) = NRZ amplitude spectrum
`} = Multicarrier branch filter transfer function.
`B(f
`
`Page 00011
`
`

`
`NAKAMURA er al.: 256 QAM MODEM FOR MULTICARRIER 400 Mhil/s DIGITAL RADIO
`
`where
`
`Ca( I)
`
`pslii
`
`fU)*seIVd0- %(0
`u(t) - v(r)
`
`= [a(r) — 1] - 12(1)-
`
`fit)
`
`low-pass filter impulse response
`— convolution.
`
`From (18) and (19),
`
`(IN
`
`(19)
`
`cats) =r(:) =~= sgn {ram - [am — 1] - um}.
`(20)
`
`Nonlinear function; sgn ( ), followed by a low-pass fil-
`ter can be linearized as follows.
`
`Ca(t‘) ‘—: Kg -f(r) - [a(r) — 1] -
`
`:20‘).
`
`(21)
`
`By applying Laplacian “s" to (17) and (21),
`
`U(s) = A(s) - I/(5)
`
`C‘a(s) = Kg - F(.r) - [A(s) — 1] - V(s).
`Therefore,
`
`(22)
`
`(23)
`
`1
`
`U(s) = I/(5) +
`
`K3 ° F(S)
`
`Ca(.r)
`
`(24)
`
`when the dc amplifier operates linearly,
`
`A(s) = m - Ca(s)
`m
`= gain constant.
`
`(25)
`
`From (24) and (25), (1 1) can be derived.
`
`ACKNOWLEDGMENT
`
`The authors wish to express their appreciation to Dr.
`M. Shinji, Dr. K. Kohiyama, and Dr. 0. Kurita for their
`fruitful advice and suggestions. Dr. S. Komaki. Mr. T.
`Murase, and Mr. N. Irnai provided many ideas and sug-
`gestions throughout the course of this study.
`
`REFERENCES
`
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`[3] T. Noguchi er ail, “6GHz I35 MBPS digital radio system with 64
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`[4] J. D. M'cNicol e1ol.. "Design and application of the RD-4A and RD-
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`[5] Y. Saito el al.. "156 QAM modem for high capacity digital radio
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`_
`[8] Y. Saito er al., "Feasibility considerations of high—level QAM multi-
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`
`_
`
`Japanese)
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`'
`[I1] I. Horikawa er al. , “Design and performance ofa 2(lClMb /s 16 QAM
`digital radio system.“ IEEE Trans. Common, vol. COM-2'.-', pp.
`1953-1958, Dec. 1979.
`_[l2] A. Leclert er al'., “Universal carrier recovery loop for QASK and
`PSK signal sets.” IEEE Trans. Comrmm., vol. COM—3i, pp. I30-
`E36. Jan. 1933.
`[13] M. Matue er al., “Characteristic of 16 QAM can'ier recovery phase
`locked loop with control mode selec