`USOO5242536A
`5,242,536
`[11] Patent Number:
`[191
`Umted States Patent
`
`Schoenborn
`[45] Date of Patent:
`Sep. 7, 1993
`
`75
`
`Phili
`
`Sch
`
`[54] ANISOTROPIC POLYSILICON ETCHING
`PROCESS
`J
`‘)0
`1
`t
`;
`an os_e
`Den m’
`we
`nvfn or
`]
`[
`Iéslllfl-°3i° C°"P°"‘fi°“s MHPMS’
`[73] A55‘$“°°‘
`1 '
`[21] App], No; 532,451
`
`5
`
`,c 1r.
`3 I
`
`1984,
`Oct.—Dec.
`A2(4),
`Technol.,
`Sci.
`0734-2101/84/041537-13,
`1984, American Vacuum
`5°°i°‘Y-
`Controlled Film Formation during CCI4 Plasma Etching,
`Bemacki and Kosicki, J. Electrochem. Soc., Aug.,
`1984.
`Selectivity and Feature Size Control, Dry Etching.
`
`Primary Examir1er—-—Thi Dang
`Attorney, Agent, or Firm-—Gera]d E, Linden; Michael
`D. Rostoker
`
`Dec 20’ 1990
`[22] Ffled:
`[51]
`Int. Cl.5 ........................................... .. HOIL 21/00
`[52] U.S. Cl. .................................. .. 156/643; 156/646;
`156/657; 156/662
`[58] Field of Search ................ 656/657, 662, 643, 646
`[56]
`References Cited
`us. PATENT DOCUMENTS
`
`[57]
`ABSTRACT
`-
`'
`-
`-
`-
`-
`process
`An
`in
`polysihcon
`etching
`amsotropic
`Cl;/I-IBr/He is disclosed. The use of HBr allows etch-
`ing to occur under high polyzoxide selectivity condi-
`fiifisag"""""""""""""""""",1: tions (e.g., above 40:1) that would otherwise Produce
`
`3/1935 cam, ct 31.
`._
`__ 155/545 x
`lateral etching of the poly under the photoreslst mask
`4,502,915
`
`.. . .... 156/643
`6/1985 Purdes . . .. ..
`(isotropy). The selectivity of polyzresist is also increased
`4,521,275
`Egeckrey
`--------
`--
`--
`(e.g., above 4:1). Poly sidewall passivation is enhanced
`wenstem et a .
`..
`‘
`-
`-
`-
`-
`-
`-
`-
`,
`,
`5/1990 Beechko ...................... 156/657
`;';;h°m. r.°1¥";§ °" 'flS‘s“.'°dt°rp°sm9"' Gage ‘:1x‘de.t1lC:Ss.lS
`4,929,301
`4,943,344 7/1990 Tachi et al.
`.. 156/643
`“mum”
`’ a“
`‘““‘°’° °py ‘S ‘ea 11° W‘
`“"
`4,948,462
`8/1990 Rossen ......
`...... 156/643
`Cfeased °Ve'¢*°h (E-8-v 50%) E’“‘mP13rY PY°°°S5 5°“
`5,007,982
`7/1988 Taou . ... .. . ..
`. .. . .. 156/657 x
`tings are: 1) 250 mTorr, 190 Watts. 0.5 cm gap. 100 sccm
`5,013,398
`5/1991 Long et a1.
`.. 156/657 X
`C12, 50 sccm HBr and 40 sccm He; and 2) 270 mTorr,
`
`..
`5,030,590
`7/1991 Amini Ct al.
`.... .. 437/233
`Watts’ O_5 cm gap’
`sccm C12’
`sccm HEX‘ and
`sccm He.
`OTHER PUBLICATIONS
`
`
`
`Relation between the RF discharge parameters andplasma
`etch rates, selectivity and anisotropy, Zarowin, J. Vac.
`
`19 Claims, 16 Drawing Sheets
`
`
`
`
`
`PURE CHLORINEI He PROCESS!
`LOW PRESSURE,
`LOW POWER,
`
`HIGH SELECTIVITY,
`BUT ISOTROPIC
`
`
`
`
`CHLORINE PROCESS!
`30:! POLY:OXIDE AND
`|.6:I POLY:fiS|ST SELECTIVITY,
`VERTICAL PROFILE WITH
`(50% OVERETCH.
`OCCASIONAL NOTCHING
`
`
`
`
`HIGH SELECTIVITIES AND
`VERTICAL PROFILES WITH
`
`LONG OVERETCH
`
`
`
`
`
`
`
`Intel Corp. et al. Exhibit 1 017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`US.‘ Patent
`
`Sep. 7, 1993
`
`Sheet 1 of 16
`
`5,242,536
`
`ACCEPTABLE
`
`RE- ENTRANT OR
`NEGATIVE. NOT
`ACCEPTABLE
`
`"°T°"'E°
`NOT ACCEPTABLE
`
`FIG. IA
`
`FIG.
`
`/3
`
`FIG.
`
`/c
`
`SIDEWALL PROFILE
`
`
`
`.
`
`POLYSI LICON
`
`
`ALL OF THE SIDEWALL PROFILE
`SUBSTRATE
`MUST BE IN THIS HALF- PLAN
`
`FIG.
`
`/0
`
`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`U.S.% Patent
`
`Sep. 7, 1993
`
`Sheet 2 of 15
`
`5,242,536
`
`
`
`F/6‘. 2.4
`
`FIG‘. 28
`
`
`
`FIG. 4
`
`FIG. 5
`
`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`US; Patent
`
`Sep. 7, 1993
`
`Sheet 3 of 16
`
`5,242,536
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`US.‘ Patent
`
`Sep. 7, 1993
`
`Sheet 4 of 16
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`5,242,536
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`Intel Corp. et al. Exhibit 1017
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`
`
`
`US.» Patent
`
`Sep. 7, 1993
`
`Sheet 5 of 16
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`5,242,536
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`Intel Corp. et al. Exhibit 1017
`
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`
`U.S. Patent
`
`Sep. 7, 1993
`
`Sheet 6 of 15
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`5,242,536
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`Intel Corp. et al. Exhibit 1017
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`Intel Corp. et al. Exhibit 1017
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`US.‘ Patent
`
`Sep. 7, 1993
`
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`Intel Corp. et al. Exhibit 1017
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`Intel Corp. et al. Exhibit 1017
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`U.S. Patent
`
`Sep. 7, 1993
`
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`5,242,536
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`Intel Corp. et al. Exhibit 1017
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`Intel Corp. et al. Exhibit 1017
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`U.S. Patent
`
`Sep. 7, 1993
`
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`Intel Corp. et al. Exhibit 1017
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`US; Patent
`
`Sep. 7, 1993
`
`Sheet 10 of 15
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`Intel Corp. et al. Exhibit 1017
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`
`US; Patent
`
`Sep. 7, 1993
`
`Sheet 11 of 15
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`5,242,536
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`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`
`
`
`US; Patent
`
`Sep. 7, 1993
`
`Sheet 12 of 16
`
`5,242,536
`
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`Intel Corp. et al. Exhibit 1017
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`Intel Corp. et al. Exhibit 1017
`
`
`
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`
`
`
`US.‘ Patent
`
`Sep. 7, 1993
`
`Sheet 13 of 16
`
`5,242,536
`
`
`
`FIG. /5A [
`
`‘L
`
`
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`
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`FIG. /6A
`
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`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`U.S.. Patent
`
`Sep. 7, 1993
`
`Sheet 14 of 16
`
`5,242,536
`
`UCL 320|.22
`
`
`M "V
`
`
`_
`
`.
`
`LCL 2|75.87
`
`ETCHED
`
`THICKNESS
`
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`
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`
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`
`2000
`
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`
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`
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`
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`
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`
`POLYSILICON L055 AFTER EREAKTHROUGH
`AND 30 SEC HA|N ETCH STEP
`
`FIG.
`
`/74
`
`POLY
`UNIFORMITY
`
`($6)
`
`o
`
`2
`
`4
`
`5
`
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`
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`
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`
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`
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`(BREAKTHROUGH AND
`MAI N ETCH STEP)
`
`FIG‘. /78
`
`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`US.‘ Patent
`
`Sep. 7, 1993
`
`Sheet 15 of 16
`
`5,242,536
`
`oxme
`ETCH mm:
`(X/min)
`
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`
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`
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`
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`
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`
`9°.
`
`70
`
`so
`
`(OXIDE ETCH RATE
`ouame mm ETCH STEP)
`
`FIG.
`
`/76‘
`
`.
`.20
`
`GATE oxnos
`
`(nm)
`
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`
`(KW)
`
`OVERETCH TI ME (sec)
`
`
`
`F/6. /BA
`
`Intel Corp. et al. Exhibit 1017
`
`
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`Intel Corp. et al. Exhibit 1017
`
`
`
`U.S. Patent
`
`Sep. 7, 1993
`
`Sheet 16 of 16
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`Intel Corp. et al. Exhibit 1017
`
`
`
`
`1
`
`ANISOTROPIC POLYSILICON ETC}-IING
`PROCESS
`
`5,242,536
`
`2
`not during bulk poly removal. Hence, the amount of
`overetch must be limited.
`
`TECHNICAL FIELD OF THE INVENTION
`
`The invention relates to semiconductor device fabri-
`cation, and more particularly to plasma etching of
`polysilicon.
`
`BACKGROUND OF THE INVENTION
`
`Plasma etch processes and apparatus are generally
`well known for etching materials for semiconductor
`device fabrication. The process begins with application
`of a masking material, such as photoresist, to a silicon
`‘wafer. The masking pattern protects areas of the wafer
`from the etch process. The wafer is then placed in a
`plasma reactor (“etcher”) and etched. Subsequent steps
`are detennined by the type of device being fabricated.
`This process is especially valuable for the definition of
`small geometries.
`A common silicon etch process is based on fluorine.
`When mixtures such as CF4-O2 are dissociated in an
`electrical discharge, fluorine atoms are liberated, and
`volatize the silicon as SiF4. Such processes are iso-
`tropic, i.e., they etch in all directions at the same rate.
`Anisotropic, or vertical etches in silicon are not ob-
`served when fluorine is the sole etchant.
`For vertical (anisotropic) etches of silicon, the use of
`gas mixtures such as C2F5-C12 is known. The C2F5
`serves as a source of “recombinants”, such as C3. The
`recombinants suppress (lateral) etching in the horizontal
`direction (in the plane of the wafer) by recombining
`with Cl atoms which have been adsorbed on the etched
`walls. Etching can proceed in the vertical direction
`(normal to the wafer) because ion bombardment from
`the plasma suppresses ‘the recombination mechanism.
`Submicron polysilicon (“poly”) gate patterning re-
`quires minimum etch bias and vertical sidewall profiles
`(anisotropy). In other words, the etching process should
`not undercut the mask, and the poly line should not be
`narrower at the poly-oxide interface than it is at the
`mask-poly interface. FIG. 1A illustrates “acceptable”
`polysilicon profiles. FIG. 1B illustrates an unacceptable
`profile that is “re-entrant”, or “negative”, as would
`result from the aforementioned undercutting or narrow-
`ing. FIG. 1C illustrates an unacceptable profile that is
`notched, such as would result from a lack of sidewall
`protection.
`Further, the selectivity of etch between poly and the
`underlying gate oxide (poly:oxide selectivity) must be"
`as high as possible so as to reduce oxide loss. These two
`requirements, anisotropy and poly:oxide selectivity, can
`be fulfilled with chlorine-based dry etching processes,
`as opposed to fluorine-containing plasmas that tend to
`etch isotropically and have poor selectivity of poly:ox-
`ide. Still, even with chlorine-based processes, the selec-
`tivity of poly:oxide is compromised for profile control.
`Using a typical etcher, such as the top-powered, waf-
`er-grounded LAM 490 etcher, poly:oxide selectivities
`in excess of 100:1 can be achieved with low power (100
`Watt) C1;/He plasmas, but result in severe undercutting
`or notching of the poly sidewall (See FIGS. 1B, 1C and
`2A). On the other hand, helium-rich (greater than 50%),
`high power (greater than 200 Watts) processes produce
`vertical sidewalls at the expense of selectivity (less than
`30:1) and tend to incidentally damage the gate oxide.
`Lateral etching occurs during the overetch cycle and
`
`5
`
`l0
`
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`For purposes of the present disclosure, an etch is
`considered “anisotropic” if no point of the resulting
`polysilicon profile lies under the mask beyond 0.05 um
`from the mask edge at the mask-poly interface and after
`etching is completed, including overetch. This is illus-
`trated in FIG. 1D.
`
`Although etching and sidewall angle formation
`mechanisms are not well understood or characterized, it
`is widely recognized that the directionality and energy
`of ion bombardment from ions accelerated across the
`plasma sheath, and surface passivation mechanisms
`from redeposition of materials, play a major role in
`controlling anisotropy. (See, e.g., “Relation between
`the RF discharge parameters and plasma etch rates,
`selectivity and anisotropy”, C. B. Zarowin, J. Vac. Sci‘.
`Technol, A, Vol.2, No. 4, October-December 1984, and
`“Controlled Film Formation during CCI4 Plasma Etch-
`ing”, S. E. Bernacki and B. B. Kosicki, J. Electrochem.
`Soc., Vol 131, No. 8, August, 1984.) For example, when
`a photoresist mask is used for patterning the poly gates,
`it can contribute to forming a protective film along the
`poly sidewall, thereby preventing lateral etching. Verti-
`cal profiles can also be obtained with oxide masks, in
`which case sidewall protection may result from redepo-
`sition of etched silicon-containing material, or from the
`gas-phase chemistry itself. In addition, the shape of the
`poly sidewall will depend on the poly doping level and
`the doping method (e.g., POCl3,
`implant). Heavily
`doped poly is more likely to etch isotropically. Non-
`annealed, implanted poly tends to form a notch halfway
`along the profile (See e.g., FIG. 1C), possibly at the
`location of peak dopant concentration, and it terminates
`by a “foot” at the oxide interface where dopant concen-
`tration is minimum.
`The use of Bromine (Br) containing plasmas is be-
`coming increasingly popular for high selectivity aniso-
`tropic poly etch. Compared to chlorine, it is found to
`further increase the poly:oxide selectivity, and espe-
`cially the polyzresist selectivity, while maintaining an-
`isotropy with long overetch percentages (e.g., 100%).
`High selectivity still works against profile control, but
`the threshold of compromise is pushed far enough that
`one has to worry about other factors, such as removal
`of the passivation layer.
`Most, if not all, plasma etcher manufacturers now
`offer poly etch processes using bromine. Magnetically
`enhanced (magnetron) etchers from Materials Research
`Corp., such as the MRC Aries (Trademark), and Ap-
`plied Materials, such as the AMAT Precision 5000
`(Trademark), use C12/HBr, while those from Tegal
`Corp., such as the MCR (Trademark), use pure Brz.
`Etchers from Lam Research Corp., such as the Rain-
`bow 4400
`(Trademark),
`offer
`a process
`using
`C12/I-{Br/He. These etchers have high selectivity and
`good profile control. Unfortunately, because bromine
`enhances sidewall passivation, it also forms a sidewall
`film that cannot always be stripped either in sulfur per-
`oxide or by ashing, but requires an I-IF dip. An HF dip
`is not desirable, mostly because it etches some of the
`gate oxide, but also because it adds a step to the process.
`In such a case, the advantage of high poly:oxide selec-
`tivity offered by using Br -is partly lost.
`With previous methods of polysilicon (“poly”) etch-
`ing, using Chlorine (Clz), there has been an inherent
`compromise between anisotropy and selectivity to ox-
`ide. High selectivity processes tend to be isotropic.
`
`Intel Corp. et al. Exhibit 1 017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`3
`
`Information Disclosure Statement
`
`5,242,536
`
`U.S. Pat. No. 4,943,344 discloses an etching method
`using Br; and forming a deep trench etch in single crys-
`tal silicon with photoresist mask at temperatures below
`— 100° C.
`In contrast thereto, the present invention relates to an
`anisotropic polysilicon etch for gate definition using a
`parallel plate etcher with water cooled electrodes at
`0°—90° C., preferably at approximately 20° C. Actual
`plasma neutral and ions temperature is on the order of
`300° K. (degrees Kelvin), as opposed to the electron
`temperature which is on the order of 10,000’ K., and is
`not controlled per se.
`U.S. Pat. No. 4,799,991 discloses a process for prefer-
`entially etching polysilicon selectively to monocrystal—
`line silicon using HBr additions to noncarbonated etch-
`ants and small additions of oxygen.
`In contrast thereto, the present invention relates to
`etching polysilicon selectively to oxide using HBr addi-
`tion to noncarbonated etchants. Specifically, wafers are
`made of monocrystalline silicon with one crystalline
`orientation facing the surface, as opposed to polycrys-
`talline silicon (polysilicon) made of clusters of crystal-
`line silicon arranged in no particular order. The mono-
`crystalline substrate should not be exposed, and oxygen
`additions should be prevented by reducing air leaks.
`Leak back rate is less than 5 mTorr/min, which corre-
`sponds to less than 0.4 percent 02 by volume.
`U.S. Pat. No. 4,502,915 discloses a two-step plasma
`process for selective anisotropic etching of polycrystal-
`line silicon without leaving residue. In a first step, a
`poly etch nonselective to oxide or residues is performed
`with a fluorine-containing species, and about 1500 A of
`poly is removed. In a subsequent step, a selective etch-
`ing is performed.
`In contrast thereto, in the present invention, HBr is
`suppressed in a “breakthrough” step, for native oxide
`breakthrough. Fluorine containing species (e.g., SF5)
`are specifically avoided, and breakthrough step time is
`limited (e.g., to approximately 5 see. so as to preserve
`anisotropy. Typically, about 300A of poly is removed
`during this step.
`U.S. Pat. No. 4,490,209 discloses plasma etching
`using Hydrogen Bromide addition, wherein the bro-
`mine-chlorine mole ratio is in the range of from about
`1% to about 10%. In column 2, lines 62-64 thereof, it is
`suggested that HBr can prevent lateral etching and
`increase the selectivity to SiO2.
`In the present invention, the bromine-chlorine mole
`ratio is maintained above 25% (e.g., at approximately
`34%) in order to achieve anisotropy and poly:oxide
`selectivity with reliability.
`U.S. Pat. Nos. 4,450,042 and 4,521,275 (continuation
`of 4,450,042) disclose plasma etch chemistry for aniso-
`tropic etching of silicon specifically employing Bro-
`mine gas (Brz) and an inert gas concentration at least
`three times that of the bromine compound.
`In U.S. Pat. Nos. 4,490,209, 4,450,042 and 4,521,275 it
`is suggested that chemistries based on chlorine have
`been considered necessary for vertical (anisotropic)
`etching of silicon, and discharges of pure C12 have been
`found useful for this purpose. However, some silicon
`materials, such as highly doped polysilicon, may still
`experience some undercutting if etch conditions are not
`closely controlled.
`In the present invention, HBr is employed, which is
`easier to handle than Brz. The inert gas (He) concentra-
`
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`
`4
`tion is less than that of the I-[Br so that the plasma re-
`mains stable and etching is effective.
`Additionally, in the present invention, the purpose of
`adding HBr to a Cl;/He plasma is to be able to raise the
`selectivity of poly:oxide and/or the % overetch, with-
`out losing anisotropy.
`-
`The patents described above do not resolve the poly-
`:oxide selectivity issue, and do not recognize the trade-
`off between selectivity and anisotropy. Neither do they
`recognize that etching tends to become more isotropic
`during overetch, when the underlying oxide is exposed.
`(Overetching is necessary in order to ensure that no
`residues are left on the wafer. If etching was stopped at
`the “endpoint”, as determined by optical emission from
`the plasma, only parts of the wafer would be completely
`etched while other parts would still be covered with
`remaining polysilicon. This is due to the fact that both
`the initial polysilicon film thickness and the etch rate are
`not perfectly uniform.)
`DISCLOSURE OF THE INVENTION
`
`It is therefore an object of the invention to provide a
`polysilicon etching process with improved sidewall
`profiling.
`It is a further object of the invention to provide a
`polysilicon etching process with improved poly:oxide
`selectivity, i.e., on the order of greater than 30:1.
`It is a further object of the invention to provide a
`polysilicon etching process with improved polyzresist
`selectivity, i.e. on the order of greater than 4:1.
`It is a further object of the invention to provide a
`polysilicon etching process with improved sidewall
`passivation.
`It is a further object of the invention to provide a
`polysilicon etching process that operates at “reduced”
`(as opposed to “baseline” processes not employing
`HBr) plasma pressures.
`It is a further object of the invention to provide a
`polysilicon etching process that minimizes the tradeoff
`between poly:oxide selectivity and anisotropy.
`It is a further object of the invention to provide a
`polysilicon etching process that is amenable to a high
`degree (i.e., >60%) of overetch, without sacrificing
`anisotropy.
`It is a further object of the invention to provide a
`polysilicon etching process that meets the performance
`targets outlined above over a wide window of the
`etcher parameter space so that the process is relatively
`insensitive to small variations of the process parameters.
`It is a further object of the invention to provide a
`polysilicon etching process that is useful for submicron
`technologies.
`It is a further object of the invention to provide a
`polysilicon etching process having high etch rate uni-
`formity, e.g. on the order of within +/—5%
`It is a further object of the invention to provide a
`polysilicon etching process capable of a high through-
`put.
`According to the invention, polysilicon etching is
`performed in a gas containing Helium (He), Hydrogen
`Bromide (HBr) and a chlorine-containing gas such as
`C12, BCl3 or HCl. In the main hereinafter, the chlorine-
`containing gas C12 is discussed.
`flow (of
`The percent of He flow in the total
`He/HBr/C12) is established at O—30% of the total flow.
`The percent of HBr in the balance of the total flow
`(excluding the He) is established at 30-50%. The re-
`maining flow is C12.
`
`Intel Corp. et al. Exhibit 1017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`5
`Gas pressure is established in the range of 230-270
`mTorr, and the total flow rate is established in the range
`of 150-200 sccm. Discharge power is established in the
`range of 150-200 Watts, and thedischarge gap is estab-
`lished in the range of 0.5-0.6 cm. Various specific “reci-
`pes” within these ranges are set forth herein.
`Further according to the invention, during overetch,
`the discharge power is reduced by up to 50%.
`Further according to the invention,
`in an initial
`breakthrough step, preceding the “main” etch step, the
`HBr (bromine addition) is not present. (Breakthrough is
`performed with He/C12 only.)
`A wafer etched according to the disclosed process,
`and the gas for etching are also disclosed.
`FIG. 3 shows generally the improvements that can be
`achieved using the disclosed process (i.e., using I-IBr).
`In a chlorine-only process, shown at 302, poly:oxide
`selectivity on the order of 30:1 and poly:resist selectiv-
`ity on the order of l.6:l can be achieved. Vertical profil-
`ing can be achieved with less than 50% overetch, but
`there is occasional notching. In a chlorine/helium pro-
`cess, shown at 304, low pressures and powers can be
`employed and high selectivities can be achieved. How-
`ever, the process tends to be isotropic. As shown at 306,
`hydrogen-bromide is beneficially employed to augment
`either of these two processes, resulting in high selectivi-
`ties and vertical profiles with long overetch possible, as
`shown at 308.
`
`The disclosed process produces vertical sidewalls
`while achieving higher selectivity to oxide than a
`Cl;/He plasma. Further, by using HBr in the etching
`process, poly:oxide selectivity is enhanced without los-
`ing anisotropy and without relying on resist passivation.
`Further, by using HBr in the etching process, He con-
`tent can be reduced, selectivity can be improved, and
`better profile control can be achieved.
`The disclosed process has utility in submicron, Poly-l
`etch technology (gate polysilicon), e.g. for etching at
`0.7 urn.
`.
`
`Other objects, features and advantages of the inven-
`tion will become apparent in light of the following
`description thereof.
`The following terms and abbreviations are (or may
`be) used herein: polysilicon (poly); Chlorine (C12); He-
`lium (He); Hydrogen-Bromide (HBr); mil1iTorr (mT, or
`mTorr); standard cubic centimeters per minute (sccm);
`centimeters (cm); Angstroms (A); microns (um); nano-
`meters (nm); degrees Celsius (°C.); degrees Kelvin
`('K.); watts (W); kilowatts (KW); etch rate (ER); criti-
`cal dimension (CD); scanning electron microscope
`(SEM); seconds (sec); minutes (min); hours (hr); less
`than (<); greater than (>); percent (%); ratio of one
`element “X” to another element “Y” (X:Y).
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1A is a schematic representation of a cross-sec-
`tion of a polysilicon gates, exhibiting acceptable side-
`wall profile, such as may be produced with various
`prior art ‘etching techniques, or with the etching tech-
`nique of the present invention.
`FIG. 1B is a schematic representation of a cross-sec-
`tion of a polysilicon gate, exhibiting an unacceptable
`re-entrant or negative sidewall profile.
`FIG. 1C is a schematic representation of a cross-sec-
`tion of a polysilicon gate, exhibiting an unacceptable
`notched sidewall profile.
`FIG. 1D is a schematic representation of profile spec-
`ifications for anisotrophy.
`
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`5,242,536 I
`
`6
`FIG. 2A is a photomicrograph showing a notched
`sidewall. (Compare FIG. 1C)
`FIG. 2B is a photomicrograph showing a vertical
`sidewall. (Compare FIG. IA at 102)
`FIG. 3 is a generalized graphic representation of the
`process and advantages of the present invention.
`FIG. 4 is a photomicrograph of an isotropic etch in
`15% HBr in a total flow of HBr and C12.
`FIG. 5 is a photomicrograph of an anisotropic etch in
`30% I-IBr in a total flow of I-IBr and C12.
`FIGS. 6A and 6B are contour plots of poly and oxide
`etch rates in a first test matrix.
`FIGS. 7A and 7B are contour plots of direct fit to
`poly etch rate uniformity and fit to its inverse, in the
`first test matrix.
`FIGS. 8A and 8B are plots of general trends of selec-
`tivity polyzoxide in the first test matrix.
`FIGS. 9A and 9B are contour plots of selectivity
`polyzresist in the first test matrix.
`FIGS. 10A and 10B are contour plots of calculated
`CD loss, in the first test matrix.
`'
`FIGS. 11A and 11B are contour plots of calculated
`oxide loss in the first test matrix.
`
`FIGS. 12A and 12B are contour plots of poly and
`oxide etch rates, in a second test matrix.
`FIGS. 13A and 13B are contour plots of poly etch
`rate uniformity and selectivity poly:resist in the second
`test matrix.
`
`FIGS. 14A and 14B are contour plots of poly and
`oxide etch rates, poly uniformity and selectivity po-
`lyzresist in the second test matrix.
`FIGS. 15A and 15B are photomicrographs of poly
`profiles with 30% and 100% overetch, according to the
`present invention.
`FIGS. 16A and 16B are photomicrographs of poly
`profiles with 80 and 100 sccm C12 flow, according to the
`present invention.
`FIGS. 17A, 17B and 17C are plots of process data
`showing capability and reproducibility of the process of
`the present invention.
`FIG. 18A, 18B and 18C are plots of remaining gate
`oxide as a function of overetch time and overetch
`power, according to the present invention.
`FIG. 19 is a photomicrograph of poly sidewall profile
`with resist mask, 60% overetch time, according to the
`present invention.
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`According to the present invention, a dry etching
`process is disclosed for anisotropic polysilicon etching
`using HBr gas along with C12 and He. The process
`improves profile control, improves polyzoxide and po-
`ly:resist selectivities, and indicates improvements in
`sub-micron technology.
`In the discussion that follows, results are based on
`investigations performed on the LAM 490 (Trademark)
`Etcher, available from LAM Research Corp. of Fre-
`mont, CA, but the invention is not limited to the use of
`this particular etcher. The‘ LAM 490 etcher is a parallel
`plate etcher having 8 inch parallel anodized aluminum
`electrodes with a variable gap from 0.25 cm to 2.5 cm.
`Gases are fed through a shower-head type top elec-
`trode. The top electrode (cathode) is powered by a 1250
`Watt solid state generator. The bottom electrode (an-
`ode) is grounded. Gas flows are adjustable from 0-200
`sccm. Operating pressure is adjustable from about 100
`
`Intel Corp. et al. Exhibit 1 017
`
`Intel Corp. et al. Exhibit 1017
`
`
`
`7
`mTorr to 10 Torr. The etcher has automatic wafer
`transport with load-lock.
`
`5,242,536
`
`
`
`TABLE II-continued
`Parameter
`Range
`total flow
`60 to 570
`% helium
`0 to 70
`% HBr‘
`10 to 100
`Total
`
`The percent HBr (%HBr) is taken as a percentage of
`the combined flow of Cl2 and HBr (exclusive of the He
`flow).
`Two methodologies were investigated: 1) simply add
`HBR or replace C12 by HBr in the “baseline” process; or
`2) start from “desirable” conditions as listed under “tar-
`get” in Table I. Here, “desirable” conditions refer to a
`set of pressure, power values, etc. that is preferred from
`a process maintenance viewpoint, and based on the
`latest trends in plasma etching. A difficulty in the first
`approach (simply add HBr or replace C12 by HBr in the
`“baseline” process) is that the test apparatus had already
`been optimized for etch rate, uniformity, selectivity and
`profile, with chlorine and helium only. By simply add-
`ing HBr (or replacing C12), this delicate balance would
`
`Investigative Methodology
`
`Table I, presented below, illustrates etching perfor-
`mance of a “baseline” process using only C12 and He,
`the “target” for the process of this invention (using HBr
`and different etcher parameter settings), and the “rea-
`sons” for selecting the target parameters.
`Aside from selectivity (polyzresist and poly:oxide)
`and profile control, the process must also satisfy other
`requirements specific to the equipment used. Overall,
`the goal is not only to achieve high performances under
`optimum conditions, but to develop a process that meets
`these performance targets over a wide window of the
`parameter space so that it is insensitive to small varia-
`tions of the process parameters (pressure, power, etc.).
`For instance, electrode spacing should be made as large
`as possible to reduce the effects of small gap variations.
`Another example is to operate at lower pressure. Low
`pressure processes rely less on sidewall passivation, and
`because collisions in the sheath are less likely,
`they
`enhance ion directionality.
`
`5
`
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`20
`
`TABLE I
`
`
`
`Parameter
`power (Watts)
`
`pressure (mT)
`gap (cm)
`C12 (sccm)
`He (sccm)
`
`Baseline etch process and target parameters:
`Baseline
`Target
`Reason
`175
`low, 100?
`minimize damage
`increase selectivity
`profile control
`widen window
`
`350
`0.4:}
`65
`150
`
`low, 100?
`high, 1.0?
`‘.7
`low
`high
`
`confine plasma
`reduce loading,
`improve mix,
`enhance cooling
`but enough to enhance
`profile control & selectivity,
`not too much to avoid
`resist stripping problems
`throughput
`
`reduce oxide loss
`preserve implant mask
`
`HBr
`
`none
`
`low
`
`4000
`<:5%
`
`30:!
`<50
`
`> 3000
`<:5%
`
`>902]
`<20
`
`poly etch rate
`(A/min)
`uniformity‘
`selectivity
`poly:oxide
`oxide loss (A)
`selectivity
`polyzresist
`CD loss
`CD uniformity
`profile
`
`high
`l.6:l
`not measurable
`NA (< 0.1 pm ?)
`litho limited
`10 < 0.02 um
`always vertical,
`occasionally
`insensitive to
`negative with
`doping level &
`POCl3 poly,
`method, % overetch
`foot with
`implanted poly
`
`reduce CD loss
`litho limited
`
`device performance
`
`55
`
`60
`
`65
`
`get upset. For example: 1) by adding 10 sccm of HBR to
`the baseline process, the poly:oxide selectivity was not
`significantly improved, and results were not very con-
`sistent; 2) by reducing the C12 flow by 10 sccm and
`replacing it with 10 sccm of HBr, a non-etching plasma
`resulted (it would seem that HBr tends not to maintain
`the discharge as efficiently as C12); 3) by adding 20 sccm
`HBr to a high poly:oxide selectivity process (175 Watts,
`350 mTorr, 0.46 cm gap, 161 sccm C12, 54 sccm He, 60:]
`poly:oxide, less than 2:1 polyzresist), the polyzresist se-
`lectivity improved (to 7:1), but the poly:oxide selectiv-
`ity was not improved; 4) at low pressure (less than 150
`mTorr) and low power (less than 150 Watts), only Heli-
`um-free discharges could be sustained, and by adding
`HBr the plasma was often unstable; 5) at 250 mTorr, 100
`Watts, 0.46 cm gap, ll5 sccm C12, 20 sccm HBr and 20
`sccm He, etching was isotropic.
`
`Intel Corp. et al. Exhibit 1 017
`
`Uniformity (“U”) is determined by taking a plurality
`of measurements per wafer, and equals l00(max-min)/-
`(max+min)
`Table II, presented below, illustrates the experimen-
`ta